EP0493820B1 - Treiberschaltung für eine Flüssigkristallanzeige - Google Patents

Treiberschaltung für eine Flüssigkristallanzeige Download PDF

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Publication number
EP0493820B1
EP0493820B1 EP19910122321 EP91122321A EP0493820B1 EP 0493820 B1 EP0493820 B1 EP 0493820B1 EP 19910122321 EP19910122321 EP 19910122321 EP 91122321 A EP91122321 A EP 91122321A EP 0493820 B1 EP0493820 B1 EP 0493820B1
Authority
EP
European Patent Office
Prior art keywords
driver circuit
latch
liquid crystal
crystal display
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP19910122321
Other languages
English (en)
French (fr)
Other versions
EP0493820A1 (de
Inventor
Misao Matsuura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
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NEC Corp
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Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of EP0493820A1 publication Critical patent/EP0493820A1/de
Application granted granted Critical
Publication of EP0493820B1 publication Critical patent/EP0493820B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2011—Display of intermediate tones by amplitude modulation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general

Definitions

  • the present invention relates to a driver circuit for a liquid crystal display (hereinafter referred to as an "LCD”) which requires a number of display gradations.
  • LCD liquid crystal display
  • Fig. 1 is a block diagram showing a conventional driver circuit for a liquid crystal display.
  • This LCD driver circuit comprises k ( k being 2 or a greater integer) shift registers SR1 ⁇ SR k , k latch circuits LATCH1 ⁇ LATCH k , k select circuits SELECT1 ⁇ SELECT k and a transistor switch group 2.
  • Digital image data input voltages V in inputted to image data input terminals D in are supplied to the shift registers SR1 ⁇ SR k , to which a clock pulse V CLK is also supplied commonly from a clock pulse input terminal CLK.
  • the outputs of the shift registers SR1 ⁇ SR k are supplied to the corresponding latch circuits LATCH1 ⁇ LATCH k , to which a latch pulse V STB is also supplied commonly from a latch pulse input terminal STB.
  • the outputs of the latch circuits LATCH1 ⁇ LATCH k are supplied to the corresponding select circuits SELECT1 ⁇ SELECT k , to which a frame selection signal V FRM is also supplied commonly from a frame selection terminal FRM.
  • Each of the select circuits SELECT1 ⁇ SELECT k has a plurality of output terminals and provides a switch selection signal at a specific output terminal based on the frame selection signal V FRM and also the outputs of the corresponding latch circuit LATCH1 ⁇ LATCH k .
  • the transistor switch group 2 comprises a plurality of transistors T11 ⁇ T km in a matrix form. More specifically, the switch group 2 comprises k ( k being 2 or a greater integer) transistor groups, each group comprising m ( m being 2 or a greater integer) transistors. These transistors T11 ⁇ T km are on/off operated according to the switch selection signals outputted from the respective select circuits SELECT1 ⁇ SELECT k , and thus they selectively provide LCD driving voltage: V LC1 ⁇ V LCm to the output terminals O1 ⁇ O k .
  • From the image data input terminals D in are supplied the digital image input voltages V in of n ( n being 2 or a greater integer) bits corresponding to the m gradations.
  • the image data input voltages V in are transferred to the k shift registers SR1 ⁇ SR k in synchronism with the clock pulse V CLK supplied to the clock pulse input terminal CLK.
  • Each of the select circuits SELECT1 ⁇ SELECT k outputs a switch selection signal according to the frame selection signal V FRM and the data held in the corresponding latch circuit LATCH1 ⁇ LATCH k , thus selectively turning on a specific transistor in each of the transistors groups T11 ⁇ T 1m , ..., T k1 ⁇ T km .
  • one of the voltages V LC1 ⁇ V LCm is selectively provided to each of the output terminals O1 ⁇ O k . In this way, the voltages corresponding to the m gradations are supplied to the LCD.
  • the conventional LCD driver circuit explained above has the following defects. Where there are many gradations for display on the LCD, it is necessary for the conventional driver circuit that a low impedance buffer circuit having output terminals corresponding in number to the number of gradations is formed on a semiconductor chip. Therefore, if the number of gradations is to be increased, the chip size and the cost of manufacture of the conventional LCD driver circuit are inevitably increased.
  • an object of the invention to overcome the defects in the conventional LCD driver circuit and to provide an improved LCD driver circuit which permits driving of an LCD in a large number of gradations and which permits high density integration to be realized readily and with a low cost.
  • a driver circuit for a liquid crystal display comprises: a plurality of shift registers for transferring image input data in accordance with a clock pulse; a plurality of latch circuits for receiving and holding respectively the outputs from the shift registers in accordance with a latch pulse; a plurality of select circuits each having a plurality of output terminals, each for outputting a switch selection signal to a specific one of the output terminals based on outputs from each of the latch circuits and a frame selection signal; a multiplexer for receiving m ( m being 2 or a greater integer) kinds of drive source voltages whose levels are different from one another and selectively outputting m/2 kinds of drive source voltages based on the frame selection signal; a plurality of switch groups each having transistor switches for selecting the outputs of the multiplexer based on each of the switch selection signals outputted from the select circuits; and a plurality of operational amplifiers each provided between each of the switch groups and the liquid crystal display.
  • the multiplexer selectively outputs m/2 kinds of voltages among the m kinds of different LCD drive source voltages according to the frame selection signal, and the switch groups select specific ones of these LCD drive source voltages according to the switch selection signals outputted from the select circuits.
  • the necessary number of the switches can be reduced to one half as compared to that in the conventional circuit, thus permitting high density integration and cost reduction.
  • the amplifiers provided between each of the switch groups and the LCD permit switch size reduction, because currents flowing through the switches do not directly drive the LCD. It is thus possible to permit higher density integration of the LCD driver circuit.
  • MOS transistors for example, may be used.
  • each switch is constructed with a single transistor, its "on" resistance is possibly changed by the voltages supplied from the multiplexer.
  • This change in the "on" resistance of the single transistor switch can be avoided by using as the switch a transfer gate, which may be constructed, for example, with a P- and an N-channel transistor connected in parallel. Accordingly, it is desirable that the switch is a transfer gate constituted by a P-channel translator and an N-channel transistor.
  • Fig. 2 is a schematic diagram showing a first embodiment of the LCD driver circuit according to the invention.
  • This LCD driver circuit comprises a plurality of shift registers SR1 ⁇ SR k , latch circuits LATCH1 ⁇ LATCH k . select circuits SELECT1 ⁇ SELECT k , transistor switches T11 ⁇ T k(m/2) , a multiplexer MPX, and a plurality of operational amplifiers OP1 ⁇ OP k.
  • the image data input voltages V in inputted to the image data input terminals D in are transferred to the k shift registers SR1 ⁇ SR k in synchronism with the clock pulse V CLK supplied from the clock pulse input terminal CLK.
  • the latch circuits LATCH1 ⁇ LATCH k hold the respective output signals of the shift registers SR1 ⁇ SR k in synchronism with the latch pulse V STB supplied to the latch pulse input terminal STB.
  • Each of the select circuits SELECT1 ⁇ SELECT k has a plurality of output terminals and outputs a switch selection signal to a specific one of the output terminals based on the frame selection signal V FRM supplied from the frame selection terminal FRM and also the outputs of each of the latch circuits LATCH1 ⁇ LATCH k .
  • the multiplexer MPX selects m/2 kinds of LCD drive source voltages among the m kinds of different LCD drive source voltages V LC1 ⁇ V LCm , necessary for m/2 levels of gradation display of image.
  • the transistor switches T11 ⁇ T k(m/2) constitute k transistor switch groups each group consisting of m/2 transistor switches. These transistor switches are on/off operated by the switch selection signals outputted from the respective select circuits SELECT1 ⁇ SELECT k .
  • the operational amplifiers OP1 ⁇ OP k each forming a voltage follower circuit enhance the drive current capacity of the LCD drive source voltages supplied through the transistor switches T11 ⁇ T k(m/2) , and supply to the LCD with these enhanced LCD drive source voltages through the output terminals O1 ⁇ O k .
  • Fig. 3 is a timing chart for illustrating the operation of this embodiment of the LCD drive circuit shown in Fig. 2.
  • the frame selection signal V FRM assumes a high and a low level at a predetermined period or frequency.
  • the latch pulse signal V STB is generated in synchronism with the rising of the frame selection signal V FRM .
  • the image data input voltages V in inputted to the image data input terminals D in are transferred to the shift registers SR1 ⁇ SR k in synchronism with the clock pulse V CLK .
  • the latch circuits LATCH1 ⁇ LATCH k receive signals outputted from the corresponding shift registers SR1 ⁇ SR k in synchronism with the latch pulse V STB and hold these input signals as data for the next horizontal scan period.
  • the select circuits SELECT1 ⁇ SELECT k selectively turn on specific transistor switches in the individual transistor switch groups of transistor switches T11 ⁇ T k(m/2) based on the frame selection signal V FRM and the n-bit data outputted from the latch circuits LATCH1 ⁇ LATCH k .
  • the multiplexer MPX selectively outputs m/2 kinds of voltages among the m kinds of different drive source voltages V LCl ⁇ V LCm according to the frame selection signal V FRM . These voltages are selectively supplied to the operational amplifiers OP1 ⁇ OP k via the aforementioned specific transistor switches selected by the select circuits SELECT1 ⁇ SELECT k .
  • the operational amplifiers OP1 ⁇ OP k provide the output voltages V O1 ⁇ V Ok according to the input voltages V S1 ⁇ V Sk .
  • the drive current is small if the dimensions of the transistors constituting the transistor switches are small.
  • the operational amplifiers OP1 ⁇ OP k are provided as the voltage follower circuits between the transistor switches T11 ⁇ T k(m/2) and the LCD, and they provide drive voltages having large drive current capacity. Therefore, the transistors of the transistor switches T11 ⁇ T k(m/2) may be of smaller dimensions.
  • the LCD driver circuit in this embodiment may be of a reduced chip size as compared to that in the prior art.
  • m gradations may be covered by m/2 transistor switches in each of the groups of transistor switches T11 ⁇ T k(m/2) , that is, it is possible to reduce the number of transistors used to one half that in the prior art. It is thus possible to further reduce not only the chip size but also the manufacturing cost.
  • Fig. 4 is a schematic diagram showing a second embodiment of the LCD driver circuit according to the invention.
  • This embodiment is different from the preceding first embodiment in that a transfer gate consisting of a P- and an N-channel transistor and an inverter is provided in stead of each transistor switch constituted by a single transistor. Since the remainder of the structure is basically the same as in the first embodiment, parts like those in Fig. 2 are designated by like reference symbols, and the explanation therefor is not repeated here.
  • a plurality of transfer gates each comprising a P- and an N-channel transistor and an inverter are provided as the switching means.
  • each switch is constituted by a single transistor
  • the "on" resistance of the transistor concerned is changed or influenced by the voltages supplied from the multiplexer MPX due to the back gate voltage dependency of the transistor.
  • a transfer gate consisting of a P- and an N-channel transistor and an inverter is provided as a transistor switch.
  • the P- and N-channel transistors compensate with each other to avoid the change in the "on" resistance caused by the voltage applied thereto.
  • the multiplexer since the multiplexer receives m kinds of different LCD drive source voltages and provides m/2 kinds of voltages according to the frame selection signal, only one half the number of switches are necessary as compared to the conventional driver circuit.
  • the LCD driver circuit according to the invention is well suited to the LCD requiring a number of display gradations and permits high density integration and cost reduction.
  • the amplifiers are provided between the switch groups and the LCD, no large current passes through the switches. It is thus possible to reduce the switch dimension and permit higher density integration.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)

Claims (3)

  1. Treiberschaltung für eine Flüssigkristall-Anzeige mit: einer Anzahl von Schieberegistern (SR₁-SRk) zur Übertragung von Bildeingangsdaten (Vin) entsprechend einem Taktpuls (VCLK), einer Anzahl von Halteschaltungen (LATCH₁-LATCHk) zum Empfang und zum Halten der Ausgangssignale der Schieberegister entsprechend einem Haltepuls (VSTB), und einer Anzahl von Auswahlschaltungen (SELECT₁-SELECTk) mit jeweils einer Anzahl von Ausgangsanschlüssen, jede zur Ausgabe eines Schaltauswahlsignals an einen bestimmten der Ausgangsanschlüsse aufgrund von Ausgangssignalen von jeder der Halteschaltungen und einem Bildauswahlsignal (VFRM), wobei die Treiberschaltung gekennzeichnet ist durch:
    einen Multiplexer (MPX) zum Empfang von m-Arten von Treiberquellenspannungen (VLC1-VLCm), deren Pegel sich voneinander unterscheiden, und zum selektiven Ausgeben von m/2 Arten von Treiberquellenspannungen (VS1-VSk) basierend auf dem Bildauswahlsignal, wobei m gleich 2 oder eine größere ganze Zahl ist,
    einer Anzahl von Schaltgruppen mit jeweils Schaltern (T₁₁-Tk(m/2)) zur Auswahl der Ausgangssignale des Multiplexers aufgrund jedes Schaltauswahlsignals, die von den Auswahlschaltungen ausgegeben werden, und
    einer Anzahl von Verstärkern (OP₁-OPk), die jeweils zwischen jeder Schaltgruppe und der Flüssigkristallanzeige vorgesehen sind.
  2. Treiberschaltung für eine Flüssigkristallanzeige nach Anspruch 1,
    wobei jeder der Schalter (T₁₁-Tk(m/2)) ein Übertragungstor mit einem P- und einem N-Kanal-MOS-Transistor und einem Inverter ist, der zwischen die Gate-Elektroden der P- und N-Kanal-MOS-Transistoren geschaltet ist.
  3. Treiberschaltung für eine Flüssigkristallanzeige nach Anspruch 1,
    wobei jeder Verstärker (OP₁-OPk) ein Operationsverstärker ist, dessen Ausgangsanschluß und invertierender Eingangsanschluß direkt verbunden sind, so daß er als Spannungsfolgerschaltung arbeitet.
EP19910122321 1990-12-29 1991-12-27 Treiberschaltung für eine Flüssigkristallanzeige Expired - Lifetime EP0493820B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP41719990A JPH04242788A (ja) 1990-12-29 1990-12-29 液晶駆動回路
JP417199/90 1990-12-29

Publications (2)

Publication Number Publication Date
EP0493820A1 EP0493820A1 (de) 1992-07-08
EP0493820B1 true EP0493820B1 (de) 1994-10-12

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Application Number Title Priority Date Filing Date
EP19910122321 Expired - Lifetime EP0493820B1 (de) 1990-12-29 1991-12-27 Treiberschaltung für eine Flüssigkristallanzeige

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EP (1) EP0493820B1 (de)
JP (1) JPH04242788A (de)
DE (1) DE69104601T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5426447A (en) * 1992-11-04 1995-06-20 Yuen Foong Yu H.K. Co., Ltd. Data driving circuit for LCD display
GB9314849D0 (en) * 1993-07-16 1993-09-01 Philips Electronics Uk Ltd Electronic devices
US5757351A (en) * 1995-10-10 1998-05-26 Off World Limited, Corp. Electrode storage display addressing system and method
JP2001083923A (ja) * 1999-07-12 2001-03-30 Semiconductor Energy Lab Co Ltd デジタルドライバおよび表示装置
JP3908013B2 (ja) 2001-11-19 2007-04-25 Ｎｅｃエレクトロニクス株式会社 表示制御回路及び表示装置
CN110910834B (zh) 2019-12-05 2021-05-07 京东方科技集团股份有限公司 源极驱动器、显示面板及其控制方法、显示装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5821793A (ja) * 1981-07-31 1983-02-08 セイコーエプソン株式会社 液晶表示装置
EP0238867B1 (de) * 1986-02-21 1994-12-14 Canon Kabushiki Kaisha Anzeigegerät

Also Published As

Publication number Publication date
JPH04242788A (ja) 1992-08-31
EP0493820A1 (de) 1992-07-08
DE69104601D1 (de) 1994-11-17
DE69104601T2 (de) 1995-05-18

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