EP0479377B1 - Current source with a given ratio between input and output currents - Google Patents
Current source with a given ratio between input and output currents Download PDFInfo
- Publication number
- EP0479377B1 EP0479377B1 EP91202505A EP91202505A EP0479377B1 EP 0479377 B1 EP0479377 B1 EP 0479377B1 EP 91202505 A EP91202505 A EP 91202505A EP 91202505 A EP91202505 A EP 91202505A EP 0479377 B1 EP0479377 B1 EP 0479377B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- current
- transistor
- input
- resistor
- series combination
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/265—Current mirrors using bipolar transistors only
Definitions
- the present invention relates to a current source having a given ratio between an output current I and an input current i and comprising a first series branch comprising a first resistor in series with the main current path of a first transistor , so as to be traversed by the input current, and a second series branch comprising a second resistor in series with the main current path of a second transistor to deliver the output current, the first and the second transistors being arranged so as to form a first current mirror.
- the second transistor has an emitter surface G times greater than the first transistor (or it is constituted by G individual transistors identical to the first transistor and arranged in parallel), so as to obtain the same base voltage drop -emitter in the first and second transistors, and avoid thermal drifts of the G ratio.
- the subject of the present invention is a current source making it possible to obtain in particular, but not exclusively, high ratios between an output current and an input current, without appreciable thermal drift of the ratio G, and by implementing a much simpler circuit than an operational amplifier and also poses no stability problem.
- a current source according to the invention is thus defined in the characterizing part of claim 1.
- the compensation circuit easily achievable using the current source technique, makes it possible to compensate for the difference between the emitter-base voltage of the two transistors, which therefore no longer need to be of different dimensions, and this is avoided the complication and the consumption of crystal surface of the integrated circuit, which imposes the implementation of an operational amplifier, from where reduction of the cost.
- the compensation circuit can comprise a third series branch comprising the main current paths of a third diode-mounted transistor and a fourth transistor, as well as a fourth series branch comprising the main current path of a fifth transistor, the base is connected to that of the third transistor, and a third resistor.
- the fourth transistor is mounted as a diode.
- the fourth series branch comprises, between the main current path of the fifth transistor and the third resistor, the main current path of a sixth transistor, the base of which is connected to the collector of the fourth transistor, the collector of which is connected to the base of the fourth transistor, and whose emitter has a surface larger than that of the emitter of the fourth transistor.
- the third series branch can be arranged to be traversed by a current substantially equal to the input current. This enables the compensation circuit to be supplied without having to specifically produce a current value. As it is easy to choose a compensation current lower than the input current, a supply of the compensation circuit from a current equal to the input current is always sufficient.
- the first series branch may include a fourth resistor in series with the first resistor, the current compensator then having an input connected to a point common to the first and to the fourth resistor. This provides an additional parameter for determining the compensation.
- the current source may have an input branch having an input resistance and forming a second current mirror with the first series branch. It is thus possible to produce a buffer interface having a fixed or programmable input impedance and preventing interference from the output to the input of the interface.
- the invention also relates to a power amplifier, the input resistance being constituted by a divider bridge whose midpoint constitutes the input of the amplifier.
- an operational amplifier AP has at its non-inverting input a resistor R and a resistor R 'at its output B (emitter of a transistor T mounted as an emitter follower), connected to the inverting input of the AP amplifier.
- An input current i is injected at the input A and crosses the resistance R.
- the ratio G is defined with good precision, but on the other hand an operational amplifier requires many components and poses problems of stability and frequency response.
- a pnp type T pn transistor has its emitter connected to a supply voltage source Vcc through two resistors in series R1 and R2, and its base (point D) to that of a T2 type transistor pnp whose emitter is connected to the voltage source Vcc through a resistor R3 and whose collector provides an output current I.
- An npn transistor T10 has its base connected to the collector of transistor T1, its collector at the base of transistors T1 and T2 and its transmitter at the common mode pole (ground).
- the transistors T1 and T2 form a current mirror in the ratio G between the currents I and i, but with a significant thermal dependence if the two transistors are not in dimension ratios corresponding to the ratio G, that is to say that the emitter of the transistor T2 has an equal effective surface at G times that of the emitter of transistor T1.
- An input current mirror comprises in series between the voltage source Vcc and the common mode pole a resistor R5 and the main current path of an npn transistor T15 mounted as a diode by base-collector short-circuit.
- the base of the transistor T15 is connected to that of an npn transistor T14 whose main current path is in series between the collector of the transistor T la and the ground.
- the same input current i crosses their main current paths.
- the common point F at the resistors R1 and R2 is connected to the collector of an npn transistor T5 whose main current path is in series with that of a transistor T6 of the same type and a resistor R4 including one terminal is grounded.
- the base of the transistor T5 is connected to that of an npn transistor T3 mounted as a diode and whose main current path is in series with that of a transistor T4 whose emitter is grounded.
- the base of transistor T4 is connected to the collector of transistor T6 and the collector of transistor T4 is connected to the base of transistor T6.
- the series branch constituted by the transistors T3 and T4 is supplied by a current source of arbitrary intensity, here chosen equal to the input current i to simplify the circuit.
- transistor T13 of the npn type the base of which is connected to that of the transistor T14 (and of the transistor T15), the emitter of which is grounded and the collector of which is connected to that of a pnp transistor.
- T11 whose transmitter is connected to the voltage source Vcc and which is mounted as a diode by base-collector interconnection.
- the ratio i s4 / i s6 is equal to the ratio of the effective surfaces of the emitters of T6 and T4 respectively.
- R 1 R 4 log I i i s1 i s2 log i s6 i s4
- the compensation by the current i0 is obtained by a simpler circuit than previously, in that the transistor T6 is omitted and that the transistor T4 is mounted as a diode. Compensation is only approximate and a condition is that i0 be very close to i.
- FIG. 4 shows a power amplifier implementing a current source as defined above.
- the resistor R5 is replaced by two resistors in series R'5 and R "5 whose midpoint constitutes the input E of the amplifier.
- a voltage gain equal to R1 + R2 / R" 5 is therefore obtained, and a current gain equal to G.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Amplifiers (AREA)
- Control Of Electrical Variables (AREA)
Description
La présente invention a pour objet une source de courant présentant un rapport donné entre un courant de sortie I et un courant d'entrée i et comprenant une première branche série comportant une première résistance en série avec le trajet de courant principal d'un premier transistor, de manière à être traversée par le courant d'entrée, et une deuxième branche série comportant une deuxième résistance en série avec le trajet de courant principal d'un deuxième transistor pour délivrer le courant de sortie, le premier et le deuxième transistors étant agencés de manière à former un premier miroir de courant.The present invention relates to a current source having a given ratio between an output current I and an input current i and comprising a first series branch comprising a first resistor in series with the main current path of a first transistor , so as to be traversed by the input current, and a second series branch comprising a second resistor in series with the main current path of a second transistor to deliver the output current, the first and the second transistors being arranged so as to form a first current mirror.
De telles sources de courant sont en général utilisées pour des rapports G peu élevés (jusqu'à 10 environ) entre le courant de sortie et le courant d'entrée. Pour ces applications, le deuxième transistor présente une surface d'émetteur G fois plus grande que le premier transistor (ou il est constitué par G transistors individuels identiques au premier transistor et disposés en parallèle), de manière à obtenir la même chute de tension base-émetteur dans les premier et deuxième transistors, et éviter les dérives thermiques du rapport G.Such current sources are generally used for low G ratios (up to about 10) between the output current and the input current. For these applications, the second transistor has an emitter surface G times greater than the first transistor (or it is constituted by G individual transistors identical to the first transistor and arranged in parallel), so as to obtain the same base voltage drop -emitter in the first and second transistors, and avoid thermal drifts of the G ratio.
Pour des rapports G plus élevés, par exemple allant jusqu'à 100, une telle solution conduirait à des dimensions prohibitives pour le deuxième transistor, et on utilise alors des montages mettant en oeuvre un amplificateur opérationnel. De telles solutions sont par exemple mises en oeuvre par MATRA COMMUNICATION (demande de brevet français 88 01645 du 11 février 1988, en particulier figure 5), SGS-THOMSON (notice du circuit TEA 7063 - Telephone Speech and Peripherals Line Control) et MOTOROLA (Product preview du circuit TCA 3385 - Telephone Ring Signal Converter).For higher G ratios, for example up to 100, such a solution would lead to prohibitive dimensions for the second transistor, and then assemblies using an operational amplifier are used. Such solutions are for example implemented by MATRA COMMUNICATION (French patent application 88 01645 of February 11, 1988, in particular FIG. 5), SGS-THOMSON (notice of the TEA 7063 circuit - Telephone Speech and Peripherals Line Control) and MOTOROLA ( Product preview of circuit TCA 3385 - Telephone Ring Signal Converter).
Ces modes de réalisation présentent l'inconvénient d'exiger la présence d'un amplificateur opérationnel qui consomme une surface relativement élevée de circuit intégré, et qui en outre peut présenter des problèmes de statilité, surtout si le circuit fait partie d'un montage complexe présentant des étages en cascade.These embodiments have the drawback of requiring the presence of an operational amplifier which consumes a relatively large surface area of an integrated circuit, and which in addition can present problems of statility, especially if the circuit is part of a complex assembly. with cascading floors.
La présente invention a pour objet une source de courant permettant d'obtenir en particulier, mais non exclusivement, des rapports élevés entre un courant de sortie et un courant d'entrée, sans dérive thermique appréciable du rapport G, et en mettant en oeuvre un circuit beaucoup plus simple qu'un amplificateur opérationnel et ne posant en outre pas de problème de stabilité.The subject of the present invention is a current source making it possible to obtain in particular, but not exclusively, high ratios between an output current and an input current, without appreciable thermal drift of the ratio G, and by implementing a much simpler circuit than an operational amplifier and also poses no stability problem.
Une source de courant selon l'invention est ainsi définie dans la partie caractérisante de la revendication 1.A current source according to the invention is thus defined in the characterizing part of claim 1.
Le circuit de compensation, facilement réalisable selon la technique des sources de courant, permet de compenser l'écart entre la tension émetteur-base des deux transistors, qui n'ont de ce fait plus besoin d'être de dimensions différentes, et on évite la complication et la consommation de surface de cristal de circuit intégré, qu'impose la mise en oeuvre d'un amplificateur opérationnel, d'où réduction du coût.The compensation circuit, easily achievable using the current source technique, makes it possible to compensate for the difference between the emitter-base voltage of the two transistors, which therefore no longer need to be of different dimensions, and this is avoided the complication and the consumption of crystal surface of the integrated circuit, which imposes the implementation of an operational amplifier, from where reduction of the cost.
Le circuit de compensation peut comporter une troisième branche série comportant les trajets de courant principal d'un troisième transistor monté en diode et d'un quatrième transistor, ainsi qu'une quatrième branche série comportant le trajet de courant principal d'un cinquième transistor dont la base est connectée à celle du troisième transistor, et une troisième résistance. Selon un premier mode de réalisation, permettant d'obtenir une compensation approchée, le quatrième transistor est monté en diode. Selon un deuxième mode de réalisation préféré, permettant une compensation précise, la quatrième branche série comporte, entre le trajet de courant principal du cinquième transistor et la troisième résistance, le trajet de courant principal d'un sixième transistor dont la base est connectée au collecteur du quatrième transistor, dont le collecteur est connecté à la base du quatrième transistor, et dont l'émetteur a une surface supérieure à celle de l'émetteur du quatrième transistor.The compensation circuit can comprise a third series branch comprising the main current paths of a third diode-mounted transistor and a fourth transistor, as well as a fourth series branch comprising the main current path of a fifth transistor, the base is connected to that of the third transistor, and a third resistor. According to a first embodiment, making it possible to obtain approximate compensation, the fourth transistor is mounted as a diode. According to a second preferred embodiment, allowing precise compensation, the fourth series branch comprises, between the main current path of the fifth transistor and the third resistor, the main current path of a sixth transistor, the base of which is connected to the collector of the fourth transistor, the collector of which is connected to the base of the fourth transistor, and whose emitter has a surface larger than that of the emitter of the fourth transistor.
La troisième branche série peut être agencée pour être traversée par un courant sensiblement égal au courant d'entrée. Ceci permet d'alimenter le circuit de compensation sans avoir à produire spécifiquement une valeur de courant. Comme il est facile de choisir un courant de compensation inférieur au courant d'entrée, une alimentation du circuit de compensation à partir d'un courant égal au courant d'entrée est toujours suffisante.The third series branch can be arranged to be traversed by a current substantially equal to the input current. This enables the compensation circuit to be supplied without having to specifically produce a current value. As it is easy to choose a compensation current lower than the input current, a supply of the compensation circuit from a current equal to the input current is always sufficient.
La première branche série peut comporter une quatrième résistance en série avec la première résistance, le compensateur de courant présentant alors une entrée connectée à un point commun à la première et à la quatrième résistance. Ceci permet de disposer d'un paramètre supplémentaire pour déterminer la compensation.The first series branch may include a fourth resistor in series with the first resistor, the current compensator then having an input connected to a point common to the first and to the fourth resistor. This provides an additional parameter for determining the compensation.
La source de courant peut présenter une branche d'entrée présentant une résistance d'entrée et formant un deuxième miroir de courant avec la première branche série. On peut ainsi réaliser un interface tampon ayant une impédance d'entrée fixe ou programmable et empêchant les interférences de la sortie vers l'entrée de l'interface.The current source may have an input branch having an input resistance and forming a second current mirror with the first series branch. It is thus possible to produce a buffer interface having a fixed or programmable input impedance and preventing interference from the output to the input of the interface.
L'invention concerne également un amplificateur de puissance, la résistance d'entrée étant constituée par un pont diviseur dont le point milieu constitue l'entrée de l'amplificateur.The invention also relates to a power amplifier, the input resistance being constituted by a divider bridge whose midpoint constitutes the input of the amplifier.
L'invention sera mieux comprise à la lecture de la description qui va suivre, donnée à titre d'exemple non limitatif, en liaison avec les dessins qui représentent :
- la figure 1, une source de courant à rapport élevé entre courant de sortie et courant d'entrée et mettant en oeuvre un amplificateur opérationnel,
- la figure 2, une source de courant selon un mode préféré de réalisation de l'invention,
- la figure 3, une variante simplifiée du circuit de compensation de la figure 2,
- la figure 4, un amplificateur de puissance comprenant une source de courant selon l'invention.
- FIG. 1, a current source with a high ratio between output current and input current and using an operational amplifier,
- FIG. 2, a current source according to a preferred embodiment of the invention,
- FIG. 3, a simplified variant of the compensation circuit of FIG. 2,
- Figure 4, a power amplifier comprising a current source according to the invention.
Selon la figure 1, un amplificateur opérationnel AP présente à son entrée non inverseuse une résistance R et une résistance R' à sa sortie B (émetteur d'un transistor T monté en émetteur-suiveur), connectée à l'entrée inverseuse de l'amplificateur AP. Un courant d'entrée i est injecté à l'entrée A et traverse la résistance R. L'amplificateur AP maintenant égales les tensions en A et en B, on a :
Le rapport G est défini avec une bonne précision, mais par contre un amplificateur opérationnel nécessite de nombreux composants et pose des problèmes de stabilité et de réponse en fréquence.The ratio G is defined with good precision, but on the other hand an operational amplifier requires many components and poses problems of stability and frequency response.
Selon la figure 2, un transistor T₁ de type pnp a son émetteur relié à une source de tension d'alimentation Vcc à travers deux résistances en série R₁ et R₂, et sa base (point D) à celle d'un transistor T₂ de type pnp dont l'émetteur est relié à la source de tension Vcc à travers une résistance R₃ et dont le collecteur fournit un courant de sortie I. Un transistor npn T₁₀ a sa base connectée au collecteur du transistor T₁, son collecteur à la base des transistors T₁ et T₂ et son émetteur au pôle de mode commun (masse). Les transistors T₁ et T₂ forment un miroir de courant dans le rapport G entre les courants I et i, mais avec une dépendance thermique importante si les deux transistors ne sont pas dans des rapports de dimension correspondant au rapport G, c'est-à-dire que l'émetteur du transistor T₂ a une surface efficace égale à G fois celle de l'émetteur du transistor T₁.According to FIG. 2, a pnp type T pn transistor has its emitter connected to a supply voltage source Vcc through two resistors in series R₁ and R₂, and its base (point D) to that of a T₂ type transistor pnp whose emitter is connected to the voltage source Vcc through a resistor R₃ and whose collector provides an output current I. An npn transistor T₁₀ has its base connected to the collector of transistor T₁, its collector at the base of transistors T₁ and T₂ and its transmitter at the common mode pole (ground). The transistors T₁ and T₂ form a current mirror in the ratio G between the currents I and i, but with a significant thermal dependence if the two transistors are not in dimension ratios corresponding to the ratio G, that is to say that the emitter of the transistor T₂ has an equal effective surface at G times that of the emitter of transistor T₁.
Un miroir de courant d'entrée comporte en série entre la source de tension Vcc et le pôle de mode commun une résistance R₅ et le trajet de courant principal d'un transistor npn T₁₅ monté en diode par court-circuit base-collecteur. La base du transistor T₁₅ est connectée à celle d'un transistor npn T₁₄ dont le trajet de courant principal est en série entre le collecteur du transistor T₁ et la masse. Pour des transistors T₁₄ et T₁₅ identiques, le même courant d'entrée i traverse leurs trajets de courant principal.An input current mirror comprises in series between the voltage source Vcc and the common mode pole a resistor R₅ and the main current path of an npn transistor T₁₅ mounted as a diode by base-collector short-circuit. The base of the transistor T₁₅ is connected to that of an npn transistor T₁₄ whose main current path is in series between the collector of the transistor T la and the ground. For identical transistors T₁₄ and T₁₅, the same input current i crosses their main current paths.
L'idée de base de l'invention est de faire passer dans la branche d'entrée un courant de compensation i₀ propre à corriger la dépendance thermique du rapport G. Il n'est alors plus nécessaire d'utiliser des transistors T₁ et T₂ de dimensions différentes. Pour le calcul on a choisi la configuration suivante :
- le courant i₀ traverse la résistance R₁,
- les transistors T₁ et T₂ ont pour constantes de courant caractéristiques respectivement is1 et is2, c'est-à-dire is1 = is2 si T₁ et T₂ sont nominalement identiques.
- the current i₀ crosses the resistance R₁,
- the transistors T₁ and T₂ have as characteristic current constants respectively i s1 and i s2 , that is to say i s1 = i s2 if T₁ and T₂ are nominally identical.
Les transistors T₁ et T₂ ayant leur trajet de courant principal traversé respectivement par les courants i et I, leurs tensions base-émetteur respectivement V BET1 et VBET2 ont pour valeur :
- k
- = constante de Boltzmann
- q
- = charge de l'électron
- T
- = température absolue
- k
- = Boltzmann constant
- q
- = electron charge
- T
- = absolute temperature
En écrivant l'égalité des tensions au point D, on a alors :
Pour réaliser le compensateur, le point commun F aux résistances R₁ et R₂ est connecté au collecteur d'un transistor npn T₅ dont le trajet de courant principal est en série avec celui d'un transistor T₆ de même type et une résistance R₄ dont une borne est à la masse. La base du transistor T₅ est connectée à celle d'un transistor npn T₃ monté en diode et dont le trajet de courant principal est en série avec celui d'un transistor T₄ dontl'émetteur est à la masse. La base du transistor T₄ est connectée au collecteur du transistor T₆ et le collecteur du transistor T₄ est connecté à la base du transistor T₆. La branche série constituée par les transistors T₃ et T₄ est alimentée par une source de courant d'intensité arbitraire, ici choisie égale au courant d'entrée i pour simplifier le circuit. Il suffit en effet d'un transistor T₁₃ de type npn dont la base est connectée à celle du transistor T₁₄ (et du transistor T₁₅), dont l'émetteur est à la masse et dont le collecteur est connecté à celui d'un transistor pnp T₁₁ dont l'émetteur est connecté à la source de tension Vcc et qui est monté en diode par interconnexion base-collecteur. En connectant ce point d'interconnexion base-collecteur du transistor T₁₁ à la base d'un transistor pnp T₁₂ dont le trajet de courant principal est en série avec celui du transistor T₃, et dont l'émetteur est connecté à la source de tension Vcc, on obtient un miroir de courant faisant circuler le courant i dans la branche série T₃, T₄.To make the compensator, the common point F at the resistors R₁ and R₂ is connected to the collector of an npn transistor T₅ whose main current path is in series with that of a transistor T₆ of the same type and a resistor R₄ including one terminal is grounded. The base of the transistor T₅ is connected to that of an npn transistor T₃ mounted as a diode and whose main current path is in series with that of a transistor T₄ whose emitter is grounded. The base of transistor T₄ is connected to the collector of transistor T₆ and the collector of transistor T₄ is connected to the base of transistor T₆. The series branch constituted by the transistors T₃ and T₄ is supplied by a current source of arbitrary intensity, here chosen equal to the input current i to simplify the circuit. It suffices in fact for a transistor T₁₃ of the npn type, the base of which is connected to that of the transistor T₁₄ (and of the transistor T₁₅), the emitter of which is grounded and the collector of which is connected to that of a pnp transistor. T₁₁ whose transmitter is connected to the voltage source Vcc and which is mounted as a diode by base-collector interconnection. By connecting this base-collector interconnection point of transistor T₁₁ to the base of a pnp transistor T₁₂ whose path main current is in series with that of transistor T₃, and whose emitter is connected to the voltage source Vcc, a current mirror is obtained by circulating current i in the series branch T branche, T₄.
Le courant i₀ a pour valeur :
Application numérique :
Selon la figure 3, la compensation par le courant i₀ est obtenue par un circuit plus simple que précédemment, en ce que le transistor T₆ est omis et que le transistor T₄ est monté en diode. La compensation n'est qu'approchée et une condition est que i₀ soit très voisin de i.According to FIG. 3, the compensation by the current i₀ is obtained by a simpler circuit than previously, in that the transistor T₆ is omitted and that the transistor T₄ is mounted as a diode. Compensation is only approximate and a condition is that i₀ be very close to i.
On a alors :
La figure 4 présente un amplificateur de puissance mettant en oeuvre une source de courant telle que définie ci-dessus. La résistance R₅ est remplacée par deux résistances en série R'₅ et R"₅ dont le point milieu constitue l'entrée E de l'amplificateur. On obtient donc un gain en tension égal à R₁+R₂/R"₅, et un gain en courant égal à G.FIG. 4 shows a power amplifier implementing a current source as defined above. The resistor R₅ is replaced by two resistors in series R'₅ and R "₅ whose midpoint constitutes the input E of the amplifier. A voltage gain equal to R₁ + R₂ / R" ₅ is therefore obtained, and a current gain equal to G.
On remarque que dans la description précédente, le courant i₀ était introduit au point F commun aux résistances R₁ et R₂ de la branche d'entrée. Comme la compensation est réalisée par introduction d'une chute de tension additionnelle dans la branche d'entrée, celle-ci peut s'effectuer en tout point de celle-ci. En articulier, il pourrait n'y avoir qu'une résistance R₁ (R₂ = 0). La présence de la résistance R₂ permet de faciliter le choix des valeurs.Note that in the previous description, the current i₀ was introduced at the point F common to the resistors R₁ and R₂ of the input branch. As the compensation is carried out by introducing an additional voltage drop in the input branch, this can be carried out at any point thereof. In particular, there could be only one resistance R₁ (R₂ = 0). The presence of the resistor R₂ makes it easier to choose the values.
Claims (6)
- Current source which has a given ratio of an output current I to an input current i and comprises a first series combination which includes a first resistor (R₁ + R₂) connected in series with the main current path of a first transistor (T₁) as to pass the input current i, and a second series combination which includes a second resistor (R₃) connected in series with the main current path of a second transistor (T₂) for producing the output current I, the first and second transistors being connected so as to form a first current mirror circuit, characterized in that a node F dividing the first resistor into two parts, a first part (R₁) having a non-zero value R₁, remote from the first transistor, and a second part (R₂) having value R₂, near the first transistor, which node F is connected to a third series combination which includes the main current path of a third transistor (T₃) connected as a diode and the main current path of a fourth transistor whose emitter is connected to ground, which node F is also connected to a fourth series combination which includes the main current path of a fifth transistor (T₅) whose base is connected to the base of the third transistor (T₃) as well as a fourth resistor (R₄) connected on the other side to ground, for producing an equalizing current (io) which in the first part (R₁) of the first resistor causes a voltage drop to occur that is proportional to the absolute temperature and to the logarithm of the ratio of the output current (I) to the input current (i) multiplied by the ratio of the respective characteristic current constant (is1) of the first transistor (T₁) and (is2) of the second transistor (T₂), which voltage drop is also proportional to the resistance ratio R₁/R₄.
- Current source as claimed in Claim 1, characterized in that the fourth transistor (T₄) is connected as a diode and in that the equalizing current (i₀) is selected as the next value of the input current (i).
- Current source as claimed in Claim 1, characterized in that the fourth series combination further comprises, between the fifth transistor (T₅) and the third resistor (R₄) the main current path of a sixth transistor (T₆) whose base and collector are cross-connected to the base and collector of the fourth transistor (T₄), and whose emitter has a surface area which is larger than that of the emitter of the fourth transistor (T₄).
- Current source as claimed in one of the Claims 1 to 3, characterized in that the third series combination is fed by a current which is substantially equal to the input current (i).
- Current source as claimed in one of the Claims 1 to 4, characterized in that the first series combination is connected to the output of a second current mirror circuit (T₁₄, T₁₅) which produces said input current (i) under the influence of an input resistor (R₅).
- Power amplifier, characterized in that it comprises a current source as claimed in Claim 5, in which the input resistor comprises a divider bridge (R'₅, R"₅) whose tap point constitutes the input (E) of the amplifier.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9012307 | 1990-10-05 | ||
FR9012307A FR2667703A1 (en) | 1990-10-05 | 1990-10-05 | SOURCE OF CURRENT WITH REPORT BETWEEN CURRENT OUTPUT AND INPUT. |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0479377A1 EP0479377A1 (en) | 1992-04-08 |
EP0479377B1 true EP0479377B1 (en) | 1996-01-03 |
Family
ID=9400979
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP91202505A Expired - Lifetime EP0479377B1 (en) | 1990-10-05 | 1991-09-26 | Current source with a given ratio between input and output currents |
Country Status (5)
Country | Link |
---|---|
US (1) | US5179357A (en) |
EP (1) | EP0479377B1 (en) |
JP (1) | JP3272749B2 (en) |
DE (1) | DE69116063T2 (en) |
FR (1) | FR2667703A1 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0539137B1 (en) * | 1991-10-21 | 2000-01-05 | Matsushita Electric Industrial Co., Ltd. | Amplifier |
DE4302221C1 (en) * | 1993-01-27 | 1994-02-17 | Siemens Ag | Integrated current source circuit using bipolar pnp transistors - uses current source connected to emitter of one transistor coupled in circuit with three transistors |
JP3091801B2 (en) * | 1993-02-09 | 2000-09-25 | 松下電器産業株式会社 | Current generator |
US7907012B2 (en) * | 2008-10-21 | 2011-03-15 | Analog Devices, Inc. | Current mirror with low headroom and linear response |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3886435A (en) * | 1973-08-03 | 1975-05-27 | Rca Corp | V' be 'voltage voltage source temperature compensation network |
IT1042763B (en) * | 1975-09-23 | 1980-01-30 | Ates Componenti Elettron | TEMPERATURE COMPENSATED CURRENT MIRROR CIRCUIT |
US4242650A (en) * | 1978-11-13 | 1980-12-30 | Bell Telephone Laboratories, Incorporated | Active variable equalizer |
JPS607845B2 (en) * | 1979-09-21 | 1985-02-27 | パイオニア株式会社 | amplifier |
JPS5646314A (en) * | 1979-09-21 | 1981-04-27 | Pioneer Electronic Corp | Equalizing amplifier |
US4354122A (en) * | 1980-08-08 | 1982-10-12 | Bell Telephone Laboratories, Incorporated | Voltage to current converter |
US4350904A (en) * | 1980-09-22 | 1982-09-21 | Bell Telephone Laboratories, Incorporated | Current source with modified temperature coefficient |
JPS59181811A (en) * | 1983-03-31 | 1984-10-16 | Toshiba Corp | Variable resistance circuit |
US4990803A (en) * | 1989-03-27 | 1991-02-05 | Analog Devices, Inc. | Logarithmic amplifier |
-
1990
- 1990-10-05 FR FR9012307A patent/FR2667703A1/en not_active Withdrawn
-
1991
- 1991-09-26 DE DE69116063T patent/DE69116063T2/en not_active Expired - Fee Related
- 1991-09-26 EP EP91202505A patent/EP0479377B1/en not_active Expired - Lifetime
- 1991-10-02 JP JP25523291A patent/JP3272749B2/en not_active Expired - Fee Related
- 1991-10-04 US US07/772,894 patent/US5179357A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE69116063T2 (en) | 1996-08-01 |
FR2667703A1 (en) | 1992-04-10 |
US5179357A (en) | 1993-01-12 |
DE69116063D1 (en) | 1996-02-15 |
JPH04289905A (en) | 1992-10-14 |
JP3272749B2 (en) | 2002-04-08 |
EP0479377A1 (en) | 1992-04-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FR2623307A1 (en) | TWO-TERMINAL CURRENT SOURCE WITH TEMPERATURE COMPENSATION | |
EP0680140B1 (en) | Differential amplifier with common mode control | |
EP0587509B1 (en) | Voltage-current converter circuit | |
FR2676149A1 (en) | DIFFERENTIAL AMPLIFIER, PARTICULARLY OF THE CASCODE TYPE. | |
FR2514214A1 (en) | VARIABLE GAIN CIRCUIT | |
EP0845856B1 (en) | High swing low noise transconductance amplifier | |
EP0649079B1 (en) | Regulated voltage generating circuit of bandgap type | |
FR2718259A1 (en) | Regulator circuit providing a voltage independent of the power supply and the temperature. | |
EP0479377B1 (en) | Current source with a given ratio between input and output currents | |
EP0524294B1 (en) | Amplification circuit with exponential gain control | |
FR2487605A1 (en) | GAIN CONTROL CIRCUIT | |
EP0533230B1 (en) | Differential amplifier and mixer oscillator incorporating the same | |
FR2677781A1 (en) | CURRENT SOURCE SUITABLE FOR QUICK VARIATIONS IN OUTPUT VOLTAGE. | |
EP0655176B1 (en) | Amplifier stage with low thermal distortion | |
FR2750515A1 (en) | TEMPERATURE REGULATED REFERENCE VOLTAGE GENERATOR | |
EP0998031A1 (en) | Current amplifier with low input impedance | |
EP0536063B1 (en) | Precision current generator | |
FR2471100A1 (en) | TELEPHONE LINE POWER CIRCUIT | |
EP0292071A1 (en) | Current mirror with a high output voltage | |
EP0903848A1 (en) | Symmetrical to asymmetrical signal conversion device | |
FR2684205A1 (en) | CURRENT MIRROR WITH LOW RECOPY ERROR. | |
EP0886382A1 (en) | Analog-to-digital converter | |
EP1102148A1 (en) | Low temperature corrected voltage generating device | |
FR2506043A1 (en) | Integrated voltage regulator with predetermined temp. coefficient - has series transistor stage where current imbalance drives feedback amplifier to correct output voltage error | |
EP2930583B1 (en) | Circuit for generating a reference voltage |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): DE FR GB IT |
|
17P | Request for examination filed |
Effective date: 19921123 |
|
RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: N.V. PHILIPS' GLOEILAMPENFABRIEKEN Owner name: PHILIPS COMPOSANTS |
|
17Q | First examination report despatched |
Effective date: 19940601 |
|
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): DE FR GB IT |
|
REF | Corresponds to: |
Ref document number: 69116063 Country of ref document: DE Date of ref document: 19960215 |
|
ITF | It: translation for a ep patent filed |
Owner name: ING. C. GREGORJ S.P.A. |
|
GBT | Gb: translation of ep patent filed (gb section 77(6)(a)/1977) |
Effective date: 19960321 |
|
REG | Reference to a national code |
Ref country code: FR Ref legal event code: CD |
|
PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
26N | No opposition filed | ||
REG | Reference to a national code |
Ref country code: FR Ref legal event code: TP |
|
REG | Reference to a national code |
Ref country code: GB Ref legal event code: IF02 |
|
REG | Reference to a national code |
Ref country code: GB Ref legal event code: 746 Effective date: 20020906 |
|
REG | Reference to a national code |
Ref country code: FR Ref legal event code: D6 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: FR Payment date: 20030926 Year of fee payment: 13 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: GB Payment date: 20030930 Year of fee payment: 13 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: DE Payment date: 20031126 Year of fee payment: 13 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: GB Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20040926 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20050401 |
|
GBPC | Gb: european patent ceased through non-payment of renewal fee |
Effective date: 20040926 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: FR Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20050531 |
|
REG | Reference to a national code |
Ref country code: FR Ref legal event code: ST |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: IT Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES;WARNING: LAPSES OF ITALIAN PATENTS WITH EFFECTIVE DATE BEFORE 2007 MAY HAVE OCCURRED AT ANY TIME BEFORE 2007. THE CORRECT EFFECTIVE DATE MAY BE DIFFERENT FROM THE ONE RECORDED. Effective date: 20050926 |