EP0392551A2

EP0392551A2 - Window priority encoder

Info

Publication number: EP0392551A2
Application number: EP90107080A
Authority: EP
Inventors: Joseph H. Colles; Dale S. Roark
Original assignee: Brooktree Corp
Current assignee: Mindspeed Technologies LLC
Priority date: 1989-04-14
Filing date: 1990-04-12
Publication date: 1990-10-17
Also published as: CA2013615A1; EP0392551A3; JPH03206492A; CA2013615C

Abstract

Color index data for a first image and one or more second images is stored in a frame buffer memory and is introduced to an address register of a color palette random access memory. The data from the second images is to be displayed in separate windows on a visual display screen. The palette memory addresses selected by the color index data contain digital information determining the true color to be displayed in each window. Such is introduced to a different range of palette memory addresses. Data from a microprocessor bus indicating the start-stop coordinates of each second image window in coordinate directions is introduced to comparison registers for the palette random access memory. Because windows may overlap, each window is assigned a priority according to the identity of the register containing the start-stop coordinates of the window. These control registers provide, to the palette memory address register, additional address data that is combined with the color index data and introduced to an address decoder that selects the desired palette location. Thus the register data determines the range of palette memory addresses to be selected and the color index data determines the palette location within the range. The true color data in each palette location can be updated at any time by microprocessor data introduced to a slow port. Additional microprocessor data introduced to the control registers can cause a flood color pallet address to be accessed when the display is within the start and stop coordinates of a given window. This flood color may be used to mask the display of the image in the frame buffer when it is being modified.

Description

This invention relates to apparatus for displaying a first visual image on a visual display screen and for displaying a second visual image in a window at a particular position on the visual display screen. The invention also relates to apparatus for displaying a first visual image on the visual display screen and second visual images in different windows on the visual display screen and for establishing a priority between the different windows when there is an overlap between the areas occupied on the visual display screen by different ones of the second visual images.
Displays of visual images are provided on a visual display screen in various types of equipment. For example, displays are provided on visual display screens associated with personal computers and with work stations for providing computer aided designs. Some of these computers and work stations also provide a display of a second image in a window on the visual display screen. For example, the second image may involve the display of a second work application. In this way, the viewer may see a second image resulting from the operation of other software associated with the second image and not the first visual image while the first image is being displayed on the visual display screen.
The systems now in use for displaying several second visual image in a window on a visual display screen in conjunction with the display of the first visual image on the screen have certain disadvantages. One disadvantage results from the fact that such systems require several bit planes to store the color index information for each pixel of the first and second visual images and also require one or more additional bit planes to store the binary coded window number corresponding to each pixel of the visual image in the window. This window number is required to select the range of addresses in the color palette memory that should be used to properly display the color index data from each window. Bit planes are relatively expensive. They also occupy a significant amount of space and limit the ability of the display system to be as compact as would otherwise be desired.
There are other disadvantages to systems employing additional planes of frame buffer to indicate the window number of each pixel. These disadvantages result from the fact that there are both software and writing time overheads required to rewrite changes to window number data in each pixel location of the additional frame buffer planes.
The limitations discussed in the previous paragraphs have existed for some time. This has been true even though the use of window displays on visual display screens has gradually received widespread acceptance in personal computers and work stations for providing computer aided designs. Because of this widespread aceptance, the limitations in the systems now in use for providing visual displays in at least one window on a visual display screen have received progressively expanded attention. Specifically, a large amount of effort has been devoted, and significant amounts of money have been expended, to resolve the limitations discussed above. However, such efforts and money expenditures have not been fruitful.
This invention provides a system which eliminates the disadvantages discussed above. The system does not require the rewriting of changes to the window identification number at each pixel location in the frame buffer as required in the prior art. Because of this, the system can operate faster, with fewer bit planes and with a lower software overhead, than in the prior art to provide a display of a first visual image on a visual display screen and to provide displays, respectively, of one or more second images in a window or different windows on the display visual screen. The system of this invention provides a novel arrangement of comparison registers to control the operation of the color pallet memory in accordance with the start and stop coordinates of each second visual image window.
The palette memory addresses selected by the color index data contain digital information that determines the true color to be displayed in each window. The color index data for each image stored in the frame buffer is introduced to a different range of palette memory addresses. This is because it is desirable to provide different palette colors corresponding to the color index data in each window. For example, an 8 plane frame buffer can provide 256 different color index numbers. To provide a different set of palette colors for each of four different windows, a total of 1024 palette memory addresses is provided. This corresponds to four sets or ranges of the 256 palette locations.
The true color data in each palette location can be updated at any time by microprocessor data introduced to a slow port. The palette memory has a separate range of palette addresses corresponding to the number of each window. Selection of the range of addresses is provided by the comparison registers while selection of the palette location within each range is provided by the color index data from the frame buffer. Thus the comparison register data determines the range of palette memory addresses to be selected, and the color index data determines the palette location within the range.
Another novel aspect of the comparison registers is that they are physically arranged in an order that corresponds to the priority of the window being displayed. Data from a microprocessor bus indicating the start and stop coordinates of each second visual image window in both x and y directions is introduced to these comparison registers.
Because windows may overlap, each window is assigned a priority according to the identity of the control register containing the start and stop locations of the window. In the case of an overlap, only the window number with the highest priority is allowed to control the address range of the palette memory. That control is provided by supplying additional address bits to the address registers of the palette memory. Those bits are combined with the color index data and introduced to an address decoder that selects the desired palette location.
The control of the address range in the palette memory by the priority encoder eliminates the prior art requirement of additional bit planes in the frame buffer to identify the window number of the color index information being displayed.
Additional microprocessor data introduced to the control registers can cause a single flood color pallet address to be accessed when the display is within the start and stop coordinates of a given window. This flood color may be used to mask the visual display of the image in the frame buffer when it is being modified.
In the drawings:

Figure 1 is a schematic circuit diagram, primarily in block form, of a system in the prior art for providing a display of a visual image on a visual display screen;
Figure 2 is a schematic circuit diagram, primarily in block form, of a system constituting one embodiment of this invention for providing a display of a first visual image on a visual display screen and a display of one or more second images in a window or windows on the visual display screen; and
Figure 3 is a schematic circuit diagram, primarily in block form, showing additional details of a window priority encoder included in the circuit diagram of Figure 2 when there is more than one window on the visual display screen.

An embodiment of the prior art is shown in Figure 1. In this embodiment, color index data from a frame buffer is provided in the form of signals on a plurality of lines 10. These lines are indicated as the data bus A0-A7. Each line A0-A7 represents an address bit of a different binary value. Additional lines 11 and 13 providing address bits A8-A9 are also shown in Figure 1. The binary value represented by these bits corresponds to a color palette address to be selected in a color palette in a random access memory (RAM) 12. The color to be displayed when a given palette address is selected is stored at each palette address in the memory.
The signals on the data bus 10 and the lines 11 and 12 are introduced to an address register 14. The address register 14 is included in a fast port such as disclosed and claimed in co-pending application Serial No. 810,911 filed on November 5, 1985, by Michael Brunolli for a Transducing System" and assigned of record to the assignee of record of this application. The fast port is able to read color information from, but not write information in, the color palette.
The signals in the register 14 are decoded by an address decoder 16 and the decoded signals are introduced to the color palette in the random access memory 12. Each palette address in the random access memory can store one of a range of millions of different colors. For example, the Bt458 chip manufactured and sold by applicant's assignee has a random access memory with a 24 bit word at each palette address. This word can provide in excess of sixteen million (16,000,000) different colors.
The signals from the decoder 16 select individual ones of the color data words in the color palette. These color data words are represented by a plurality of binary bits for the primary colors red, green and blue. For example, in the Bt458 chip, eight (8) binary bits are provided for each of the primary colors. The binary bits for each of the primary colors are introduced to an individual one of a plurality of digital-to-analog converters 18. These converters convert the binary bits for each color to a corresponding analog signal. The analog signals are introduced to the individual guns in a visual display screen 20 to produce a particular color in a pixel being scanned on the visual display screen. The selection of the different colors in the color palette for display as successive pixels on the visual display screen 20 is controlled by the address decoder 16.
The microprocessor 24 controls the updating of the colors in the color palette. For example, it may be desired at times to substitute one color for another color at a particular one of the color locations in the color palette. This is accomplished by instructions to this effect from the microprocessor 24 to a slow port indicated at 26 in Figure 1. This slow port is able to write information in, or read information from, the color palette.
The slow port 26 operates at a frequency lower than the fast port and on an asynchronous basis relative to the clock signals which synchronize the operation of various stages in the system including the address register 14, the address decoder 16, the visual display screen 20 and the microprocessor 24. The frequency of the clock signals may be as high as, or even exceed, two hundred megahertz (200 MHz). The fast port controlling the selection of colors from the color palette for display on the visual display screen 20 operates at this clock frequency. A video clock generator 26 synchronizes the operation of the address register 14. This video clock pulse is also introduced to the address register 14 to synchronize the operation of the address register with the operation of the visual display screen 20.
The system of Figure 1 may also provide for the display of additional visual images in windows on the visual display screen 20. This second visual image may involve the display of a second work application. In the prior art, two additional memory planes (not shown) have been included to store (or encode) signals A8 and A9 representing the window number (0 to 3). The palette location to be used has been lodged into these additional planes on a pixel-by-pixel basis. When a window has been moved, the window data in the additional bit planes has had to be changed for every pixel in the window. When more than four windows have been provided on the visual display screen 20, more than two (2) additional bit planes have had to be used. As will be seen, the cost of providing the windows has been high since the cost of a bit plane is high.
Figures 2 and 3 illustrate a system for overcoming the disadvantages discussed in the previous paragraph. In the embodiment shown in Figure 2, signals representing color index data are received on lines 50 from a frame buffer and are introduced to an address register 52 in a manner similar to the prior art embodiment shown in Figure 1. The signals introduced to the address register 52 from the lines 50 are designated as A0-A7 when the signals represent eight (8) binary bits. The signals in the address register 52 are decoded by an address decoder 54 in a manner similar to that shown in Figure 1 and described above. The address register 52 and the address decoder 54 are included in a fast port which operates at the frequency of the video clock signals in the system.
The signals on the lines 50 from the frame buffer represent the information for a first visual image and one or more second visual images. The first visual image may cover the entire area of a visual display screen 56 corresponding to the visual display screen 20 in Figure 1. The second visual images 20. may appear in individual windows on the visual display screen
Instead of providing the window identification number on additional bit planes as in the prior art system of Figure 1, the embodiment shown in Figure 2 provides a plurality of color palettes on a memory 58. These color palettes do not require additional bit planes for selection. Each color palette may contain two hundred and fifty six (256) colors each represented by a twenty four (24) bit word. Eight (8) of these bits are used to identify the particular intensity of the primary color red, eight (8) to identify the particular intensity of the primary color green (8) and eight (8) to identify the particular intensity of the primary color blue. The operation of the address register 52 and the visual display screen 56 is synchronized by a video sync generator 60 in a manner similar to that shown in Figure 1 and described above.
The operation of the system of Figure 2 is controlled by a microprocessor 62 in a manner similar to that shown in Figure 1. When a color in one of the palettes in the memory 58 is to be replaced by an updated color, the microprocessor 62 introduces signals to a slow port 64. The slow port 64 operates on a slow and asynchronous basis relative to the video clock signals which are provided by the video clock generator 60 to synchronize the operation of various stages including the address register 52 and the address decoder 54. The slow port then introduces this updated color into the appropriate address of the particular palette in the memory 58. When the address register 52 and the address decoder 54 in the fast port thereafter select this position in the particular palette in synchronism with the clock signals, this updated color is displayed on the visual display screen 56.
The system shown in Figure 2 also includes a window priority encoder 66 which performs several unique operations in response to the signals from the microprocessor bus interface 62. The priority encoder 66 determines the position of each window on the visual display screen 56. The priority encoder 66 also establishes a priority between the individual windows when there is complete or partial overlap between the positions of more than one (1) window on the visual display screen 56. In this way, only one (1) visual image can be displayed at any position on the visual display screen 56.
The priority encoder 66 may also operate to flood all of the pixel positions in a window with the same color when the microprocessor 62 provides a flood bit. This prevents improper information from being displayed in that window. It may also be used to prevent glitches from occurring in a visual display in such window when that window is being updated. Furthermore, if there is an overlap, either partially or completely, between this window and another window, the priority encoder floods the pixel positions in this window with the same color only when this window has a higher priority than the other window.
Figure 3 shows the priority encoder 66 in further detail. In Figure 3, an interface in the microprocessor 62 pulls data from the microprocessor bus and sends it on bus 72 to section 70 entitled "microprocessor data router". This section reads the signals on the bus 72 from the microprocessor interface and processes these signals to control the operation of various stages in the priority encoder 66. For example, the x and y start and stop data are introduced on lines 73 to comparison registers 74. These signals represent data identifying the location and size of each window. Similarly, the window identification and flood control bits are routed through lines 79 to a block 80.
The location of each window is identified by the start position and the stop position of such window in the raster scan. The start position for the window is identified on the data bus 72 by the microprocessor data router 70 on the data bus bus 72 by data tags associated with an x start location and a y start location. The stop position for such window is also identified in the microprocessor data router 70 by data tags associated with an x stop location and a y stop location. The data tags include an additional four (4) bits of data that identify the location (positions 0 to 15 shown in Figure 3) of the particular comparison register to receive the start and stop data. While the data identifying the start and stop positions present enough information for one of the comparison registers 74 to locate precisely the position and size of the window, the position of the register in the stack will later determine the priority of the window. Priority is higher for registers with lower numbers.
The comparison registers 74 also receive signals from a video pixel address register 76. These signals represent at each instant the x and y coordinates in the raster scan. The operation of the video pixel address register 76 is controlled at each instant by the horizontal and vertical sync pulses on a line 77 and by the video clock signals on a line 79. The address register 76 includes an x counter and a y counter. The x counter counts the number of clock signals in each horizontal line in the raster scan. This counter is reset to a value of "0" by the horizontal sync pulse. The y counter counts the number of horizontal lines by counting the number of horizontal sync pulses. It is reset by the vertical sync pulse. As in the embodiment in Figure 1, the vertical sync pulse is represented by two successive horizontal sync pulses. In this way, the video pixel address register 76 is able to indicate the precise position, in the x and y coordinate directions, at which the pixel position is being scanned on the visual display screen 56 at each instant.
The comparison registers 74 compare the x and y start and stop data loaded from the microprocessor data router 70 with the x and y pixel address signals from the video pixel address register 76 for each window and produce output signals on lines 75 for such window when the comparison register determines that the x and y pixel address is within the x and y start and stop locations for the window. These signals occur for each of the different windows in the system. The priority for each of these different windows is indicated by an integer between the numerals "0" to "15" to the left of the block designated as "comparison registers" and these priorities are assigned to the individual registers indicated as being between the broken lines within the block.
The signals from the comparison registers 74 are introduced to priority encoders 78 corresponding in number to the number of comparison registers. The different priority encoders are indicated by broken lines within the block designated as "priority encoders". The priority encoders 78 determine the order of priority among the different windows when there is complete or partial overlap between the positions of such windows. For example, the order of priority may be on a descending scale in Figure 3 such that the window designated as "0" has the highest priority and the window designated as "15" has the lowest priority.
The microprocessor data router 70 also produces data which identify each window and which represent the flood control for such window. The window identification signals are introduced to window identification and flood registers 80 to identify each window on a digital basis. The location of the register in block 80 to receive the identification and flood data is determined by a four bit data tag containing the register number as was the case in loading registers in block 74. For example, when only four windows (identified as "A0-A3") are used, two binary signals identified as "A8" and "A9" distinguish the four windows from one another on the basis of a binary code. These signals are introduced to lines 82 designated as "A8" and "A9". As indicated in Figure 2, these signals are introduced to the address registers 52 to activate the individual address registers on a selective basis dependent upon the individual windows in which individual data is to be displayed.
In this way, an address such as the address register 14 becomes activated to route the color index data signals on the lines 50 only to the range of palette address corresponding to the window identified in register block 80. Although sixteen (16) registers are shown in the comparison registers 74 in Figure 3, the signals A8-A9 distinguish only between four different windows. Because of this, the system shown in Figure 3 is able to provide only four (4) windows. In order to provide a distinction between sixteen (16) different windows, four (4) lines A8-A11 would have to be provided. This is considered to be within the knowledge of a person of ordinary skill in the art on the basis of the disclosure in this application.
The window identification and flood registers 50 also receive from the microprocessor data router 70 signals identifying the individual windows to be flooded with a substantially constant color. This flooding signal for each individual one of the registers 80 may be identified by a binary "1". This signal for each register may be produced on a line 84 for introduction to a single flood color word in the color palette as indicated in Figure 2, only when a window with corresponding flood control bit set to one has the highest priority. For example, it may sometimes happen that two (2) or more windows overlap partially or completely but that the flood control bit is set to 1 only for one of these overlapping windows. Under these circumstances, the overlapping window with the highest priority controls the display. For example, one of the overlapping windows has a flood bit set to 1 but another window with a higher priority has a flood bit set to 0. Under such circumstances, the overlappng window without the flooding signal would control and the flood bit for the other one of the overlapping windows would be ignored.
The system described above and constituting this invention has certain important advantages. It requires no extra bit planes of memory to hold window identification data, thereby minimizing the cost of the system. The system also provides a simple and reliable arrangement for addressing the different color palettes associated with each window. This is accomplished by providing start and stop information for the x and y coordinates for each window to indicate the location and boundaries of that window and by comparing this information with the current x and y pixel address of the visual display.
The system of this invention also has other important advantages. When more than one (1) window is provided on the visual display screen 20, the system provides a priority between the different windows. This is important when there is a partial or complete overlap in position between more than one (1) window on the visual display screen. Under such circumstances, only the visual image in the window of highest priority is displayed at any particular location on the visual display screen. The establishment of a priority for the different windows is also beneficial with respect to the flooding signal. As a result of this priority, a flood control bit signal for a particular window will be used to provide a flooding of such window only when the particular window has a higher priority than any other window which overlaps partially or completely with the particular window.
Yet another important benefit results from the use of such a system. Because the window identification and priority information is introduced to the system via a microprocessor bus, the system is compatible with data produced by prior art systems shown in Figure 1. More important is that the new system can be used to upgrade prior single window requiring additions to the color index data bus 50 or the microprocessor data bus 63.
Although this invention has been disclosed and illustrated with reference to particular embodiments, the principles involved are susceptible for use in numerous other embodiments which will be apparent to persons skilled in the art. The invention is, therefore, to be limited only as indicated by the scope of the appended claims.

Claims

1. Apparatus for providing a display of a first visual image on a video display screen and an overlay of a second visual image in a window on the videa display screen, comprising:
means for defining an address register,
means for providing for the loading of data relating to the first and second visual images in the address register at particular positions on the video display screen and for providing for the loading of the data relating to the second visual images in the address register at positions corresponding to the window in the visual display screen,
means for decoding the information loaded in the address register,
memory means for providing color palettes each storing a plurality of individual colors,
means responsive to the decoded information for selecting
particular colors in the color palette individual to each of the first and second visual images, and
means for recording the selected colors for the first visual image on the visual display screen and for recording the selected colors for the second visual image in the window on the video display screen.

2. Apparatus as set forth in claim 1, comprising:
means for providing a second color palette, and
means for selecting colors from the second color palette for recording in a second window on the video display screen.

3. Apparatus as set forth in claim 1, comprising:
means for providing signals indicating the disposition and size of the window in x and y directions coordinate with each other, and
means responsive to the signals indicating the disposition and size of the window for providing for the loading and the address register in accordance with such information and in coincidence with the location of the window on the visual display screen.

4. Apparatus for providing a display of a first visual image on a visual display screen and an overlay of a second visual image on the first visual image in a widow on the visual screen, comprising:
means for providing a raster scan of the visual display in x and y coordinate directions and for providing a horizontal sync signal in each horizontal scan and for providing a vertical sync signal at the end of each raster scan,
means for providing signals representing the disposition of the window in the x and y coordinates,
means for providing signals representing the first and second visual images,
register means responsive to the signals representing the window disposition and the signals representing the second visual image for addressing the signals representing the second visual image,
means for decoding the signals in the register means, and
means responsive to the decoded signals for providing for the display of the first visual image on the visual display screen and the display of the second visual image in the window on the visual display screen.

5. Apparatus as set forth in claim 4, comprising:
a memory including first and second color palettes each storing a plurality of individual colors,
the display means for the first visual image being operative to select colors from the first palette to provide for the display of the first visual image on the visual display screen, and
the display means for the second visual image being operative to select colors from the second palette to provide for the display of the second visual image in the visual display screen.

6. Apparatus as set forth in claim 5, comprising:
means for updating the color information in the second color palette, and
means for providing for a flooding of the second visual image in the window of the visual display screen to obtain a visual appearance of a substantially constant intensity in the window.

7. Apparatus for providing a display of a first visual image on a visual display screen and an overlay of a second visual image on the first visual image in a window on the visual display screen, comprising:
means for providing signals representing the first and second visual images,
memory means including first and second palettes each storing information representing a plurality of individual colors,
means responsive to the signals representing the first visual image for selecting individual colors from the first palette for introduction to the visual display screen,
means for introducing to the visual display screen the individual colors selected from the first palette to obtain a display of such colors on the visual display screen,
means for providing signals representing the second visual image,
means responsive to the signals representing the second visual image for selecting individual colors from the second palette for introduction to the display screen, and
means for introducing to the visual display screen the individual colors selected from the second palette to obtain a display of such colors in the window on the visual display screen.

8. Apparatus as set forth in claim 7, comprising:
means for providing signals defining the position of the window on the visual display screen, and
means responsive to the signals defining the position of the window in the visual display screen and to the signals representing the second visual image for providing for the location of the window at the defined position on the visual display screen and the display of the second visual image in the window on the visual display screen.

9. Apparatus as set forth in claim 8, comprising:
means for providing for updates in the individual colors stored in the first and color palettes in the memory means.

10. Apparatus as set forth in claim 9, comprising:
means for providing for a flooding of the colors in the window with a substantially constant color.

11. Apparatus for providing a display of a first visual image on a visual display screen and an overlay of second visual images on the first visual image in windows on the visual display screen, comprising:
means for providing signals representing the first and second visual images,
memory means including a plurality of color palettes each storing information repersenting a plurality of individual colors, the signals for each of the visual images being associated with an individual one of the palettes,
means responsive to the signals representing the first visual image for selecting individual colors from a first one of the color palettes,
means for introducing to the visual display screen the individual colors selected from the first palette to obtain a display of such colors on the visual display screen,
means responsive to the signals representing each of the second visual images for selecting individual colors from an individual one of the palettes associated with such second visual image, each
means for introducing to each of the windows on the video display screen the individual colors selected from the associated palette for an individual one of the second visual images, and
means for establishing priorities between the visual displays in different windows on the visual display screen in the instances where there is at least a partial overlap between such different windows.

12. Apparatus as set forth in claim 11, comprising:
means for providing signals defining the location and size of each of the windows, and
means responsive to the signals defining the location and size of each window for providing for the location of such window at the defined position and in the defined size.

13. Apparatus as set forth in claim 11, comprising:
means for providing for an updating in the colors stored in each palette in the memory, and
means for flooding each window with a color of a substantial intensity.

14. Apparatus as set forth in claim 13, comprising:
means for providing a raster scan of the visual display screen in x and y coordinate directions to provide a visual display of the first image and the second images on the visual display screen,
means for providing signals defining the start and stop of each window in the x and y coordinate directions on the video display screen, and
means responsive to the signals defining the start and stop of each window for using such signals to locate the position and size of each window on the visual display screen.

15. Apparatus for providing a display of a first visual image on a visual display screen and an overlay of a second visual image on the first visual image in a window on the visual display screen, comprising:
means for providing signals representing the first and second visual images,
means for providing a repetitive raster scan of the visual display in x and y coordinate directions, the raster scan involving successive scans of the visual display in the x direction in progressive positions in the y direction and each of the scans in the x direction being referenced by a horizontal sync pulse and each initiation of a new raster scan being referenced by a vertical sync pulse,
means for providing for each of the visual images signals defining first x and y coordinates for the start of the window for such visual image and defining second x and y coordinates for the stop of such window,
means for decoding the signals representing the second visual images, and
means responsive to the decoded signals and the signals defining the start and stop of the window in the visual display for the second visual image for recording such second visual image in the window on the visual display screen.

16. Apparatus as set forth in claim 15, comprising:
register means responsive to the signals representing the second visual image and the signals identifying the start and stop of the window for the second visual image for receiving the signals representing the second visual image during the raster scan of the window on the visual display screen, and
the decoding means being responsive to the signals received by the register means for decoding such received signals.

17. In a combination as set forth in claim 16, memory means for the color information, the memory means including a color palette for providing a plurality of different colors,
the signals for the second visual image being selected from the color palette,
means for updating the colors in the color palette, and
means for flooding the window with a substantially constant color during the updating of the colors in the color palette.

18. Apparatus for providing a display of a first visual image on a visual display screen and an overlay of second visual images on the first visual image in windows on the visual display screen, comprising:
means for providing signals representing the first and second visual images,
means for decoding the signals representing the first visual image,
means responsive to the decoding signals for providing for the display of the first visual image on the visual display screen,
means for providing signals individually representing different ones of the second visual images and the positions and sizes of the windows on the visual display screen for such second visual images,
means for providing for the decoding by the decoding means of the signals representing the individual one of the second visual images and the signals representing the positions and sizes of the windows for such second visual images,
means for providing for the display of such second visual images in the windows on the visual display screen, and
means for establishing priorities between the displays of the second visual images in the windows on the portions of the visual display screen when there is an overlap between the different windows.

19. Apparatus as set forth in claim 2, comprisng:
priority establishing means including a plurality of register means each operative to indicate the positions of an individual one of the different windows for the second visual images and further including means for establishing priorities between different register means when there is an overlap between such different windows on the visual display screen.

20. Apparatus as set forth in claim 19, comprising:
means for providing signals to obtain a flooding of individual windows with light of a particular intensity,
means responsive to the signals representing the flooding of the individual ones of the windows for flooding such individual windows with the light of the particular intensity, and
means for preventing the flooding of the selected ones of the individual windows when there is an overlap between such selected windows and other ones of the windows and such other ones of the windows have a higher priority than the selected windows.

21. Apparatus for providing a display of a first visual image on a visual display screen and an overlay of second visual images on the first visual image in windows on the visual display screen,
means for providing signals representing the first and second visual image,
means for providing a repetitive raster scan of the visual display screen in x and y coordinate directions, the raster scan involving successive scans of the visual displax in the x direction in progressive positions in the y direction and each of the scans in the x direction being referenced by a horizontal sync signal and each initiation of a new raster scan being referenced by a vertical sync signal,
means for providing for each of the second visual images signals defining first x and y coordinates for the start of the window such second visual image and defining second x and y coordinates for the stop of such window,
means for decoding the signals individually representing each of the first and second visual images,
means responsive to the decoded signals for each of the second visual images and the signals defining the start and the stop of the associated window on the visual display screen for recording such second visual image in such associated window on the visual display screen, and
means for establishing a priority in the selection of a particular one of the second visual images to be displayed on the visual display screen when there is an overlap between the display of such particular image and at least another one of the second visual images.

22. Apparatus as set forth in claim 21, comprising:
memory means including a plurality of color palettes each operative to store color information for an individual one of the first and second visual images,
means for updating the color information at particular positions in individual ones of the palettes, and
means for flooding each individual window with a color of a particular intensity.

23. Apparatus as set forth in claim 22, comprising:
means responsive to the established priority for flooding only the window with the highest priority when there is an overlap between the visual display in such window and in another one of the windows on the visual display screen.

24. Apparatus as set forth in claim 23, comprising:
register means responsive to the signals representing the color information for each of the second visual images and the signals defining the start and stop of the window for such visual image for controlling the passage of such color information during the occurrence of such window, and
the decoding means being operatively coupled to the register means for decoding the color information signals for each of the second visual images during the occurrence of the window for such visual image.

25. Apparatus as set forth in any one of claims 1, 4, 15 and 18, comprising:
means for flooding of the window(s) with light of a particular intensity.