EP0343719B1 - Signal-generating circuit - Google Patents
Signal-generating circuit Download PDFInfo
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- EP0343719B1 EP0343719B1 EP89201243A EP89201243A EP0343719B1 EP 0343719 B1 EP0343719 B1 EP 0343719B1 EP 89201243 A EP89201243 A EP 89201243A EP 89201243 A EP89201243 A EP 89201243A EP 0343719 B1 EP0343719 B1 EP 0343719B1
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- European Patent Office
- Prior art keywords
- current control
- current
- circuit arrangement
- control elements
- negative feedback
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- 239000004065 semiconductor Substances 0.000 description 4
- 239000002800 charge carrier Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
- G06G7/14—Arrangements for performing computing operations, e.g. operational amplifiers for addition or subtraction
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
- G06G7/26—Arbitrary function generators
Definitions
- the invention relates to a circuit arrangement for forming an output signal as a linear combination of a number of input signals.
- German patent application P 37 20 871.3 describes an arrangement in which three signals are amplified in amplifier stages by certain factors and the signals thus obtained are summed.
- each amplifier stage comprises a pair of two differential amplifier transistors which are negatively coupled via a resistor and whose emitter connections are fed by current sources.
- the control connection of one of the differential amplifier transistors is connected to a reference voltage source.
- the object of the invention is to simplify the circuit arrangement described and to create a space-saving circuit arrangement, in particular with regard to improved integration capability on a semiconductor crystal.
- This object is achieved according to the invention by a number of current control elements corresponding to the number of input signals, the main current paths of which are connected on one side with taps of a chain of negative feedback resistors and on the other side alternately with a first and a second output connection with respect to the sequence of the taps, with each current control element at its control connection having one of the input signals can be fed, and wherein the parallel connection of those immediately following the tap for the current control element Negative feedback resistors is dimensioned according to the factor by which the input signal is weighted in the linear combination.
- each of the current control elements is connected to at least one current element adjacent via a negative feedback resistor to form an arrangement corresponding to a differential amplifier.
- the current control elements adjacent to a current control element are always connected to the other of the two output connections and act in their parallel connection as a second branch, ie as a reference branch, of the differential amplifier arrangement, the signal branch of which is formed by the first-mentioned current control element.
- the circuit arrangement can form branched and unbranched configurations corresponding to branched or unbranched chains of negative feedback resistors.
- Each of the arrangements formed by a current control element and its adjacent current control elements represents a differential amplifier, i.e. a differential amplifier with current negative feedback, which is amplified for the input signal supplied to the individual current control element by the resistance value of the negative feedback resistor or, in the case of several adjacent current control elements, by the resistance value the parallel connection of the immediately following negative feedback resistors is given.
- the influence of the other current control elements and negative feedback resistors can be neglected.
- the negative feedback resistances are now dimensioned according to the invention in accordance with the relationships described.
- a multi-phase voltage and current converter circuit with at least three transistors is known from Japanese application 58-101311, the base connections of which are supplied with the multiphase voltages and output currents are obtained at the collector connections thereof. With this circuit, the conversion accuracy should be increased.
- the circuit contains a resistor between two emitter connections of the transistors and a current source from each of the emitter connections to a common, negative circuit point. With this circuit arrangement, neither a linear combination of the input signals is formed, nor is a configuration and dimensioning of the chain of negative feedback resistors in accordance with the invention, which is oriented to this, excited.
- Semiconductor components in particular transistors, are preferably used as current control elements; the circuit arrangement according to the invention can thus be integrated; however, it can also be constructed with amplifier tubes.
- Working current direct currents are advantageously fed to the current control elements designed as transistors at the taps of the chain of negative feedback resistors, as a result of which a simple and exact working point setting of the circuit arrangement is obtained. If, in particular, the values of the operating point direct currents are in the same ratio to one another as the effective cross-sectional areas of the main current paths of the current control elements, the same current densities and thus the same potential relationships are achieved in them and thus a symmetrically operating arrangement is obtained.
- the effective cross-sectional area of a main current path is understood to mean the cross-section effective for controlling the current in the main current path of the current control element, i.e. for example, the area of the charge carrier channel effective for current control in a field effect transistor or the semiconductor cross-sectional area through which the collector-emitter current flows in a bipolar transistor.
- the symmetrical mode of operation of the circuit arrangement is improved in that the sums of the values of the operating point direct currents of the current control elements connected to the first and to the second output terminal correspond.
- This current symmetry leads to a voltage symmetry even in the case of circuit elements which are connected to the current control elements and through which the currents flow in their main current paths.
- the difference between the operating point direct currents disappears at the output connections, and symmetrical direct current operating points result there.
- n current control elements 11, 12, 13, 14, ..., 1n in this case designed as bipolar NPN transistors. These are connected at their emitter connections to taps 41, 42, 43, 44, ..., 4n of a chain of negative feedback resistors R1, R2, R3, ..., Rn-1, which is chosen unbranched for the sake of simplicity.
- the transistors 11, ..., 1n, whose collector-emitter paths form the main current paths of the current control elements, are connected with their collector connections with respect to the order of the taps 41, ..., 4n alternately to a first output connection 31 and a second output connection 32 .
- the transistors 11, ..., 1n are supplied with input signals S1, S2, S3, S4, ..., Sn.
- the transistor 11, ..., 1n assigned to each of the input signals S1, ..., Sn acts with the adjacent transistor (s) as a differential amplifier, the adjacent transistor (s) for the relevant transistor Input signal occurs as a reference branch.
- the gain of this differential amplifier which forms the factor by which the input signal in question is weighted in the linear combination forming the output signal at the output connections 31, 32, is determined by the parallel connection of the included negative feedback resistors.
- the sign with which the input signal enters the output signal is determined from the assignment of the collector connection of the associated transistor to the first and to the second output connection 31 and 32, respectively.
- the transistors 11, ..., 1n are fed to the taps 41, ..., 4n operating point direct currents I1, I2, I3, I4, ..., In, which are supplied by current sources 51, 52, 53, 54, ... , 5n are generated.
- the operating point direct currents I1, ..., In are selected in the same size ratio as the effective cross-sectional areas A1, ..., An. As a result, the same operating point potentials are obtained on the taps 41, ..., 4n and the current control elements 11, ..., 1n, in particular also on the base connections 21, ..., 2n.
- Fig. 2 shows a special embodiment of the invention with three current control elements 11, 12, 13, which are again designed as bipolar NPN transistors.
- This example represents a special case of the arrangement according to FIG. 1, in which the number n has been set to the value 3.
- Elements corresponding to FIG. 1 are provided with identical reference symbols in FIG. 2.
- the current sources 51, 52, 53 are each formed by a current source transistor and a current source resistor connected to its emitter connection, the current source transistors at their base connections being controlled by a common reference voltage.
- This common control of the current sources 51,..., 5n can also be carried out in the arrangement according to FIG. 1 and ensures good working point stability, for example in the event of temperature fluctuations in the circuit arrangement or due to manufacturing tolerances.
- the negative feedback resistors R1 and R2 have matching resistance values, while the effective cross-sectional area A2 of the second current control element 12 with the value 2 ⁇ A is selected to be twice as large as the effective cross-section areas A1 and A3 with the value A.
- the effective cross-sectional areas of the current source transistors of the associated current sources 51, 52, 53 are dimensioned accordingly, and the current source resistance of the current source 52 assigned to the second current control element 12 has half the resistance value of the current source resistors 51 and 53.
- a working point direct current I2 then flows in the second current control element 12, the current strength of which is twice as large as 2 x I as the current strength I of the working point direct currents I1 and I3.
- the output connections 31, 32 are preferably connected to a DC supply voltage connection via load resistors or other signal processing stages, which may also include current mirror arrangements, for example. Due to the symmetry of the operating point direct currents in the output connections 31, 32, matching working resistances can be selected and a symmetrical voltage can be tapped as an output signal.
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Description
Die Erfindung bezieht sich auf eine Schaltungsanordnung zum Bilden eines Ausgangssignals als Linearkombination einer Anzahl von Eingangssignalen.The invention relates to a circuit arrangement for forming an output signal as a linear combination of a number of input signals.
In der deutschen Patentanmeldung P 37 20 871.3 ist eine Anordnung beschrieben, bei der drei Signale in Verstärkerstufen um bestimmte Faktoren verstärkt und die so gewonnenen Signale summiert werden. Dabei umfaßt jede Verstärkerstufe ein über einen Widerstand gegengekoppeltes Paar aus zwei Differenzverstärker-Transistoren, deren Emitteranschlüsse durch Stromquellen gespeist werden. Der Steueranschluß jeweils eines der Differenzverstärker-Transistoren ist an eine Referenzspannungsquelle geführt.German patent application P 37 20 871.3 describes an arrangement in which three signals are amplified in amplifier stages by certain factors and the signals thus obtained are summed. In this case, each amplifier stage comprises a pair of two differential amplifier transistors which are negatively coupled via a resistor and whose emitter connections are fed by current sources. The control connection of one of the differential amplifier transistors is connected to a reference voltage source.
Die Erfindung hat die Aufgabe, die beschriebene Schaltungsanordnung zu vereinfachen und - insbesondere im Hinblick auf eine verbesserte Integrationsfähigkeit auf einem Halbleiterkristall - eine platzsparende Schaltungsanordnung zu schaffen.The object of the invention is to simplify the circuit arrangement described and to create a space-saving circuit arrangement, in particular with regard to improved integration capability on a semiconductor crystal.
Diese Aufgabe wird erfindungsgemäß gelöst durch eine der Anzahl der Eingangssignale entsprechende Anzahl von Stromsteuerelementen, deren Hauptstrompfade einseitig mit Anzapfungen einer Kette aus Gegenkopplungswiderständen und anderseitig bezüglich der Reihenfolge der Anzapfungen abwechselnd mit einem ersten und einem zweiten Ausgangsanschluß verbunden sind, wobei jedem Stromsteuerelement an seinem Steueranschluß eines der Eingangssignale zuführbar ist, und wobei die Parallelschaltung der an die Anzapfung für das Stromsteuerelement unmittelbar anschließenden Gegenkopplungswiderstände gemäß dem Faktor dimensioniert ist, mit dem das Eingangssignal in der Linearkombination gewichtet ist.This object is achieved according to the invention by a number of current control elements corresponding to the number of input signals, the main current paths of which are connected on one side with taps of a chain of negative feedback resistors and on the other side alternately with a first and a second output connection with respect to the sequence of the taps, with each current control element at its control connection having one of the input signals can be fed, and wherein the parallel connection of those immediately following the tap for the current control element Negative feedback resistors is dimensioned according to the factor by which the input signal is weighted in the linear combination.
Bei der erfindungsgemäßen Schaltungsanordnung wird für jedes der Eingangssignale nur noch ein einziges Stromsteuerelement und nicht mehr ein vollständiger Differenzverstärker benötigt. Trotzdem ist die Funktion derjenigen einer Schaltungsanordnung gleichwertig, die für jedes Eingangssignal einen Differenzverstärker aufweist. Bei der erfindungsgemäßen Schaltungsanordnung ist jedes der Stromsteuerelemente mit wenigstens einem über einen Gegenkopplungswiderstand benachbarten Stromelement zu einer einem Differenzverstärker entsprechenden Anordnung verbunden. Dabei sind die einem Stromsteuerelement benachbarten Stromsteuerelemente stets mit dem anderen der beiden Ausgangsanschlüsse verbunden und wirken in ihrer Parallelschaltung als zweiter Zweig, d.h. als Referenzzweig, der Differenzverstärkeranordnung, deren Signalzweig durch das erstgenannte Stromsteuerelement gebildet ist. Dabei können durch die Schaltungsanordnung verzweigte und unverzweigte Konfigurationen entsprechend verzweigten bzw. unverzweigten Ketten aus Gegenkopplungswiderständen gebildet sein. Jede der von einem Stromsteuerelement und seinen benachbarten Stromsteuerelementen gebildete Anordnung stellt einen über die Gegenkopplungswiderstände gegengekoppelten Differenzverstärker, d.h. einen Differenzverstärker mit Stromgegenkopplung, dar, dessen Verstärkung für das dem einzelnen Stromsteuerelement zugeleitete Eingangssignal durch den Widerstandswert des Gegenkopplungswiderstands bzw. bei mehreren benachbarten Stromsteuerelementen durch den Widerstandswert der Parallelschaltung der unmittelbar anschließenden Gegenkopplungswiderstände gegeben ist. Dabei kann der Einfluß der übrigen Stromsteuerelemente und Gegenkopplungswiderstände vernachlässigt werden.In the circuit arrangement according to the invention, only a single current control element and no longer a complete differential amplifier is required for each of the input signals. Nevertheless, the function is equivalent to that of a circuit arrangement which has a differential amplifier for each input signal. In the circuit arrangement according to the invention, each of the current control elements is connected to at least one current element adjacent via a negative feedback resistor to form an arrangement corresponding to a differential amplifier. The current control elements adjacent to a current control element are always connected to the other of the two output connections and act in their parallel connection as a second branch, ie as a reference branch, of the differential amplifier arrangement, the signal branch of which is formed by the first-mentioned current control element. In this case, the circuit arrangement can form branched and unbranched configurations corresponding to branched or unbranched chains of negative feedback resistors. Each of the arrangements formed by a current control element and its adjacent current control elements represents a differential amplifier, i.e. a differential amplifier with current negative feedback, which is amplified for the input signal supplied to the individual current control element by the resistance value of the negative feedback resistor or, in the case of several adjacent current control elements, by the resistance value the parallel connection of the immediately following negative feedback resistors is given. The influence of the other current control elements and negative feedback resistors can be neglected.
Um aus einer Anzahl von Eingangssignalen in Form einer Linearkombination, in der die einzelnen Eingangssignale mit vorgegebenen Faktoren gewichtet sind, ein Ausgangssignal zu bilden, werden nun weiterhin erfindungsgemäß die Gegenkopplungswiderstände entsprechend den beschriebenen Zusammenhängen dimensioniert.In order to form an output signal from a number of input signals in the form of a linear combination in which the individual input signals are weighted by predetermined factors, the negative feedback resistances are now dimensioned according to the invention in accordance with the relationships described.
Durch Einsparen der bei den Schaltungsanordnungen nach dem Stand der Technik erforderlichen gesonderten Referenzzweige in den Differenzverstärkern für die einzelnen Eingangssignale wird bei der erfindungsgemäßen Schaltungsanordnung der Schaltungsaufwand erheblich reduziert.By saving the separate reference branches required in the circuit arrangements according to the prior art in the differential amplifiers for the individual input signals, the circuit complexity is considerably reduced in the circuit arrangement according to the invention.
An dieser Stelle sei bemerkt, daß aus der japanischen Anmeldung 58-101311 eine Mehrphasen-Spannungs- und -Stromumsetzerschaltung mit wenigstens drei Transistoren bekannt ist, deren Basisanschlüssen die Mehrphasenspannungen zugeführt werden und an deren Kollektoranschlüssen Ausgangsströme erhalten werden. Bei dieser Schaltung soll die Umsetzgenauigkeit erhöht werden. Die Schaltung enthält je einen Widerstand zwischen je zwei Emitteranschlüssen der Transistoren und je eine Stromquelle von jedem der Emitteranschlüsse zu einem gemeinsamen, negativen Schaltungspunkt. Bei dieser Schaltungsanordnung wird weder eine Linearkombination der Eingangssignale gebildet, noch wird eine darauf ausgerichtete Konfiguration und Dimensionierung der Kette aus Gegenkopplungswiderständen gemäß der Erfindung angeregt.At this point it should be noted that a multi-phase voltage and current converter circuit with at least three transistors is known from Japanese application 58-101311, the base connections of which are supplied with the multiphase voltages and output currents are obtained at the collector connections thereof. With this circuit, the conversion accuracy should be increased. The circuit contains a resistor between two emitter connections of the transistors and a current source from each of the emitter connections to a common, negative circuit point. With this circuit arrangement, neither a linear combination of the input signals is formed, nor is a configuration and dimensioning of the chain of negative feedback resistors in accordance with the invention, which is oriented to this, excited.
Als Stromsteuerelemente werden bevorzugt Halbleiterbauelemente, insbesondere Transistoren, eingesetzt, die erfindungsgemäße Schaltungsanordnung ist damit integrierbar; sie kann jedoch ebenso mit Verstärkerröhren aufgebaut sein.Semiconductor components, in particular transistors, are preferably used as current control elements; the circuit arrangement according to the invention can thus be integrated; however, it can also be constructed with amplifier tubes.
Vorteilhaft werden den als Transistoren ausgebildeten Stromsteuerelementen an den Anzapfungen der Kette von Gegenkopplungswiderständen Arbeitspunktgleichströme zugeleitet, wodurch eine einfache und exakte Arbeitspunkteinstellung der Schaltungsanordnung erhalten wird. Wenn insbesondere die Werte der Arbeitspunktgleichströme im gleichen Verhältnis zueinander stehen wie die wirksamen Querschnittsflächen der Hauptstrompfade der Stromsteuerelemente, werden in diesen gleiche Stromdichten und damit gleiche Potentialverhältnisse erzielt und somit eine symmetrisch arbeitende Anordnung erhalten. Als wirksame Querschnittsfläche eines Hauptstrompfades wird dabei der für die Steuerung des Stromes im Hauptstrompfad des Stromsteuerelements wirksame Querschnitt verstanden, d.h. beispielsweise die für die Stromsteuerung wirksame Fläche des Ladungsträgerkanals in einem Feldeffekttransistor oder die vom Kollektor-Emitter-Strom durchflossene Halbleiterquerschnittsfläche in einem bipolaren Transistor.Working current direct currents are advantageously fed to the current control elements designed as transistors at the taps of the chain of negative feedback resistors, as a result of which a simple and exact working point setting of the circuit arrangement is obtained. If, in particular, the values of the operating point direct currents are in the same ratio to one another as the effective cross-sectional areas of the main current paths of the current control elements, the same current densities and thus the same potential relationships are achieved in them and thus a symmetrically operating arrangement is obtained. The effective cross-sectional area of a main current path is understood to mean the cross-section effective for controlling the current in the main current path of the current control element, i.e. for example, the area of the charge carrier channel effective for current control in a field effect transistor or the semiconductor cross-sectional area through which the collector-emitter current flows in a bipolar transistor.
Die symmetrische Arbeitsweise der Schaltungsanordnung wird dadurch verbessert, daß die Summen der Werte der Arbeitspunktgleichströme der mit dem ersten und der mit dem zweiten Ausgangsanschluß verbundenen Stromsteuerelemente übereinstimmen. Diese Stromsymmetrie führt zu einer Spannungssymmetrie auch bei Schaltungselementen, die mit den Stromsteuerelementen verbunden sind und von den Strömen in deren Hauptstrompfaden durchflossen werden. Insbesondere verschwindet die Differenz der Arbeitspunktgleichströme an den Ausgangsanschlüssen, und es ergeben sich dort symmetrische Gleichstromarbeitspunkte.The symmetrical mode of operation of the circuit arrangement is improved in that the sums of the values of the operating point direct currents of the current control elements connected to the first and to the second output terminal correspond. This current symmetry leads to a voltage symmetry even in the case of circuit elements which are connected to the current control elements and through which the currents flow in their main current paths. In particular, the difference between the operating point direct currents disappears at the output connections, and symmetrical direct current operating points result there.
Ausführungsbeispiele der erfindungsgemäßen Schaltungsanordnung sind in der Zeichnung dargestellt und werden im nachfolgenden näher beschrieben.Exemplary embodiments of the circuit arrangement according to the invention are shown in the drawing and are described in more detail below.
Fig. 1 zeigt ein Beispiel mit einer Anzahl von n Stromsteuerelementen 11, 12, 13, 14, ..., 1n, in diesem Fall als bipolare NPN-Transistoren ausgebildet. Diese sind an ihren Emitteranschlüssen mit Anzapfungen 41, 42, 43, 44, ..., 4n einer Kette aus Gegenkopplungswiderständen R1, R2, R3, ..., Rn-1 verbunden, die der Einfachheit halber unverzweigt gewählt ist. Die Transistoren 11, ..., 1n, deren Kollektor-Emitter-Strecken die Hauptstrompfade der Stromsteuerelemente bilden, sind mit ihren Kollektoranschlüssen bezüglich der Reihenfolge der Anzapfungen 41, ..., 4n abwechselnd mit einem ersten Ausgangsanschluß 31 und einem zweiten Ausgangsanschluß 32 verbunden. An den die Steueranschlüsse bildenden Basisanschlüssen 21, 22, 23, 24, ..., 2n werden den Transistoren 11, ..., 1n Eingangssignale S1, S2, S3, S4, ..., Sn zugeführt. Der jedem der Eingangssignale S1, ..., Sn zugeordnete Transistor 11, ..., 1n wirkt mit dem bzw. den benachbarten Transistor(en) als Differenzverstärker, wobei der bzw. die benachbarte(n) Transistor(en) für das betreffende Eingangssignal als Referenzzweig auftritt. Die Verstärkung dieses Differenzverstärkers, die den Faktor bildet, mit dem das betreffende Eingangssignal in der das Ausgangssignal an den Ausgangsanschlüssen 31, 32 bildenden Linearkombination gewichtet ist, wird durch die Parallelschaltung der eingeschlossenen Gegenkopplungswiderstände bestimmt. Das Vorzeichen, mit dem das Eingangssignal in das Ausgangssignal eingeht, bestimmt sich aus der Zuordnung des Kollektoranschlusses des zugehörigen Transistors zum ersten bzw. zum zweiten Ausgangsanschluß 31 bzw. 32.1 shows an example with a number of n
Den Transistoren 11, ..., 1n werden an den Anzapfungen 41, ..., 4n Arbeitspunktgleichströme I1, I2, I3, I4, ..., In zugeführt, die von Stromquellen 51, 52, 53, 54, ..., 5n erzeugt werden. Die Hauptstrompfade, d.h. die Kollektor-Emitter-Strecken der Transistoren 11, ..., 1n weisen wirksame Querschnittsflächen A1, A2, A3, A4, ..., An auf. Im vorliegenden Fall sind dies für die bipolaren Transistoren die für den Ladungsträgertransport innerhalb der Transistoren wirksamen Übergangsflächen zwischen den unterschiedlich dotierten Zonen des Halbleitermaterials. Die Arbeitspunktgleichströme I1, ..., In sind im gleichen Größenverhältnis gewählt wie die wirksamen Querschnittsflächen A1, ..., An. Dadurch werden an den Anzapfungen 41, ..., 4n und den Stromsteuerelementen 11, ..., 1n, insbesondere auch den Basisanschlüssen 21, ..., 2n, gleiche Arbeitspunktpotentiale erhalten.The
Fig. 2 zeigt ein spezielles Ausführungsbeispiel der Erfindung mit drei Stromsteuerelementen 11, 12, 13, die wieder als bipolare NPN-Transistoren ausgebildet sind. Dieses Beispiel stellt einen Spezialfall der Anordnung nach Fig. 1 dar, bei der die Zahl n auf den Wert 3 festgelegt wurde. Mit der Fig. 1 übereinstimmende Elemente sind in Fig. 2 mit identischen Bezugszeichen versehen. Die Stromquellen 51, 52, 53 sind durch je einen Stromquellentransistor und einen mit dessen Emitteranschluß verbundenen Stromquellenwiderstand gebildet, wobei die Stromquellentransistoren an ihren Basisanschlüssen von einer gemeinsamen Referenzspannung gesteuert werden. Diese gemeinsame Steuerung der Stromquellen 51, ..., 5n ist auch in der Anordnung nach Fig. 1 durchführbar und gewährleistet eine gute Arbeitspunktstabilität beispielsweise bei Temperaturschwankungen in der Schaltungsanordnung oder durch Fertigungstoleranzen.Fig. 2 shows a special embodiment of the invention with three
Im Beispiel nach Fig. 2 weisen die Gegenkopplungswiderstände R1 und R2 übereinstimmende Widerstandswerte auf, während die wirksame Querschnittsfläche A2 des zweiten Stromsteuerelements 12 mit dem Wert 2 x A doppelt so groß gewählt ist wie die wirksamen Querschnitts flächen A1 und A3 mit dem Wert A. Entsprechend sind die wirksamen Querschnittsflächen der Stromquellentransistoren der zugehörigen Stromquellen 51, 52, 53 dimensioniert, und der Stromquellenwiderstand der dem zweiten Stromsteuerelement 12 zugeordneten Stromquelle 52 weist den halben Widerstandswert der Stromquellenwiderstände 51 und 53 auf. Im zweiten Stromsteuerelement 12 fließt dann ein Arbeitspunktgleichstrom I2, dessen Stromstärke mit 2 x I doppelt so groß ist wie die Stromstärke I der Arbeitspunktgleichströme I1 und I3. Insgesamt stellen sich damit in der Schaltungsanordnung nach Fig. 2 symmetrische Arbeitspunktpotentiale ein, und außerdem sind die Summen der Arbeitspunktgleichströme an den Ausgangsanschlüssen 31 und 32 gleich. Die Ausgangsanschlüsse 31, 32 sind vorzugsweise über Arbeitswiderstände oder andere Signalverarbeitungsstufen, die beispielsweise auch Stromspiegelanordnungen enthalten können, mit einem Versorgungsgleichspannungsanschluß verbunden. Aufgrund der Symmetrie der Arbeitspunktgleichströme in den Ausgangsanschlüssen 31, 32 können übereinstimmende Arbeitswiderstände gewählt und eine symmetrische Spannung als Ausgangssignal abgegriffen werden.In the example according to FIG. 2, the negative feedback resistors R1 and R2 have matching resistance values, while the effective cross-sectional area A2 of the second
Claims (4)
- A circuit arrangement for forming an output signal as a linear combination of a plurality of input signals, characterized by a corresponding plurality of current control elements (11, ..., 1n), whose main current paths have one end connected to taps (41, ..., 4n) of a chain of negative feedback resistors (R1,...., Rn-1) and with respect to the sequence of the taps (41, ..., 4n) have their other end alternately connected to a first (31) and a second (32) output terminal, each one of the input signals (S1, ..., Sn) being coupled to each current control element (11, ..., 1n) via its control terminal (21, ..., 2n), and the parallel arrangement of the negative feedback resistors (R1, ..., Rn-1) directly connected to the tap (41, ..., and 4n respectively) for the current control element (11, ...., 1n) being rated in accordance with the factor with which the input signal (S1, ..., and Sn, respectively) in the linear combination is weighted.
- A circuit arrangement as claimed in Claim 1, characterized in that at the taps (41, ..., 4n) of the chain of negative feedback resistors (R1, ..., Rn-1) operating point direct current sources (I1, ..., In) are applied to the current control elements (11, ..., 1n) formed by transistors.
- A circuit arrangement as claimed in Claim 2, characterized in that the values of the operating point direct currents (I1, ..., In) are in the same ratio to each other as the effective cross-sectional areas (A1, ..., An) of the main current paths of the current control elements (11, ..., 1n).
- A circuit arrangement as claimed in Claim 2 or 3, characterized in that the sums of the values of the operating point direct currents (I1, ..., In) corresponding to the current control elements (11, ..., 1n) connected to the first (31) and the second (32) output terminal are equal.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE3817028 | 1988-05-19 | ||
DE3817028A DE3817028A1 (en) | 1988-05-19 | 1988-05-19 | CIRCUIT ARRANGEMENT FOR FORMING A SIGNAL |
Publications (3)
Publication Number | Publication Date |
---|---|
EP0343719A2 EP0343719A2 (en) | 1989-11-29 |
EP0343719A3 EP0343719A3 (en) | 1990-10-24 |
EP0343719B1 true EP0343719B1 (en) | 1994-10-05 |
Family
ID=6354675
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP89201243A Expired - Lifetime EP0343719B1 (en) | 1988-05-19 | 1989-05-17 | Signal-generating circuit |
Country Status (2)
Country | Link |
---|---|
EP (1) | EP0343719B1 (en) |
DE (2) | DE3817028A1 (en) |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3178651A (en) * | 1961-08-03 | 1965-04-13 | United Aircraft Corp | Differential amplifier |
US3371200A (en) * | 1964-08-31 | 1968-02-27 | Ibm | Averaging and differencing system |
-
1988
- 1988-05-19 DE DE3817028A patent/DE3817028A1/en not_active Withdrawn
-
1989
- 1989-05-17 DE DE58908465T patent/DE58908465D1/en not_active Expired - Fee Related
- 1989-05-17 EP EP89201243A patent/EP0343719B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE3817028A1 (en) | 1989-11-30 |
EP0343719A3 (en) | 1990-10-24 |
DE58908465D1 (en) | 1994-11-10 |
EP0343719A2 (en) | 1989-11-29 |
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