EP0275075A2 - Thin film transistor and method of making the same - Google Patents

Thin film transistor and method of making the same Download PDF

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Publication number
EP0275075A2
EP0275075A2 EP88100305A EP88100305A EP0275075A2 EP 0275075 A2 EP0275075 A2 EP 0275075A2 EP 88100305 A EP88100305 A EP 88100305A EP 88100305 A EP88100305 A EP 88100305A EP 0275075 A2 EP0275075 A2 EP 0275075A2
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EP
European Patent Office
Prior art keywords
organic molecular
insulating
thin film
film transistor
film
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Application number
EP88100305A
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German (de)
French (fr)
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EP0275075B1 (en
EP0275075A3 (en
Inventor
Yasuhiro C/O Hosiden Electronics Co. Ltd. Ukai
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Hosiden Corp
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Hosiden Electronics Co Ltd
Hosiden Corp
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Priority to AT88100305T priority Critical patent/ATE75076T1/en
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Publication of EP0275075A3 publication Critical patent/EP0275075A3/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H01L21/02285—Langmuir-Blodgett techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H01L21/02288—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating printing, e.g. ink-jet printing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith

Definitions

  • the present invention relates to a thin film transistor which is used, for example, as a switching element for a picture element electrode in an active liquid crystal display element.
  • the invention also pertains to a method for the manufacture of such a thin film transistor.
  • a conventional thin film transistor of this kind has such a structure as shown in Fig. 1, in which source and drain electrodes 12 and 13, each formed by a transparent conductive film, for instance, are disposed apart on a transparent insulating substrate as of glass and an amorphous silicon or similar semiconductor layer 14 is deposited on the substrate 11 between the source and drain electrodes 12 and 13.
  • the semiconductor layer 14 is covered with a gate insulating film 15, on which a gate electrode 16 is formed.
  • the gate insulating film 15 is formed of an inorganic insulator such as SiN x or SiO2 and the gate electrode 16 is formed of a metallic material such as aluminum.
  • the gate insulating film 15 of such an inorganic insulator is formed mostly by a plasma assisted CVD (Chemical Vapor Deposition) process.
  • the plasma CVD process introduces difficulty in producing the semiconductor layer 14 of good quality because its surface is bombarded with high-energy particles.
  • the conventional thin film transistor since the conventional thin film transistor has the structure in which the gate electrode 16 is protrusively provided on the gate insulating film 15, the surface of the transistor is relatively irregular. When such thin film transistors are used in, for example, a light crystal display element, gate buses are likely to be broken by the irregularity of the transistor array.
  • the conventional structure requires, for the formation of the gate electrode 16, two manufacturing steps of forming a metal layer and then selectively etching it away.
  • Another object of the invention is to provide a thin film transistor which does not require any etching process for formation of a gate electrode.
  • the gate insulating film of the thin film transistor is formed by an insulating organic molecular film and a selected region of the gate insulating film on the opposite side from the underlying semiconductor layer is rendered into a conductive layer containing free carbon, thus providing the gate electrode.
  • the gate insulating film is formed by an insulating organic molecular film, and through ion implantation, for example, into a selected region of the gate insulating film, chains of molecules in this region are cut to form free carbon, by which conductivity is imparted to the region, obtaining the gate electrode.
  • the gate electrode can be obtained with such a simple process and it does not protrude from the surface of the device.
  • FIGs. 2A-2E an example of the thin film transistor of the present invention will hereinafter be described along with its manufacturing method.
  • the manufacture starts with the preparation of the transparent insulating substrate 11 as of glass, such as shown in Fig. 2A.
  • the source electrode 12 and the drain electrode 13, each of which is a transparent conductive film of ITO, for example, are formed apart on the substrate 11, as depicted in Fig. 2B.
  • the semiconductor layer 14 of amorphous silicon, for instance, is formed on the substrate 11 between the source and drain electrodes 12 and 13 as shown in Fig. 2C.
  • an insulating organic molecular film 21 of polyimide is deposited all over the surfaces of the electrodes 12 and 13 and the layer 14 as depicted in Fig. 2D.
  • the formation of the film 21 can be achieved by use of a spinner coating, offset printing, LB (Langmuir-Blodgett), or like process.
  • the material for the insulating organic molecular film 21 need not always be the polyimide but may also be stearic acid, diacetylene, phthalocyanine, anthracene, or the like.
  • N+ ions are selectively implanted into the top surface of the insulating organic molecular film 21, corresponding to the semiconductor layer 14, in an amount of 1 x 1017 ions/cm2 or so with an accelerating energy of 90 KeV, by which chains of molecules in the limited upper region of the insulating organic molecular film 21 are cut to form free carbon and hence provide conductivity therein, forming a gate electrode 22.
  • the thickness, sheet resistance, permeability and work function of the gate electrode 22 are determined according to the conditions for the ion implantation.
  • the intermediate portion of the organic molecular film 21 between the gate electrode 22 and the semiconductor layer 14 will act as a gate insulating film 23.
  • the thicknesses of the gate electrode 22 and the gate insulating film 23 are selected in the ranges of, for instance, from 300 n.m. (3000 ⁇ ) to 1 ⁇ m and from 100 - 300 n.m. (1000 to 3000 ⁇ ), respectively. Accordingly, the thickness of the insulating organic molecular film 21, which is formed in the step shown in Fig. 2D, is selected substantially in the range of 400 - 1300 n.m. (4000 to 13000 ⁇ ).
  • the relationship between the surface resistivity of the film and the amount of ions implanted was such as shown in Fig. 3, from which it appears that the surface resistivity increases with an increase in the amount of ions implanted. Furthermore, the surface resistivity diminishes as the ion beam current density increases.
  • the formation of the gate electrode 22 can be achieved by ion implantation into a predetermined region through use of a mask. It is also possible to perform the ion implantation into the predetermined region, without using the mask, by controlling an ion beam for X-Y scanning.
  • the thin film transistor of the present invention uses an insulating organic molecular film as the gate insulating film, so that the manufacture of this thin film transistor does not involve the use of such a plasma CVD process as would be needed for the formation of an inorganic insulating film. Accordingly, the semiconductor layer 14 of good quality can be obtained.
  • the region of the gate insulating film on the opposite side from the semiconductor layer 14 is rendered into a conductive region containing free carbon for use as the gate electrode, its formation can be achieved simply by ion implantation. Therefore, the manufacturing process of the thin film transistor is simple as compared with the prior art process which involves two steps of forming a metallic film and selectively etching it away, for the formation of the gate electrode.
  • the gate electrode is formed in a limited region of the surface layer of the gate insulating film, the surface of the device is less uneven than in the case where a gate electrode of metal is formed on the gate insulating film.
  • wiring such as a gate bus does not much protrude from the surface of the device. This will lessen the possibility of breakage of the wiring, ensuring enhancement of the yield rate of product.
  • the insulating organic molecular layer 21 is formed all over the surfaces of the underlying layers and is processed for orientation. This eliminates the necessity of providing an oriented film and makes the surface of the device less uneven.
  • the characteristics of the thin film transistor can be controlled as desired, by selecting the conditions for ion implantation so that the gate electrode 22 may have desired sheet resistance and work function.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Materials Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)

Abstract

A source electrode (12) and a drain electrode (13) are formed apart on an insulating substrate (11), and a semiconductor layer (14) is formed on the szbstrate (11) between the source and drain electrodes (12, 13). An insulating organic molecular film (21) is formed all over the source and drain electrodes (12, 13) and the semiconductor layer (14). Ions are implanted into a selected top surface region of the insulating oganic molecular film (21) corresponding to the semiconductor layer (14), by which chains of molecules in the surface region to form free carbon, providing a conductive gate electrode (22) and the remaining part of the insulating organic molecular film (21) forming a gate insulating film (23).

Description

    BACKGROUND OF THE INVENTION
  • The present invention relates to a thin film transistor which is used, for example, as a switching element for a picture element electrode in an active liquid crystal display element. The invention also pertains to a method for the manufacture of such a thin film transistor.
  • A conventional thin film transistor of this kind has such a structure as shown in Fig. 1, in which source and drain electrodes 12 and 13, each formed by a transparent conductive film, for instance, are disposed apart on a transparent insulating substrate as of glass and an amorphous silicon or similar semiconductor layer 14 is deposited on the substrate 11 between the source and drain electrodes 12 and 13. The semiconductor layer 14 is covered with a gate insulating film 15, on which a gate electrode 16 is formed.
  • The gate insulating film 15 is formed of an inorganic insulator such as SiNx or SiO₂ and the gate electrode 16 is formed of a metallic material such as aluminum.
  • In general, the gate insulating film 15 of such an inorganic insulator is formed mostly by a plasma assisted CVD (Chemical Vapor Deposition) process. However, the plasma CVD process introduces difficulty in producing the semiconductor layer 14 of good quality because its surface is bombarded with high-energy particles.
  • Moreover, since the conventional thin film transistor has the structure in which the gate electrode 16 is protrusively provided on the gate insulating film 15, the surface of the transistor is relatively irregular. When such thin film transistors are used in, for example, a light crystal display element, gate buses are likely to be broken by the irregularity of the transistor array. In addition, the conventional structure requires, for the formation of the gate electrode 16, two manufacturing steps of forming a metal layer and then selectively etching it away.
  • As a solution to the problem involved in the formation of the gate insulating film 15 through the plasma CVD process, there has also been proposed a thin film transistor of the type employing an insulating organic molecular film as the gate insulating film 15. However, this thin film transistor also uses metal for the gate electrode 16, and hence still calls for the above-mentioned two steps for the formation of the gate electrode and suffers its protrusive structure.
    • SUMMARY OF THE INVENTION
  • It is therefore an object of the present invention to provide a thin film transistor which is relatively flat over the entire structure including gate, source and drain electrodes.
  • Another object of the invention is to provide a thin film transistor which does not require any etching process for formation of a gate electrode.
  • According to the present invention, the gate insulating film of the thin film transistor is formed by an insulating organic molecular film and a selected region of the gate insulating film on the opposite side from the underlying semiconductor layer is rendered into a conductive layer containing free carbon, thus providing the gate electrode.
  • That is to say, according to the present invention, the gate insulating film is formed by an insulating organic molecular film, and through ion implantation, for example, into a selected region of the gate insulating film, chains of molecules in this region are cut to form free carbon, by which conductivity is imparted to the region, obtaining the gate electrode. In this way, the gate electrode can be obtained with such a simple process and it does not protrude from the surface of the device.
    • BRIEF DESCRIPTION OF THE DRAWINGS
    • Fig. 1 is a cross-sectional view showing a conventional thin film transistor;
    • Figs. 2A-2E illustrate, in cross-section, a sequence of steps involved in the manufacture of the thin film transistor of the present invention; and
    • Fig. 3 is a graph showing the relationship between the amount of polyimide ions implanted and the surface resistivity.
    DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • Referring first to Figs. 2A-2E, an example of the thin film transistor of the present invention will hereinafter be described along with its manufacturing method.
  • The manufacture starts with the preparation of the transparent insulating substrate 11 as of glass, such as shown in Fig. 2A. Then the source electrode 12 and the drain electrode 13, each of which is a transparent conductive film of ITO, for example, are formed apart on the substrate 11, as depicted in Fig. 2B. After this, the semiconductor layer 14 of amorphous silicon, for instance, is formed on the substrate 11 between the source and drain electrodes 12 and 13 as shown in Fig. 2C.
  • Next, in this embodiment, an insulating organic molecular film 21 of polyimide, for example, is deposited all over the surfaces of the electrodes 12 and 13 and the layer 14 as depicted in Fig. 2D. The formation of the film 21 can be achieved by use of a spinner coating, offset printing, LB (Langmuir-Blodgett), or like process. The material for the insulating organic molecular film 21 need not always be the polyimide but may also be stearic acid, diacetylene, phthalocyanine, anthracene, or the like.
  • Next, as shown in Fig. 2E, for example, N⁺ ions are selectively implanted into the top surface of the insulating organic molecular film 21, corresponding to the semiconductor layer 14, in an amount of 1 x 10¹⁷ ions/cm² or so with an accelerating energy of 90 KeV, by which chains of molecules in the limited upper region of the insulating organic molecular film 21 are cut to form free carbon and hence provide conductivity therein, forming a gate electrode 22. The thickness, sheet resistance, permeability and work function of the gate electrode 22 are determined according to the conditions for the ion implantation. The intermediate portion of the organic molecular film 21 between the gate electrode 22 and the semiconductor layer 14 will act as a gate insulating film 23.
  • The thicknesses of the gate electrode 22 and the gate insulating film 23 are selected in the ranges of, for instance, from 300 n.m. (3000 Å) to 1µm and from 100 - 300 n.m. (1000 to 3000 Å), respectively. Accordingly, the thickness of the insulating organic molecular film 21, which is formed in the step shown in Fig. 2D, is selected substantially in the range of 400 - 1300 n.m. (4000 to 13000 Å). Incidentally, when Ar⁺ ions were implanted into a polyimide film with an acceleration energy of 150 KeV, the relationship between the surface resistivity of the film and the amount of ions implanted was such as shown in Fig. 3, from which it appears that the surface resistivity increases with an increase in the amount of ions implanted. Furthermore, the surface resistivity diminishes as the ion beam current density increases.
  • The formation of the gate electrode 22 can be achieved by ion implantation into a predetermined region through use of a mask. It is also possible to perform the ion implantation into the predetermined region, without using the mask, by controlling an ion beam for X-Y scanning.
  • As described above, the thin film transistor of the present invention uses an insulating organic molecular film as the gate insulating film, so that the manufacture of this thin film transistor does not involve the use of such a plasma CVD process as would be needed for the formation of an inorganic insulating film. Accordingly, the semiconductor layer 14 of good quality can be obtained.
  • In addition, since the region of the gate insulating film on the opposite side from the semiconductor layer 14 is rendered into a conductive region containing free carbon for use as the gate electrode, its formation can be achieved simply by ion implantation. Therefore, the manufacturing process of the thin film transistor is simple as compared with the prior art process which involves two steps of forming a metallic film and selectively etching it away, for the formation of the gate electrode.
  • Moreover, since the gate electrode is formed in a limited region of the surface layer of the gate insulating film, the surface of the device is less uneven than in the case where a gate electrode of metal is formed on the gate insulating film. For instance, when the thin film transistor of the present invention is employed in a liquid crystal display element, wiring such as a gate bus does not much protrude from the surface of the device. This will lessen the possibility of breakage of the wiring, ensuring enhancement of the yield rate of product.
  • In the case of using the thin film transistor of the present invention in the liquid crystal display element, the insulating organic molecular layer 21 is formed all over the surfaces of the underlying layers and is processed for orientation. This eliminates the necessity of providing an oriented film and makes the surface of the device less uneven.
  • The characteristics of the thin film transistor can be controlled as desired, by selecting the conditions for ion implantation so that the gate electrode 22 may have desired sheet resistance and work function.
  • It will be apparent that many modifications and variations may be effected without departing from the scope of the novel concepts of the present invention.

Claims (14)

1. A thin film transistor comprising:
a source electrode (12) and a drain electrode (13) formed apart on an insulating substrate (11);
a semiconductor layer (14) formed on he substrate (11) between the source (12) and drain (13) electrodes;
a gate insulating film (23) formed in contact with the semiconductor (14); and
a gate electrode (22) formed in contact with the gate insulating film (23);
wherein the gate insulating film (23) is an insulating organic molecular film (21); and
wherein the gate electrode (22) is formed by a conductive layer containing free carbon in a selected region of the gate insulating film (23) on the opposite side from the semiconductor layer (14).
2. The thin film transistor of claim 1, wherein the insulating organic molecular film (21) is formed of polyimide.
3. The thin film transistor of claim 1, wherein the insulating organic molecular film (21) is formed of stearic acid.
4. The thin film transistor of claim 1, wherein the insulating organic molecular film (21) is formed of diacetylene.
5. The thin film transistor of claim 1, wherein the insulating organic molecular film (21) is formed of phthalocyanine.
6. The thin film transistor of claim 1, wherein the insulating organic molecular film (21) is formed of anthracene.
7. The thin film transistor of claim 1, wherein the gate electrode (22) and the gate insulating film (23) are 300 n.m. (3000 Å) to 1 µm and 100 to 300 n.m. (1000 to 3000Å) thick, respectively.
8. A method for the manufacture of a thin film transistor comprising the steps of:
forming source and drain electrodes (12, 13) apart on an insulating substrate (11);
forming a semiconductor layer (14) on the insulating substrate (11) between the source and dain electrodes (12, 13);
forming an insulating organic molecular film (21) all over the source and drain electrodes (12, 13) and the semiconductor layer (14); and
selectively implanting ions into the top surface of the insulating organic molecular film (21), corresponding to the semiconductor layer (14), whereby chains of molecules in the surface region of the insulating organic molecular film (210 are cut to form free carbon, providing a conductive gate electrode (22).
9. The manufacturing method of claim 8, wherein the formation of the insulating organic molecular film (21) is performed by a spinner coating, offset printing, or Langmuir-Blodgett process.
10. The manufacturing method of claim 8, wherein the ion implantation is performed by implanting N⁺ ions at an acceleration energy of 90 KeV.
11. The manufacturing method of claim 8, wherein the ion implantation is performed by implanting AR⁺ ions at an acceleration energy of 150 KeV.
12. The manufacturing method of claim 8, wherein the insulating organic molecular film (21) is formed of any one of polyimide, stearic acid, diacetylene, phthalocyanine, and anthracene.
13. The manufacturing method of claim 8, wherein the ion implantation is performed selectively for a predetermined region through use of a mask.
14. The manufacturing method of claim 8, wherein the ion implantation is performed selectively for a predetermined region through control of ion beam scanning.
EP88100305A 1987-01-16 1988-01-12 Thin film transistor and method of making the same Expired - Lifetime EP0275075B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT88100305T ATE75076T1 (en) 1987-01-16 1988-01-12 THIN FILM TRANSISTOR AND METHOD FOR ITS MANUFACTURE.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP62007657A JPH065755B2 (en) 1987-01-16 1987-01-16 Thin film transistor
JP7657/87 1987-01-16

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EP0275075A2 true EP0275075A2 (en) 1988-07-20
EP0275075A3 EP0275075A3 (en) 1989-04-12
EP0275075B1 EP0275075B1 (en) 1992-04-15

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US (1) US4943838A (en)
EP (1) EP0275075B1 (en)
JP (1) JPH065755B2 (en)
AT (1) ATE75076T1 (en)
DE (1) DE3869968D1 (en)

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* Cited by examiner, † Cited by third party
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US5079178A (en) * 1988-12-19 1992-01-07 L'etat Francais Represente Par Le Ministre Des Postes, Des Telecommunications Et De L'espace (Centre National D'etudes Des Telecommunications) Process for etching a metal oxide coating and simultaneous deposition of a polymer film, application of this process to the production of a thin film transistor
WO2005014511A1 (en) * 2003-07-15 2005-02-17 3M Innovative Properties Company Bis(2-acenyl)acetylene semiconductors
US7649217B2 (en) 2005-03-25 2010-01-19 Arash Takshi Thin film field effect transistors having Schottky gate-channel junctions

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US6372534B1 (en) 1995-06-06 2002-04-16 Lg. Philips Lcd Co., Ltd Method of making a TFT array with photo-imageable insulating layer over address lines
DE19712233C2 (en) * 1996-03-26 2003-12-11 Lg Philips Lcd Co Liquid crystal display and manufacturing method therefor
US6940566B1 (en) * 1996-11-26 2005-09-06 Samsung Electronics Co., Ltd. Liquid crystal displays including organic passivation layer contacting a portion of the semiconductor layer between source and drain regions
CN1148600C (en) * 1996-11-26 2004-05-05 三星电子株式会社 Liquid crystal display using organic insulating material and manufacturing methods thereof
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WO2005014511A1 (en) * 2003-07-15 2005-02-17 3M Innovative Properties Company Bis(2-acenyl)acetylene semiconductors
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US4943838A (en) 1990-07-24
ATE75076T1 (en) 1992-05-15
EP0275075B1 (en) 1992-04-15
JPH065755B2 (en) 1994-01-19
DE3869968D1 (en) 1992-05-21
JPS63177472A (en) 1988-07-21
EP0275075A3 (en) 1989-04-12

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