EP0128549B1 - Installation d'alarme - Google Patents

Installation d'alarme Download PDF

Info

Publication number
EP0128549B1
EP0128549B1 EP84106565A EP84106565A EP0128549B1 EP 0128549 B1 EP0128549 B1 EP 0128549B1 EP 84106565 A EP84106565 A EP 84106565A EP 84106565 A EP84106565 A EP 84106565A EP 0128549 B1 EP0128549 B1 EP 0128549B1
Authority
EP
European Patent Office
Prior art keywords
signal
alarm
stage
input
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
EP84106565A
Other languages
German (de)
English (en)
Other versions
EP0128549A1 (fr
Inventor
Harald Steinbrucker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alfasystem Vertrieb Von Elektronischen Sicherheitssystemen GmbH
Original Assignee
Alfasystem Vertrieb Von Elektronischen Sicherheitssystemen GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alfasystem Vertrieb Von Elektronischen Sicherheitssystemen GmbH filed Critical Alfasystem Vertrieb Von Elektronischen Sicherheitssystemen GmbH
Priority to AT84106565T priority Critical patent/ATE30279T1/de
Publication of EP0128549A1 publication Critical patent/EP0128549A1/fr
Application granted granted Critical
Publication of EP0128549B1 publication Critical patent/EP0128549B1/fr
Expired legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G08—SIGNALLING
    • G08B—SIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B25/00—Alarm systems in which the location of the alarm condition is signalled to a central station, e.g. fire or police telegraphic systems
    • G08B25/14—Central alarm receiver or annunciator arrangements
    • G—PHYSICS
    • G08—SIGNALLING
    • G08B—SIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B19/00—Alarms responsive to two or more different undesired or abnormal conditions, e.g. burglary and fire, abnormal temperature and abnormal rate of flow
    • G—PHYSICS
    • G08—SIGNALLING
    • G08B—SIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B29/00—Checking or monitoring of signalling or alarm systems; Prevention or correction of operating errors, e.g. preventing unauthorised operation
    • G08B29/02—Monitoring continuously signalling or alarm systems
    • G08B29/10—Monitoring of the annunciator circuits

Definitions

  • the invention relates to an alarm system according to the preamble of claim 1.
  • Such an alarm system is described in DE-A1-2 622 142, in which a plurality of signaling levels 9 are each connected via a blocking level 15 to a common evaluation level 4, which are based on a Signal signal of a signaling level triggers a time-limited alarm via at least one alarm level 6.
  • the duration of the Alann is limited by a timer 7 to the maximum time prescribed by law.
  • the blocking stage assigned to the respective alarm stage limits the duration of its alarm signal.
  • the blocking effect is canceled, so that a new signal from this signaling level is detected again and leads to an alarm being triggered.
  • the duration of the signal for each blocking level is derived from the timer 7 of the evaluation level.
  • those message levels that have not triggered are blocked as long as the evaluation level issues an alarm. Since the alarm time is in practice several minutes, there is a not inconsiderable risk that a burglar first triggers one alarm level and uses the resulting blocking of the other alarm levels to gain access to another location unnoticed. If a security guard goes to the location of the first attempted break-in indicated by the alarm system and concludes from the undamaged interior doors that the burglar has escaped again as a result of the alarm, the burglar can continue to pursue his dishonest activity in all silence.
  • the invention has for its object to provide an alarm system according to the preamble of claim 1, in which the duration of operating conditions in which an alarm signal recording is prevented is automatically reduced to a minimum.
  • each blocking stage according to the invention has its own timer, of which the evaluation stage is independent, it is possible to keep the time during which the other reporting stages are blocked considerably shorter than the duration of the actual alarm output.
  • the alarm system is therefore fully active again after a very short time and therefore also detects further intrusion attempts and can display them accordingly.
  • the system's reporting security is therefore significantly increased.
  • FIG. 1 schematically shows an alarm system designated overall by 1.
  • the alarm system 1 shown has a quiescent current detection level 2 with an opening detector loop 3, a motion detection level 4 with an infrared motion detector 5, a sabotage notification level 6 with a pure quiescent current conductor loop 7 and an emergency call detection level 8 with an emergency call detector 9
  • the messages from these message levels are evaluated in an evaluation level 10 in accordance with a program selected by means of a program setting level 11 in the sense that they lead to an alarm being issued, in connection with a time indication or in their chronological sequence being registered, merely as "present" "appear or the like.
  • FIG. 1 schematically shows an alarm system designated overall by 1.
  • the alarm system 1 shown has a quiescent current detection level 2 with an opening detector loop 3, a motion detection level 4 with an infrared motion detector 5, a sabotage notification level 6 with a pure quiescent current conductor loop 7 and an emergency call detection level 8 with an emergency call detector 9
  • the messages from these message levels are evaluated in an evaluation level
  • FIG. 1 shows an internal alarm stage 12, to which, for example, a buzzer 13 and a light indicator 14 are connected, an external alarm stage 15, to which a horn or siren 16 and an outside - Flashing light 17 are connected, and an alarm storage stage 18 with displays 19 on which messages that have occurred are displayed, if necessary by means of digital displays with simultaneous designation of the reporting location, the time, the time sequence and / or the frequency.
  • a mechanical arming key switch 20 is connected to the program setting stage 11, and can be used to arm the system for issuing certain types of alarm.
  • the program setting stage 11 is also connected to an infrared receiving / transmitting circuit 21, which is designed for infrared signal transmission via a diode combination 22 comprising a photodiode and a light-emitting diode.
  • the setting stage 11 can thus be switched or called up via the receive / transmit circuit 21 by means of a remote control unit 23 which is connected to the receive / transmit circuit via a diode combination 24.
  • time switches 25-1 to 25-8 are connected between the respective stages in the signal path for alarm signals or signals leading to alarms.
  • These timer elements 25 have the function of a pass on incoming alarm signal for a certain adjustable time under the condition that the timer has previously assumed a ready state due to the lack of the input alarm signal. Specifically, this is done in that the timer 25 is switched by an incoming alarm signal from the ready state to an alarm state in which the timer sends an alarm signal or passes on the alarm signal, and the timer by the passed or emitted alarm signal from the alarm state is switched to an idle state with a certain adjustable delay, the alarm signal delivery being ended. From the idle state, the timer is only switched to the standby state when the alarm signal entered is omitted. The timer can therefore only pass on an alarm signal again when it is switched from the idle state to the ready state due to the absence of the alarm signal.
  • this function of the respective time switch 25 is additionally used in the sense that the idle state of the time switch is forcibly brought about by means of a system switch signal, which is generated when the system is switched on or switched over for -3ine For a certain period of time, an unstable operating state is to be expected at a stage upstream of the relevant timer element, in which the signal emitted by the stage in question is random and does not correspond to the actual circumstances.
  • a voltage monitoring circuit 26 is shown as a source for such a system switching signal, which is connected to a power supply unit 27 and an emergency battery 28 and which, after a brief failure or drop in the supply voltage of the system, outputs system switching signals with a duration to the respective timer elements is longer than the duration of the unstable state of the stage preceding the timer element concerned. This ensures that the ready state of the timer and thus its alarm signal transmission is only possible when the alarm signal caused by a fault or a permanent cause of the message no longer occurs at the stage that is already operating in the stable operating state.
  • Such a system switching signal can also be generated, for example, during an arming process, which makes it possible to arm the remaining part of the system despite the presence of a continued alarm signal from a faulty stage.
  • Another example consists in entering a command for generating a system switching signal via the remote control unit 23, the receiving / transmitting circuit 21 and the program setting stage, with corresponding encryption, with which the idle state of a timer switch 25 is brought about behind a signaling level for a certain time which protects an input or output.
  • FIG. 2 shows an embodiment of the timer element 25 of the alarm system 1.
  • the timer element 25 according to this embodiment is constructed with an RS flip-flop from NAND elements N1 and N2, which has a set input S, a reset input R and a set output Q.
  • the set input S is connected to the alarm signal output of a preceding stage, while the set output Q determines the output alarm signal of the timer via a transistor T1.
  • a capacitor C1 is connected to the reset input R, the charging or discharging of which determines the switching sequence of the timer.
  • the time switching element is connected downstream of a stage schematically indicated with a resistor R4 and a transistor T5, which normally emits a high-level signal and generates a low-level signal as an alarm signal, which is illustrated by a normally closed contact connected via the lines shown in broken lines.
  • a stage schematically indicated with a resistor R4 and a transistor T5 which normally emits a high-level signal and generates a low-level signal as an alarm signal, which is illustrated by a normally closed contact connected via the lines shown in broken lines.
  • the preceding stage emits the normal signal with the high level and that the timer is in the ready state.
  • the capacitor C1 is charged to the high level, so that the reset input R, like the set input S and also the set output Q, are each at a high level, while a low level is present at the second input of the NAND gate N2.
  • the output of the NAND gate N1 and thus the second input of the NAND gate N2 immediately take on the high level, so that the set output Q is switched to the low level.
  • This low level represents the output alarm signal of the timer.
  • the capacitor C1 is discharged via a variable resistor P connected between the set output Q and the reset input R, so that its charge voltage rises from the initially high level to a threshold value is lowered, at which the NAND gate N2 switches over again, so that the set output Q again assumes the high level.
  • the low level at the reset input R is further maintained in that a discharge circuit is formed by the high level at the set output Q via a transistor T4 for the capacitor C1, in which a diode 2, a resistor R2, a transistor T3 and the transistor T4 are connected in series.
  • the transistor T3 is through the input alarm signal via a transistor T2 switched through, the base of which receives a low level via a resistor R3, while it receives a high level in the absence of an alarm signal, by means of which the transistor T2 and also the transistor T3 are blocked.
  • a series circuit leading to the capacitor C1, consisting of a resistor R1 and a diode D1 is also connected, however the resistor R2 of the discharge circuit is dimensioned such that the level at the reset input R is below of the threshold is held.
  • the timer therefore assumes the idle state, in which it no longer emits an output alarm signal, although the input alarm signal is still present. If the input alarm signal is now absent, the set input S assumes the high level, by means of which transistor T3 is also blocked via transistor T2, so that the discharge circuit D2, R2, T3, T4 is switched off.
  • the second input of the NAND gate N2 now assumes the low level, by which the high level of the set output Q is maintained.
  • the capacitor C1 is quickly charged via the series circuit comprising the resistor R1 and the diode D1, so that the reset input R now receives the high level again and the standby state is thus reached again.
  • the resistance value of the resistor R1 is chosen to be low in comparison to that of the variable resistor P serving as a discharge resistor, so that the achievement of the standby state is primarily determined by the resistance R1. If necessary, a diode which is opposite in polarity to the diode D1 can be connected in series with the variable resistor P, as a result of which there is no mutual influence on the time constants for charging and discharging.
  • FIG. 2 also shows a diode D3 connected to the capacitor C1, to which a low level is applied as a system switching signal, in order to thereby discharge the capacitor C1 regardless of the existing state and thus to bring about the idle state of the timer.
  • the timer After the system switching signal ceases to exist, the timer only returns to the standby state when the preceding stage emits a high level signal instead of an alarm signal, by means of which transistor T3 is blocked by transistor T2, so that capacitor C1 is connected in series is charged from the resistor R1 and the diode D1.
  • the duration of the system switching signal is dimensioned according to the respective application and for the individual timer switching stages depending on the upstream stage.
  • a constant output signal is not to be expected from the motion detection stage 4 until after it has been switched on, after about half a minute, so that the timer switch 25-2 connected downstream of this detection stage expediently receives a system switching signal for half a minute after it has been switched on. If a room secured by the alarm system 1 or certain steps thereof is to be entered or left without the arming status of the entire system being interrupted, a system switching signal with the duration required for entering or leaving is to be applied to the relevant timer elements. This ensures that the resulting blind time of the relevant alarm levels is reduced to a minimum and that all other alarm levels can issue their alarm messages without interruption.
  • FIG. 3 schematically shows an example of an opening signaling stage with detectors M1 to M3, which are also provided with loop-through connection test contacts.
  • the signaling stage is constructed with NAND elements N3 and N4, a resistor network R5 to R10 and a delay element C2 and R9. Details of the dimensioning are not explained here, since it is only important in connection with the timing switch 25 that in the normal state at the output of the NAND gate N4 there are low levels and thus at the collector of the transistor T5 high levels, while in the event of an alarm due to high levels Level at the output of the NAND gate N4, the transistor T5 is blocked and the signaling stage at the output shows a low level.
  • Figure 1 shows the alarm system 1 only schematically, so that many details of the design are omitted in the illustration.
  • the remote control unit 23 together with the receive / transmit circuit 21 can also be used to operate any other house system such as an air conditioning system, heating system or the like.
  • the output display units are only shown schematically.
  • the alarm system 1 it is possible with the alarm system 1 to display the respective switching states of all stages and timer elements on a light-emitting diode field or to supply such displays together with time information, information about a reporting location or the like via a suitable interface to a home computer or to make them visible on a home television set.
  • the time switch elements 25 used in the alarm system 1 make it possible to process precisely defined alarm signals which are adapted to the respective purposes. Any malfunctions that occur are limited both in terms of time and in terms of their effects on other system parts, so that the reliability of the entire system is improved becomes.
  • An alarm system is specified with at least one signal path for alarm signals, which leads at least via a signaling stage, an evaluation stage and an alarm transmitter / alarm memory stage, and into which at least one timer element is connected, which is delayed from a ready state by an input alarm signal an alarm state is switchable, in which an output alarm signal is emitted, from the alarm state delayed by the output alarm signal can be switched to an idle state in which no output alarm signal is emitted, and can be switched from the idle state to the ready state by the absence of the input signal at which no output alarm signal is given.

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Business, Economics & Management (AREA)
  • Emergency Management (AREA)
  • Alarm Systems (AREA)

Claims (6)

1. Installation d'alarme comportant plusieurs étages de signalisation (2, 4, 6, 8), chacun étant relié par un étage de verrouillage (25-1 à 25-4) à un étage d'évaluation commun (10), qui déclenche, par l'intermédiaire d'au moins un étage d'alarme, une alarme limitée dans le temps en réponse au signal de signalisation reçu d'un étage de signalisation, chaque étage de verrouillage limitant la durée du signal de signalisation concerné et permettant, au moyen d'une bascule bistable (N1, N2) à l'entrée d'initialisation de laquelle est présent le signal de signalisation, la délivrance d'un nouveau signal de signalisation seulement après disparition du signal de signalisation concerné, caractérisée en ce que la sortie de la bascule bistable (N1, N2) de chaque étage de verrouillage (Fig. 2) est reliée à l'entrée de l'étage d'évaluation, à la première entrée d'un circuit ET (D2, R2, T3, T4) ainsi qu'à l'entrée de réinitialisation de la bascule par un élément à constante de temps (P, C1), en ce que le signal de signalisation inversé est présent à la deuxième entrée du circuit ET et que la sortie du circuit ET est relié à l'entrée de réinitialisation de la bascule.
2. Installation d'alarme selon la revendication 1, caractérisée en ce que les entrées de réinitialisation de la bascule des étages de verrouillage sont reliées à un circuit externe (26), avec lequel chaque étage de signalisation peut être verrouillé individuellement et/ou après le déclenchement de l'installation d'alarme l'ensemble des étages de signalisation sont brièvement verrouillés.
3. Installation d'alarme selon la revendication 1 ou 2, caractérisée en ce que la bascule bistable est une bascule RS constituée d'éléments NON-ET (N1, N2).
4. Installation d'alarme selon l'une des revendications precédentes, caractérisée en ce que l'élément à constante de temps (P, C1) est formé par un condensateur (C1) monté entre la masse et l'entrée de réinitialisation et par une resistance de décharge (P) montée entre l'entrée de réinitialisation et la sortie et à laquelle, pour décharger rapidement le condensateur, est rélie en parallèle un montage serie constitue par une résistance (R1) et une diode (D1).
5. Installation d'alarme selon la revendication 4, caractérisée en ce que la résistance de décharge est une resistance variable (P) pour regler la temporisation.
6. Installation d'alarme selon l'une des revendications précédentes, caractérisée en ce que le circuit ET est constitue par le montage en série de deux transistors (T3, T4) dont les bases forment les deux entrées du circuit ET.
EP84106565A 1983-06-10 1984-06-08 Installation d'alarme Expired EP0128549B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT84106565T ATE30279T1 (de) 1983-06-10 1984-06-08 Alarmanlage.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3321078A DE3321078C2 (de) 1983-06-10 1983-06-10 Alarmanlage
DE3321078 1983-06-10

Publications (2)

Publication Number Publication Date
EP0128549A1 EP0128549A1 (fr) 1984-12-19
EP0128549B1 true EP0128549B1 (fr) 1987-10-14

Family

ID=6201203

Family Applications (1)

Application Number Title Priority Date Filing Date
EP84106565A Expired EP0128549B1 (fr) 1983-06-10 1984-06-08 Installation d'alarme

Country Status (3)

Country Link
EP (1) EP0128549B1 (fr)
AT (1) ATE30279T1 (fr)
DE (1) DE3321078C2 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4445198A1 (de) * 1994-12-17 1996-06-20 Abb Patent Gmbh Anordnung mit einem Bewegungsmelder
DE19513577C1 (de) * 1995-04-19 1996-07-25 Stein Gmbh Warnstation zur Warnung von Personen im Gleisbereich

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1441449B1 (de) * 1962-07-09 1971-12-30 Isi Inc Stoerungsmelder
DE1164885B (de) * 1962-07-20 1964-03-05 Ernst Heinkel Flugzeugbau G M Anzeigevorrichtung mit mehreren parallel ueber zugeordnete Signalschalter an eine Gleichspannungsquelle geschalteten Einzelsignalgebern
DE1238366B (de) * 1964-09-25 1967-04-06 Licentia Gmbh Gleichspannungsgespeiste UEberwachungs- oder Alarmanlage
DE1257833B (de) * 1965-03-27 1968-01-04 Telefunken Patent Gegen Stoerimpulse unempfindliche Schaltungsanordnung zur Erzeugung eines Impulses
DE2331592B2 (de) * 1973-06-20 1975-04-24 August 8031 Stockdorf Woerl Alarmanlage
DE2622142A1 (de) * 1976-05-19 1977-11-17 Hirschmann Radiotechnik Alarmabschaltung fuer meldeanlagen
US4164736A (en) * 1978-03-23 1979-08-14 Napco Security Systems, Inc. Apparatus for disabling an alarm after a predetermined operating period

Also Published As

Publication number Publication date
DE3321078A1 (de) 1984-12-13
DE3321078C2 (de) 1986-01-23
ATE30279T1 (de) 1987-10-15
EP0128549A1 (fr) 1984-12-19

Similar Documents

Publication Publication Date Title
EP0111178B1 (fr) Dispositif de contrôle avec plusieurs détecteurs connectés, en forme de chaîne, à une ligne de signalisation
DE19506385C2 (de) Drahtlose Gefahren-Meldeanlage und Meldeverfahren
DE2836760C2 (de) Elektronisches Fernüberwachungssystem
EP0066200A1 (fr) Procédé et dispositif pour la révision dans un système détecteur de danger et particulièrement d'incendie
DE2701614A1 (de) Anzeigesystem
EP0128549B1 (fr) Installation d'alarme
EP0211344A2 (fr) Circuit adressable
DE1513708B2 (de) Phasenvergleich-schutzanordnung
DE4107668C2 (de) Sicherheitsschaltgerät
EP0098554B1 (fr) Procédé et dispositif pour la demande automatique des valeurs de mesure de signalisation et de l'identificateur de signalisation dans une installation d'avertisseur d'alarme
DE4322841C2 (de) Gefahrenmeldeanlage
EP0021232A1 (fr) Installation d'alarme contre l'intrusion
DE4142529C2 (de) Sicherungseinrichtung
DE2942891A1 (de) Verfahren zur automatischen ueberwachung eines drehzahl-grenzwertes
DE3346527A1 (de) Verfahren und anordnung zur stoerungssicheren alarmauswertung einer meldelinie einer gefahrenmeldeanlage
EP0098553B1 (fr) Procédé et dispositif pour la demande automatique des valeurs de mesure de signalisation et/ou de l'identificateur de signalisation dans une installation d'avertisseur d'alarme
DE2409652A1 (de) Ueberwachungsanlage
DE2619968C3 (de) Meldeanlage
DE1441449B1 (de) Stoerungsmelder
DE1285921B (de) Automatische Feuermeldeanlage
DE3030142A1 (de) Loescheinrichtung
DE3151603C2 (de) Fehlalarm-Schutzschaltung
DE2629653B1 (de) Loescheinrichtung
DE2254955B2 (de) Speicheranzeige- und Betätigungseinrichtung, insbesondere für Feuerlöschanlagen in Fahrzeugen
DE2133653A1 (de) Loeschanlage

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Designated state(s): AT CH GB LI NL

17P Request for examination filed

Effective date: 19850610

17Q First examination report despatched

Effective date: 19860516

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AT CH GB LI NL

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Effective date: 19871014

REF Corresponds to:

Ref document number: 30279

Country of ref document: AT

Date of ref document: 19871015

Kind code of ref document: T

NLV1 Nl: lapsed or annulled due to failure to fulfill the requirements of art. 29p and 29m of the patents act
GBV Gb: ep patent (uk) treated as always having been void in accordance with gb section 77(7)/1977 [no translation filed]
PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed
PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19881123

REG Reference to a national code

Ref country code: CH

Ref legal event code: PUE

Owner name: ALFASYSTEM GMBH, HERSTELLUNG UND VERTRIEB VON ELEK

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: AT

Payment date: 19960621

Year of fee payment: 13

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: CH

Payment date: 19960625

Year of fee payment: 13

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: AT

Effective date: 19970608

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19970630

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19970630

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL