EP0039403B1 - Xerographic copier including controllable erase system - Google Patents
Xerographic copier including controllable erase system Download PDFInfo
- Publication number
- EP0039403B1 EP0039403B1 EP81102041A EP81102041A EP0039403B1 EP 0039403 B1 EP0039403 B1 EP 0039403B1 EP 81102041 A EP81102041 A EP 81102041A EP 81102041 A EP81102041 A EP 81102041A EP 0039403 B1 EP0039403 B1 EP 0039403B1
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- EP
- European Patent Office
- Prior art keywords
- photoconductor
- light sources
- character
- erase
- output
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03G—ELECTROGRAPHY; ELECTROPHOTOGRAPHY; MAGNETOGRAPHY
- G03G15/00—Apparatus for electrographic processes using a charge pattern
- G03G15/04—Apparatus for electrographic processes using a charge pattern for exposing, i.e. imagewise exposure by optically projecting the original image on a photoconductive recording material
- G03G15/04018—Image composition, e.g. adding or superposing informations on the original image
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03G—ELECTROGRAPHY; ELECTROPHOTOGRAPHY; MAGNETOGRAPHY
- G03G15/00—Apparatus for electrographic processes using a charge pattern
- G03G15/04—Apparatus for electrographic processes using a charge pattern for exposing, i.e. imagewise exposure by optically projecting the original image on a photoconductive recording material
- G03G15/045—Apparatus for electrographic processes using a charge pattern for exposing, i.e. imagewise exposure by optically projecting the original image on a photoconductive recording material with means for charging or discharging distinct portions of the charge pattern on the recording material, e.g. for contrast enhancement or discharging non-image areas
- G03G15/047—Apparatus for electrographic processes using a charge pattern for exposing, i.e. imagewise exposure by optically projecting the original image on a photoconductive recording material with means for charging or discharging distinct portions of the charge pattern on the recording material, e.g. for contrast enhancement or discharging non-image areas for discharging non-image areas
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03G—ELECTROGRAPHY; ELECTROPHOTOGRAPHY; MAGNETOGRAPHY
- G03G2215/00—Apparatus for electrophotographic processes
- G03G2215/04—Arrangements for exposing and producing an image
- G03G2215/0429—Changing or enhancing the image
- G03G2215/0431—Producing a clean non-image area, i.e. avoiding show-around effects
- G03G2215/0448—Charge-erasing means for the non-image area
- G03G2215/0451—Light-emitting array or panel
Definitions
- the present invention relates to a xerographic copier including a controllable erase system.
- Xerographic devices may be divided into two types, printers and copiers.
- images are formed on a photo-conductor device in response to input electrical signals.
- this type employs a light scanning system employing a laser or cathode ray tube light generator.
- Another printing arrangement is shown in the IBM Technical Disclosure Bulletin, Vol. 13, Number 12, May 1971 at pages 3757 and 3758.
- a row of light emitting diodes are positioned across a photo- conductor device and are driven by a system including five 120-bit shift registers and associated decoders to form character images on the photoconductor. All of the above printing arrangements suffer from the disadvantage that, though they can effect high speed printing, they require extensive logic and control systems which are costly.
- an image is normally produced on a photoconductor by light reflected from an original document.
- erase devices are employed to discharge the areas of the photo- conductor outside the image area. Where the image area is variable, the erase devices are controlled to vary the discharged areas to conform with the size of the image areas.
- a number of arrangements to effect such variable erasure have been proposed. These include selective shuttering of light sources and selective operation of light sources. For the latter of these arrangements, light emitting diodes have been found to be of particular value in view of their controllability.
- information in the form of characters or graphs, is added to a copy. This is of particular value in testing operations when, for example, a test image is produced and this is conveniently accompanied by data indicating various machine operations, such as the total number of copies produced over a period, or the number and type of faults which have occurred. Additionally, such added information may be useful under normal copying conditions, for example to identify a copy or its source.
- a xerographic copier including a movable photoconductor device for supporting electrostatic latent images of documents and an erase device for erasing the photoconductor device in an area immediately adjacent an image area thereon, characterised in that said erase device comprises a plurality of light sources positioned adjacent the photo- conductor device, each operable, when energised, to illuminate an individual band on the photo- conductor device as it moves therepast, and arranged such that adjacent bands overlap, and control means coupled to control the energisation of the light sources to illuminate areas of the photoconductor in the configuration of symbolic representations.
- Figure 1 shows an edge erase device which is positioned adjacent a photoconductor drum in a xerographic copier.
- This device as indicated in Figure 8, is positioned at one end of the photo- conductor drum and is normally employed to discharge an edge strip of the photoconductor adjacent the image area.
- the device includes ten light emitting diodes 0 to 9 which are arranged to illuminate overlapping bands on the photoconductor as it rotates beneath them.
- selected ones of the diodes are energised constantly to define combined illuminated bands of different width in accordance with the position of the edge of the image area.
- Figure 2 illustrates the pattern on the photoconductor produced by energising all of teh diodes for a period during which the photoconductor moves through a distance indicated by the arrows.
- variable edge erase device of the type shown in Figure 1 can be used to produce information on a copy sheet adjacent the image area thereof. Such information may be used to identify a produced copy or its source. In addition it is often desirable to produce output information, as character or graphical symbolic representations, relating to the operation of a copier, particularly when it is under test. Such information may include the number of total hours of machine operation, the total number of copies produced, which may be divided into those made from different sources such as a semi-automatic document feed and an automatic document feeder. Other information may include that related to faults, such as the total number of paper jams which have occurred over a period. This information can, during operation of the copier, be recorded and retained in the control system.
- Figure 3 shows a series of illumination bands produced by the diodes 2 to 9 for successive movements of the photoconductor over distances PO to P5. It should be noted that diodes 0 and 1 are not energised in order to provide a gap between the image and characters produced by the diodes. From the pattern shown in Figure 3, by selective energisation of the diodes, numeric, alphabetic and special characters can be produced, though the following description will, for simplicity, be restricted to the production of numeric digits.
- the font used to produce the digits comprises five rows using the diodes five to nine in the three successive positions illustrated in Figure 4.
- a digital character one, illustrated in Figure 5, is generated by activating diode nine in positions two and three, diode eight in position two, diode seven in position one, diode six in position four, and diode five in positions two to four.
- Figures 6 and 7 illustrate how the characters from zero to nine can be formed in an analogous way.
- a copy drum 81 includes a photoconductive surface 82. Mounted adjacent to the photoconductive surface, but not touching it, is a diode block 83, shown as including ten diode positions. These correspond to the positions shown in Figure 1 as explained above only those numbered five to nine are to be used for generating the digits.
- a sensor 84 is used to supply emit count signals to a controller 85 for determining the position of the photoconductive surface 82.
- the controller 85 supplies output signals which set various bits in an output register 86 which are coupled by a cable 87 to the individual light emitting diodes in the block 83.
- the corresponding connected LED in the block 83 is energised.
- the bit is reset in the output register 86, the corresponding LED is de-energised.
- Figure 9 illustrates a controller which can be used in the system of Figure 8.
- the explanation of the operation of Figure 9 can be more easily understood with the aid of the state diagram of Figure 10.
- Two clocked J-K flip-flops 91 and 92 form the state control portion of the controller.
- the states are numbered zero through three, corresponding to the binary values in the flip-flops 91 and 92 and decoded by a decoder 93.
- the timing control is provided by a zero-crossing detector 94 which is coupled to the a-c power line and provides an output signal ZX each time the alternating current input power voltage has a zero value.
- Such zero-crossing detectors are well known in the art and need no further explanation for an understanding of the invention.
- the timing signal ZX is also applied to a divide-by-three circuit 95 which produces a control signal ZX3 which occurs every third zero-crossing of the input power.
- the initial controller state is zero during which time the data to be printed is loaded into a data shift register 96 by a means not shown but which is well known in the art. During the state zero, a four-stage character counter 97 is cleared.
- ROM Read-Only Memory 99
- Table I illustrates the ROM data to produce the font of Figures 6 and 7 using five in-line LED's for simplicity of explanation rather than the offset LED's as shown in the block 83 ( Figure 8).
- the ROM address is a combination or concatenation of two bits of the two-stage H-counter 98 and the four bits of the binary coded decimal digit being displayed which is in the left-hand stage 961 of the data shift register 96.
- the output data comprises eight bits, the first five corresponding to the five diodes to be controlled, the least significant three bits being zero and not used.
- the output data from the data register 911 is gated to the output register 86 ( Figure 8) by a network of AND gates 914 which is enabled by the state three (S3) signal from the decoder 93.
- the three columns of the font are identified by the first three values of the two-stage H-counter 98, viz., 00, 01, and 10.
- the two-stage H-counter reaches a value of three, the character in the shift register stage 961 has been printed.
- each copy sheet to be printed will contain eight characters. These are counted by the CH-counter 97.
- a NAND gate 917 provides an output signal indicating that the character count is not equal to eight.
- the output gates 914 are enabled at every third zero-crossing of the power, i.e., every S3 state.
- Each of the columns therefore, has a width equal to the linear travel of the photoconductor in a period equal to three zero-crossings, i.e., 1/20-th of a second.
- the detailed operation of the controller is as follows.
- the EC signal which indicates that the drum is in proper position to begin forming the characters, sets the flip-flop 92 causing the controller to enter state one.
- state one the information is read from the ROM at the address determined by the H-counter bits and the BCD character bits of the character in the stage 961.
- the ZX3 signal activates an AND gate 920 which causes the ZX signal to set the flip-flop 92.
- the CH*8 signal from the NAND gate 917 is high so that the flip-flop 92 remains in the set state. This causes the controller to enter state three which gates the data register 911 to the output register via the gates 914. Also, the state three signal increments the H-counter 98 by one.
- the machine returns to state one if the H-counter has not reached the value of three. This is caused by the ZX signal clocking the J-K flip-flop 91 with only the K input (H#3) signal high. Initially, the first two ROM address bits are 00 and the other four bits are the BCD equivalent of the character being written. Therefore, at the next ZX3 time, the BCD digits of the address are the same but the H-counter now has a value of 01 so that the second column of the data controlling the digit are accessed from the ROM and at state three are gated to the output register. This sequence continues until after the third column is printed and the H-counter is incremented to a value of three.
- the data register 96 is shifted to place the next digit in stage 961 and the H-counter 98 is cleared to zero. Also, the CH-counter 97 is incremented by one. With the CH*8, the next zero-crossing causes the machine to enter state one where the above sequence is repeated for the second digit.
- a microprocessor for effecting operational control, it is possible for the microprocessor to perform the functions of the above described controller in addition to its other functions. By doing this, the cost of the hardware is reduced, and flexibility is increased. For example differing character fonts may be generated.
- the following description details the operation of a microprocessor to control the edge erase device.
- Microprocessor are well known in the art and commercially available. The following description and flowcharts can be applied to any of the available microprocessors. Appendix B hereto describes the conventions employed in the flowcharts (Charts I to III). The numbers in the right-hand column identify the hexadecimal address of the first instruction in the attached programs related to the associated step. The attached programs can be used on a microprocessor such as that described in U.S. Patent Specification No. 4170414. Appendix A summarizes the relevant instructions.
- a STARTOUT routine is used to begin the data output according to the invention. This is flowcharted in Chart I and is used to initialize the data output before printing.
- the STARTOUT routine performs several functions. It loads the contents of the next register to be displayed into OUTDATA1 (low order byte) and OUTDATA2 (high order byte) registers. These correspond to the data shift register 96 ( Figure 9). The data is left-justified to suppress leading zeros and an output character count (CHARCNT) is appropriately incremented to insure that the output of only valid (justified) data.
- CHARCNT output character count
- the output control counter is initialized to a value of -1 and the current character (CURRCHAR) and last character (LASTCHAR) registers are loaded with an address to insure that a null output precedes the data.
- the STARTOUT routine is called by a CZCOUNT routine, a pseudo-emitter routine which is used to control the timing. As shown in Chart I, the STARTOUT routine sets the OUTPTNOW bit at line 2. This bit is used to indicate to another routine (LEDWRITE) that the data is ready for printing.
- the OUTFETCH subroutine is called. This subroutine fetches and converts the register content to be displayed. It loads the contents from a selected register whose value is expressed in binary and converts it to eight binary coded decimal digits for data output. (OUTFETCH is flowcharted in Chart II below.)
- the output mode counters are initialized by clearing CHARCNT to zero and setting OUTCOUNT to -1.
- the OUTFETCH routine is detailed. First, the address of the next register to be written is fetched. The DIVIDE routine is called which divides the register value by 10,000. This, in effect, splits the register into two four decimal digit values. Next, the subroutine BINBCD is called to convert the high order digits to be BCD. Conversion of binary to BCD is well known in the art and need not be explained for an understanding of the invention. Next, the binary coded digits are stored in the high output register OUTDATA2, and the BINBCD subroutine is called to convert the lower order digits to BCD which are then stored in the low output register OUTDATA1.
- the LEDWRITE routine (Chart III) is used to write the data onto the photoconductor using the variable edge erase lamps. The written image is then developed and transferred to a copy sheet as is well known in the art. The following steps have already been done by the STARTOUT routine before calling the LEDWRITE routine.
- the data to be printed is stored in the OUTDATA registers in BCD format, the number of trailing digits, i.e., those to be skipped because of zero suppression, is stored in CHARCNT, and an address eleven bytes before the first null character address in the output table has been loaded into the CURRCHAR and LASTCHAR registers. (This address is symbolically indicated as CHARNPO-1 1.)
- the output control counter, OUTCOUNT has been set to -1.
- step 2 The OUTPTNOW bit is tested (step 2) and, if not set, the program branches to step 17 which ends (exits) the routine. Otherwise, the routine goes to step four where it is determined whether it is time to change the output. If the output is not to be changed, the current output pattern is written and the routine ends. The output is changed at every third zero-crossing as signified by a bit which is supplied by another program before the LEDWRITE routine is called. If it is time to change the output, the output change counter is reset and the position counter is incremented by one. A test is made to determine whether the position counter indicates position four. If not, the pointer is changed to the next output state and the LASTCHAR address is tested to determine whether it is beyond the end of the font table.
- the last character bit pattern is loaded and the current character and last character bits are combined. This will be explained below in more detail.
- the lamps not to be written are turned off and the lights to be written will be turned on at the next zero-crossing.
- the character count is checked. If equal to ten, then OUTPTNOW bit is reset and the routine ends. If the character count is not equal to ten, the routine ends and will be resumed on the next zero-crossing.
- the counter is returned to position zero and the current table address is moved to the last table address, the character count is incremented by one, and it is determined whether the last character has been written. If so, the CHARNPO (null character) is moved to the current character.
- Table II represents a font table useful for the offset LED writing where the location of the first character of position zero begins at the hexadecimal address F7B8. The contents of the memory are indicated in hexadecimal characters.
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Exposure Or Original Feeding In Electrophotography (AREA)
- Combination Of More Than One Step In Electrophotography (AREA)
- Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
- Control Or Security For Electrophotography (AREA)
- Discharging, Photosensitive Material Shape In Electrophotography (AREA)
- Fax Reproducing Arrangements (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Accessory Devices And Overall Control Thereof (AREA)
- Dot-Matrix Printers And Others (AREA)
Description
- The present invention relates to a xerographic copier including a controllable erase system.
- Xerographic devices may be divided into two types, printers and copiers. In the former type images are formed on a photo-conductor device in response to input electrical signals. Usually this type employs a light scanning system employing a laser or cathode ray tube light generator. Another printing arrangement is shown in the IBM Technical Disclosure Bulletin, Vol. 13, Number 12, May 1971 at pages 3757 and 3758. In this system, a row of light emitting diodes are positioned across a photo- conductor device and are driven by a system including five 120-bit shift registers and associated decoders to form character images on the photoconductor. All of the above printing arrangements suffer from the disadvantage that, though they can effect high speed printing, they require extensive logic and control systems which are costly. In copier devices, an image is normally produced on a photoconductor by light reflected from an original document. In order to prevent the formation of dense black areas at the edges of a copy, erase devices are employed to discharge the areas of the photo- conductor outside the image area. Where the image area is variable, the erase devices are controlled to vary the discharged areas to conform with the size of the image areas. A number of arrangements to effect such variable erasure have been proposed. These include selective shuttering of light sources and selective operation of light sources. For the latter of these arrangements, light emitting diodes have been found to be of particular value in view of their controllability.
- In certain applications, it is desirable that information, in the form of characters or graphs, is added to a copy. This is of particular value in testing operations when, for example, a test image is produced and this is conveniently accompanied by data indicating various machine operations, such as the total number of copies produced over a period, or the number and type of faults which have occurred. Additionally, such added information may be useful under normal copying conditions, for example to identify a copy or its source.
- It is, therefore, an object of the invention to provide the facility in a copier machine to generate symbols on a copy without employing added optical components and extensive extra logic and control devices.
- According to the invention, there is provided a xerographic copier including a movable photoconductor device for supporting electrostatic latent images of documents and an erase device for erasing the photoconductor device in an area immediately adjacent an image area thereon, characterised in that said erase device comprises a plurality of light sources positioned adjacent the photo- conductor device, each operable, when energised, to illuminate an individual band on the photo- conductor device as it moves therepast, and arranged such that adjacent bands overlap, and control means coupled to control the energisation of the light sources to illuminate areas of the photoconductor in the configuration of symbolic representations.
- The invention will now be described, by way of example, with reference to the accompanying drawings, in which:
- Figure 1 is a diagram of an edge erase system comprising a diode block containing ten light emitting diodes;
- Figure 2 shows a pattern formed on a moving photoconductor adjacent the diode block depicted in Figure 1;
- Figure 3 shows a pattern formed by successive illumination of diodes in the block;
- Figure 4 is a chart representing the operation of five of the diodes for producing a preferred character font;
- Figure 5 is a representation of a character "one" produced by the five diodes in three successive periods;
- Figure 6 is an illustration of the preferred font of the digits zero to four;
- Figure 7 is an illustration of the preferred fonts of the digits five to nine;
- Figure 8 shows, in pictorial and block form, an embodiment of the invention;
- Figure 9 shows a controller for the system of Figure 8; and
- Figure 10 is a state diagram representing the operation of the controller in Figure 9.
- Figure 1 shows an edge erase device which is positioned adjacent a photoconductor drum in a xerographic copier. This device, as indicated in Figure 8, is positioned at one end of the photo- conductor drum and is normally employed to discharge an edge strip of the photoconductor adjacent the image area. The device includes ten
light emitting diodes 0 to 9 which are arranged to illuminate overlapping bands on the photoconductor as it rotates beneath them. When employed in an edge erase function, selected ones of the diodes are energised constantly to define combined illuminated bands of different width in accordance with the position of the edge of the image area. Thus if the image on the drum is of the smallest area, then all of the diodes are illuminated, and as the image area is increased, selected diodes, first 0, then 0 and 1, then 0, 1 and 2 etc. are de-energised. Figure 2 illustrates the pattern on the photoconductor produced by energising all of teh diodes for a period during which the photoconductor moves through a distance indicated by the arrows. - It has now been realised that a variable edge erase device of the type shown in Figure 1 can be used to produce information on a copy sheet adjacent the image area thereof. Such information may be used to identify a produced copy or its source. In addition it is often desirable to produce output information, as character or graphical symbolic representations, relating to the operation of a copier, particularly when it is under test. Such information may include the number of total hours of machine operation, the total number of copies produced, which may be divided into those made from different sources such as a semi-automatic document feed and an automatic document feeder. Other information may include that related to faults, such as the total number of paper jams which have occurred over a period. This information can, during operation of the copier, be recorded and retained in the control system.
- Figure 3 shows a series of illumination bands produced by the
diodes 2 to 9 for successive movements of the photoconductor over distances PO to P5. It should be noted thatdiodes - The font used to produce the digits comprises five rows using the diodes five to nine in the three successive positions illustrated in Figure 4. A digital character one, illustrated in Figure 5, is generated by activating diode nine in positions two and three, diode eight in position two, diode seven in position one, diode six in position four, and diode five in positions two to four.
- Figures 6 and 7 illustrate how the characters from zero to nine can be formed in an analogous way.
- In Figure 8, a
copy drum 81 includes aphotoconductive surface 82. Mounted adjacent to the photoconductive surface, but not touching it, is adiode block 83, shown as including ten diode positions. These correspond to the positions shown in Figure 1 as explained above only those numbered five to nine are to be used for generating the digits. - A
sensor 84 is used to supply emit count signals to acontroller 85 for determining the position of thephotoconductive surface 82. Thecontroller 85 supplies output signals which set various bits in anoutput register 86 which are coupled by acable 87 to the individual light emitting diodes in theblock 83. When a particular bit in theoutput register 86 is set, the corresponding connected LED in theblock 83 is energised. When the bit is reset in theoutput register 86, the corresponding LED is de-energised. - Figure 9 illustrates a controller which can be used in the system of Figure 8. The explanation of the operation of Figure 9 can be more easily understood with the aid of the state diagram of Figure 10. Two clocked J-K flip-
flops 91 and 92 form the state control portion of the controller. The states are numbered zero through three, corresponding to the binary values in the flip-flops 91 and 92 and decoded by a decoder 93. The timing control is provided by a zero-crossing detector 94 which is coupled to the a-c power line and provides an output signal ZX each time the alternating current input power voltage has a zero value. Such zero-crossing detectors are well known in the art and need no further explanation for an understanding of the invention. - The timing signal ZX is also applied to a divide-by-three
circuit 95 which produces a control signal ZX3 which occurs every third zero-crossing of the input power. - It is assumed that the initial controller state is zero during which time the data to be printed is loaded into a data shift register 96 by a means not shown but which is well known in the art. During the state zero, a four-stage character counter 97 is cleared.
- Also provided is a two-stage H-
counter 98 which provides part of the character address as will be explained in greater detail below. A Read-Only Memory 99 (ROM) is also supplied. The ROM has amemory address register 910 and adata register 911. Table I illustrates the ROM data to produce the font of Figures 6 and 7 using five in-line LED's for simplicity of explanation rather than the offset LED's as shown in the block 83 (Figure 8). - The ROM address is a combination or concatenation of two bits of the two-stage H-
counter 98 and the four bits of the binary coded decimal digit being displayed which is in the left-hand stage 961 of the data shift register 96. The output data comprises eight bits, the first five corresponding to the five diodes to be controlled, the least significant three bits being zero and not used. - The output data from the data register 911 is gated to the output register 86 (Figure 8) by a network of AND
gates 914 which is enabled by the state three (S3) signal from the decoder 93. - The three columns of the font are identified by the first three values of the two-stage H-
counter 98, viz., 00, 01, and 10. When the two-stage H-counter reaches a value of three, the character in the shift register stage 961 has been printed. The value of three in the H-counter 98 is detected by an ANDgate 915 which produces a signal H=3 and by aninverter 916 which supplies the signal H*3. - It is assumed that each copy sheet to be printed will contain eight characters. These are counted by the CH-counter 97. A
NAND gate 917 provides an output signal indicating that the character count is not equal to eight. - In the operation of the controller, the
output gates 914 are enabled at every third zero-crossing of the power, i.e., every S3 state. Each of the columns, therefore, has a width equal to the linear travel of the photoconductor in a period equal to three zero-crossings, i.e., 1/20-th of a second. - The detailed operation of the controller is as follows. The EC signal, which indicates that the drum is in proper position to begin forming the characters, sets the flip-flop 92 causing the controller to enter state one. During state one, the information is read from the ROM at the address determined by the H-counter bits and the BCD character bits of the character in the stage 961. With the flip-flop 92 set, the ZX3 signal activates an AND
gate 920 which causes the ZX signal to set the flip-flop 92. The CH*8 signal from theNAND gate 917 is high so that the flip-flop 92 remains in the set state. This causes the controller to enter state three which gates the data register 911 to the output register via thegates 914. Also, the state three signal increments the H-counter 98 by one. At the next zero-crossing, the machine returns to state one if the H-counter has not reached the value of three. This is caused by the ZX signal clocking the J-K flip-flop 91 with only the K input (H#3) signal high. Initially, the first two ROM address bits are 00 and the other four bits are the BCD equivalent of the character being written. Therefore, at the next ZX3 time, the BCD digits of the address are the same but the H-counter now has a value of 01 so that the second column of the data controlling the digit are accessed from the ROM and at state three are gated to the output register. This sequence continues until after the third column is printed and the H-counter is incremented to a value of three. - When H=3, the next zero-crossing causes the controller to enter state two, caused by clocking the flip-flop 92 with both inputs high, the K input signal being the high output signal from the AND
gate 921. - In state two, the data register 96 is shifted to place the next digit in stage 961 and the H-
counter 98 is cleared to zero. Also, the CH-counter 97 is incremented by one. With the CH*8, the next zero-crossing causes the machine to enter state one where the above sequence is repeated for the second digit. - The above-described operation is repeated until all eight characters have been printed at which time the low signal from the
NAND gate 917 at the J input of the flip-flop 92 causes the flip-flop 92 to be reset and the controller assumes the original state zero. - In a copier incorporating a microprocessor for effecting operational control, it is possible for the microprocessor to perform the functions of the above described controller in addition to its other functions. By doing this, the cost of the hardware is reduced, and flexibility is increased. For example differing character fonts may be generated. The following description details the operation of a microprocessor to control the edge erase device.
- Microprocessor are well known in the art and commercially available. The following description and flowcharts can be applied to any of the available microprocessors. Appendix B hereto describes the conventions employed in the flowcharts (Charts I to III). The numbers in the right-hand column identify the hexadecimal address of the first instruction in the attached programs related to the associated step. The attached programs can be used on a microprocessor such as that described in U.S. Patent Specification No. 4170414. Appendix A summarizes the relevant instructions.
- The program for controlling a copier must perform many tasks in addition to the program being described. Therefore, certain portions of the invention may be found in separate routines. In one embodiment, a STARTOUT routine is used to begin the data output according to the invention. This is flowcharted in Chart I and is used to initialize the data output before printing. The STARTOUT routine performs several functions. It loads the contents of the next register to be displayed into OUTDATA1 (low order byte) and OUTDATA2 (high order byte) registers. These correspond to the data shift register 96 (Figure 9). The data is left-justified to suppress leading zeros and an output character count (CHARCNT) is appropriately incremented to insure that the output of only valid (justified) data. The output control counter is initialized to a value of -1 and the current character (CURRCHAR) and last character (LASTCHAR) registers are loaded with an address to insure that a null output precedes the data. The STARTOUT routine is called by a CZCOUNT routine, a pseudo-emitter routine which is used to control the timing. As shown in Chart I, the STARTOUT routine sets the OUTPTNOW bit at
line 2. This bit is used to indicate to another routine (LEDWRITE) that the data is ready for printing. Next, the OUTFETCH subroutine is called. This subroutine fetches and converts the register content to be displayed. It loads the contents from a selected register whose value is expressed in binary and converts it to eight binary coded decimal digits for data output. (OUTFETCH is flowcharted in Chart II below.) - At
line 4, the output mode counters are initialized by clearing CHARCNT to zero and setting OUTCOUNT to -1. Next, a loop is performed whileCHARCNT# 8 and the higher order digit is equal to zero. The zero is shifted out and the CHARCNT is incremented by one. If an odd-number character is in the high order digit, the program transfers to line 11. Otherwise, as shown asstep 9, all the lower digits are shifted two places to the left and the loop repeated. After this is completed, i.e., CHARCNT=8 or the high order digit is not zero, the subroutine returns to the calling routine. - In Chart 11, the OUTFETCH routine is detailed. First, the address of the next register to be written is fetched. The DIVIDE routine is called which divides the register value by 10,000. This, in effect, splits the register into two four decimal digit values. Next, the subroutine BINBCD is called to convert the high order digits to be BCD. Conversion of binary to BCD is well known in the art and need not be explained for an understanding of the invention. Next, the binary coded digits are stored in the high output register OUTDATA2, and the BINBCD subroutine is called to convert the lower order digits to BCD which are then stored in the low output register OUTDATA1.
- The LEDWRITE routine (Chart III) is used to write the data onto the photoconductor using the variable edge erase lamps. The written image is then developed and transferred to a copy sheet as is well known in the art. The following steps have already been done by the STARTOUT routine before calling the LEDWRITE routine. The data to be printed is stored in the OUTDATA registers in BCD format, the number of trailing digits, i.e., those to be skipped because of zero suppression, is stored in CHARCNT, and an address eleven bytes before the first null character address in the output table has been loaded into the CURRCHAR and LASTCHAR registers. (This address is symbolically indicated as CHARNPO-1 1.) The output control counter, OUTCOUNT, has been set to -1. The OUTPTNOW bit is tested (step 2) and, if not set, the program branches to step 17 which ends (exits) the routine. Otherwise, the routine goes to step four where it is determined whether it is time to change the output. If the output is not to be changed, the current output pattern is written and the routine ends. The output is changed at every third zero-crossing as signified by a bit which is supplied by another program before the LEDWRITE routine is called. If it is time to change the output, the output change counter is reset and the position counter is incremented by one. A test is made to determine whether the position counter indicates position four. If not, the pointer is changed to the next output state and the LASTCHAR address is tested to determine whether it is beyond the end of the font table. If not, the last character bit pattern is loaded and the current character and last character bits are combined. This will be explained below in more detail. At the step 14, the lamps not to be written are turned off and the lights to be written will be turned on at the next zero-crossing. Next, the character count is checked. If equal to ten, then OUTPTNOW bit is reset and the routine ends. If the character count is not equal to ten, the routine ends and will be resumed on the next zero-crossing. At step nine, if position four was sensed, the counter is returned to position zero and the current table address is moved to the last table address, the character count is incremented by one, and it is determined whether the last character has been written. If so, the CHARNPO (null character) is moved to the current character.
- Because the LED's are offset, some of the next character positions will be encountered before the last character positions of the current character so the bits of the current character and last character are combined. This is done by shifting the last character to the left and ORing the bits of the next character into the resulting low order zero bits.
- Table II below represents a font table useful for the offset LED writing where the location of the first character of position zero begins at the hexadecimal address F7B8. The contents of the memory are indicated in hexadecimal characters.
-
-
-
Claims (5)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14671480A | 1980-05-05 | 1980-05-05 | |
US146714 | 1980-05-05 |
Publications (3)
Publication Number | Publication Date |
---|---|
EP0039403A2 EP0039403A2 (en) | 1981-11-11 |
EP0039403A3 EP0039403A3 (en) | 1982-03-17 |
EP0039403B1 true EP0039403B1 (en) | 1984-03-14 |
Family
ID=22518657
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP81102041A Expired EP0039403B1 (en) | 1980-05-05 | 1981-03-19 | Xerographic copier including controllable erase system |
Country Status (8)
Country | Link |
---|---|
EP (1) | EP0039403B1 (en) |
JP (1) | JPS572061A (en) |
BR (1) | BR8102740A (en) |
CA (1) | CA1176301A (en) |
DE (1) | DE3162574D1 (en) |
ES (1) | ES501850A0 (en) |
IE (1) | IE51609B1 (en) |
ZA (1) | ZA812195B (en) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5952674A (en) * | 1982-09-03 | 1984-03-27 | Tokyo Electric Co Ltd | Printer |
JPS60140287A (en) * | 1983-12-28 | 1985-07-25 | Mita Ind Co Ltd | Destaticizing lamp device |
JPS6143047U (en) * | 1984-08-21 | 1986-03-20 | ジューキ株式会社 | Latent image generation head |
GB8426046D0 (en) * | 1984-10-15 | 1984-11-21 | Xerox Corp | Electrophotographic apparatus |
JPS6295070A (en) * | 1985-10-22 | 1987-05-01 | Futaba Corp | Optical writing device |
JPS62108666A (en) * | 1985-11-06 | 1987-05-19 | Canon Inc | Image forming device |
JPH02201386A (en) * | 1989-01-30 | 1990-08-09 | Canon Inc | Image recording device |
KR200460323Y1 (en) * | 2011-06-29 | 2012-05-15 | 강학현 | Final member for laminate floor board |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5339124A (en) * | 1976-09-21 | 1978-04-10 | Mitsubishi Electric Corp | Image former |
JPS5492261A (en) * | 1977-12-29 | 1979-07-21 | Konishiroku Photo Ind Co Ltd | Destaticizing device in electrophotographic copier |
US4255042A (en) * | 1979-03-26 | 1981-03-10 | International Business Machines Corporation | Light pipe for accurate erasure of photoconductor charge |
-
1981
- 1981-03-13 JP JP3550981A patent/JPS572061A/en active Granted
- 1981-03-19 EP EP81102041A patent/EP0039403B1/en not_active Expired
- 1981-03-19 DE DE8181102041T patent/DE3162574D1/en not_active Expired
- 1981-03-26 CA CA000373903A patent/CA1176301A/en not_active Expired
- 1981-04-01 ZA ZA00812195A patent/ZA812195B/en unknown
- 1981-05-04 ES ES501850A patent/ES501850A0/en active Granted
- 1981-05-04 IE IE980/81A patent/IE51609B1/en unknown
- 1981-05-05 BR BR8102740A patent/BR8102740A/en unknown
Also Published As
Publication number | Publication date |
---|---|
ES8301372A1 (en) | 1982-11-16 |
JPS572061A (en) | 1982-01-07 |
DE3162574D1 (en) | 1984-04-19 |
ES501850A0 (en) | 1982-11-16 |
CA1176301A (en) | 1984-10-16 |
EP0039403A3 (en) | 1982-03-17 |
ZA812195B (en) | 1982-04-28 |
EP0039403A2 (en) | 1981-11-11 |
JPS6119990B2 (en) | 1986-05-20 |
BR8102740A (en) | 1982-01-26 |
IE810980L (en) | 1981-11-05 |
IE51609B1 (en) | 1987-01-21 |
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