DE69942862D1 - Herstellungsverfahren für nicht-flüchtige Schwebegatespeicherzellen und Kontrollschaltkreis - Google Patents
Herstellungsverfahren für nicht-flüchtige Schwebegatespeicherzellen und KontrollschaltkreisInfo
- Publication number
- DE69942862D1 DE69942862D1 DE69942862T DE69942862T DE69942862D1 DE 69942862 D1 DE69942862 D1 DE 69942862D1 DE 69942862 T DE69942862 T DE 69942862T DE 69942862 T DE69942862 T DE 69942862T DE 69942862 D1 DE69942862 D1 DE 69942862D1
- Authority
- DE
- Germany
- Prior art keywords
- control circuit
- manufacturing process
- floating gate
- storage cell
- cell manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 210000000352 storage cell Anatomy 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
- H10B41/42—Simultaneous manufacture of periphery and memory cells
- H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP99830755A EP1107309B1 (de) | 1999-12-06 | 1999-12-06 | Herstellungsverfahren für nicht-flüchtige Schwebegatespeicherzellen und Kontrollschaltkreis |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69942862D1 true DE69942862D1 (de) | 2010-11-25 |
Family
ID=8243703
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69942862T Expired - Lifetime DE69942862D1 (de) | 1999-12-06 | 1999-12-06 | Herstellungsverfahren für nicht-flüchtige Schwebegatespeicherzellen und Kontrollschaltkreis |
Country Status (3)
Country | Link |
---|---|
US (1) | US6420223B2 (de) |
EP (1) | EP1107309B1 (de) |
DE (1) | DE69942862D1 (de) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20010102269A (ko) * | 1999-12-21 | 2001-11-15 | 롤페스 요하네스 게라투스 알베르투스 | 하나의 기판 상에 적어도 하나의 메모리 셀과 적어도하나의 로직 트랜지스터를 제조하는 방법 및 하나의 기판상에 적어도 하나의 메모리 셀과 적어도 하나의 고전압트랜지스터를 제조하는 방법 및 반도체 장치 |
JP2002064157A (ja) * | 2000-06-09 | 2002-02-28 | Toshiba Corp | 半導体メモリ集積回路及びその製造方法 |
TW587314B (en) * | 2003-02-19 | 2004-05-11 | Winbond Electronics Corp | Method of fabricating flash memory |
US7244651B2 (en) * | 2003-05-21 | 2007-07-17 | Texas Instruments Incorporated | Fabrication of an OTP-EPROM having reduced leakage current |
US6689653B1 (en) * | 2003-06-18 | 2004-02-10 | Chartered Semiconductor Manufacturing Ltd. | Method of preserving the top oxide of an ONO dielectric layer via use of a capping material |
US6869844B1 (en) * | 2003-11-05 | 2005-03-22 | Advanced Micro Device, Inc. | Method and structure for protecting NROM devices from induced charge damage during device fabrication |
US7091130B1 (en) * | 2004-06-25 | 2006-08-15 | Freescale Semiconductor, Inc. | Method of forming a nanocluster charge storage device |
US7361543B2 (en) * | 2004-11-12 | 2008-04-22 | Freescale Semiconductor, Inc. | Method of forming a nanocluster charge storage device |
US9026719B2 (en) | 2012-11-15 | 2015-05-05 | Elwha, Llc | Intelligent monitoring for computation in memory |
US9570592B2 (en) * | 2015-06-08 | 2017-02-14 | Silicon Storage Technology, Inc. | Method of forming split gate memory cells with 5 volt logic devices |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3174858D1 (en) * | 1980-12-25 | 1986-07-24 | Fujitsu Ltd | Nonvolatile semiconductor memory device |
JP3059442B2 (ja) * | 1988-11-09 | 2000-07-04 | 株式会社日立製作所 | 半導体記憶装置 |
IT1225873B (it) * | 1987-07-31 | 1990-12-07 | Sgs Microelettrica S P A Catan | Procedimento per la fabbricazione di celle di memoria eprom cmos con riduzione del numero di fasi di mascheratura. |
US5223451A (en) * | 1989-10-06 | 1993-06-29 | Kabushiki Kaisha Toshiba | Semiconductor device wherein n-channel MOSFET, p-channel MOSFET and nonvolatile memory cell are formed in one chip and method of making it |
US5340764A (en) * | 1993-02-19 | 1994-08-23 | Atmel Corporation | Integration of high performance submicron CMOS and dual-poly non-volatile memory devices using a third polysilicon layer |
JP2848223B2 (ja) * | 1993-12-01 | 1999-01-20 | 日本電気株式会社 | 不揮発性半導体記憶装置の消去方法及び製造方法 |
JP3107199B2 (ja) * | 1996-08-29 | 2000-11-06 | 日本電気株式会社 | 不揮発性半導体記憶装置の製造方法 |
JP3149937B2 (ja) * | 1997-12-08 | 2001-03-26 | 日本電気株式会社 | 半導体装置およびその製造方法 |
US5863820A (en) * | 1998-02-02 | 1999-01-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integration of sac and salicide processes on a chip having embedded memory |
US5991204A (en) * | 1998-04-15 | 1999-11-23 | Chang; Ming-Bing | Flash eeprom device employing polysilicon sidewall spacer as an erase gate |
KR100275741B1 (ko) * | 1998-08-31 | 2000-12-15 | 윤종용 | 비휘발성 기억소자의 제조방법 |
KR100277873B1 (ko) * | 1998-12-01 | 2001-01-15 | 김영환 | 반도체 소자의 제조 방법 |
-
1999
- 1999-12-06 EP EP99830755A patent/EP1107309B1/de not_active Expired - Lifetime
- 1999-12-06 DE DE69942862T patent/DE69942862D1/de not_active Expired - Lifetime
-
2000
- 2000-12-05 US US09/730,518 patent/US6420223B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US20010016390A1 (en) | 2001-08-23 |
EP1107309A1 (de) | 2001-06-13 |
EP1107309B1 (de) | 2010-10-13 |
US6420223B2 (en) | 2002-07-16 |
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