DE69918636D1 - Verfahren zur herstellung einer halbleitervorrichtung - Google Patents

Verfahren zur herstellung einer halbleitervorrichtung

Info

Publication number
DE69918636D1
DE69918636D1 DE69918636T DE69918636T DE69918636D1 DE 69918636 D1 DE69918636 D1 DE 69918636D1 DE 69918636 T DE69918636 T DE 69918636T DE 69918636 T DE69918636 T DE 69918636T DE 69918636 D1 DE69918636 D1 DE 69918636D1
Authority
DE
Germany
Prior art keywords
producing
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69918636T
Other languages
English (en)
Other versions
DE69918636T2 (de
Inventor
D Verhaar
C Garbe
J Dormans
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of DE69918636D1 publication Critical patent/DE69918636D1/de
Application granted granted Critical
Publication of DE69918636T2 publication Critical patent/DE69918636T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/49—Simultaneous manufacture of periphery and memory cells comprising different types of peripheral transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE69918636T 1998-05-04 1999-04-22 Verfahren zur herstellung einer halbleitervorrichtung Expired - Lifetime DE69918636T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP98201434 1998-05-04
EP98201434 1998-05-04
PCT/IB1999/000723 WO1999057750A2 (en) 1998-05-04 1999-04-22 Method of manufacturing a semiconductor device

Publications (2)

Publication Number Publication Date
DE69918636D1 true DE69918636D1 (de) 2004-08-19
DE69918636T2 DE69918636T2 (de) 2005-07-21

Family

ID=8233670

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69918636T Expired - Lifetime DE69918636T2 (de) 1998-05-04 1999-04-22 Verfahren zur herstellung einer halbleitervorrichtung

Country Status (7)

Country Link
US (1) US6174759B1 (de)
EP (1) EP0996971B1 (de)
JP (1) JP2002509652A (de)
KR (1) KR100560270B1 (de)
DE (1) DE69918636T2 (de)
TW (1) TW420874B (de)
WO (1) WO1999057750A2 (de)

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EP1005079B1 (de) * 1998-11-26 2012-12-26 STMicroelectronics Srl Integrationsverfahren eines Festwertspeichers und eines Hochleistungslogikschaltkreises auf einem Chip
KR100336040B1 (ko) * 1999-04-23 2002-05-08 윤종용 할로 구조를 지닌 전계 효과 트랜지스터 및 제조 방법
JP4859290B2 (ja) * 2001-06-21 2012-01-25 富士通セミコンダクター株式会社 半導体集積回路装置の製造方法
US6678190B2 (en) 2002-01-25 2004-01-13 Ememory Technology Inc. Single poly embedded eprom
US6518614B1 (en) 2002-02-19 2003-02-11 International Business Machines Corporation Embedded one-time programmable non-volatile memory using prompt shift device
JP4557950B2 (ja) * 2002-05-10 2010-10-06 株式会社東芝 不揮発性半導体記憶置
JP3906177B2 (ja) 2002-05-10 2007-04-18 株式会社東芝 不揮発性半導体記憶装置
US6649475B1 (en) 2002-05-31 2003-11-18 Megawin Technology Co., Ltd. Method of forming twin-spacer gate flash device and the structure of the same
KR20050013214A (ko) * 2002-06-20 2005-02-03 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 반도체 장치 제조 방법, 반도체 장치 및 비휘발성 메모리
US7064978B2 (en) * 2002-07-05 2006-06-20 Aplus Flash Technology, Inc. Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
US6850438B2 (en) * 2002-07-05 2005-02-01 Aplus Flash Technology, Inc. Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations
US6862223B1 (en) * 2002-07-05 2005-03-01 Aplus Flash Technology, Inc. Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
US6841824B2 (en) * 2002-09-04 2005-01-11 Infineon Technologies Ag Flash memory cell and the method of making separate sidewall oxidation
EP1403927A1 (de) 2002-09-30 2004-03-31 STMicroelectronics S.r.l. Mit Festwertspeicherzellen integrierter Hochspannungstransistor
JP4477886B2 (ja) * 2003-04-28 2010-06-09 株式会社ルネサステクノロジ 半導体装置の製造方法
KR100493061B1 (ko) * 2003-06-20 2005-06-02 삼성전자주식회사 비휘발성 메모리가 내장된 단일 칩 데이터 처리 장치
US7037786B2 (en) * 2003-11-18 2006-05-02 Atmel Corporation Method of forming a low voltage gate oxide layer and tunnel oxide layer in an EEPROM cell
US7777281B2 (en) * 2004-03-26 2010-08-17 Atmel Corporation Non-volatile transistor memory array incorporating read-only elements with single mask set
US7091130B1 (en) * 2004-06-25 2006-08-15 Freescale Semiconductor, Inc. Method of forming a nanocluster charge storage device
US7361543B2 (en) * 2004-11-12 2008-04-22 Freescale Semiconductor, Inc. Method of forming a nanocluster charge storage device
CN100378962C (zh) * 2005-04-18 2008-04-02 力晶半导体股份有限公司 单次可程序化只读存储器的制造方法
US20070141788A1 (en) * 2005-05-25 2007-06-21 Ilan Bloom Method for embedding non-volatile memory with logic circuitry
KR100919433B1 (ko) * 2006-06-29 2009-09-29 삼성전자주식회사 비휘발성 메모리 소자 및 그 제조 방법
KR100843055B1 (ko) * 2006-08-17 2008-07-01 주식회사 하이닉스반도체 플래쉬 메모리 소자 및 그의 제조방법
KR100840651B1 (ko) * 2006-12-29 2008-06-24 동부일렉트로닉스 주식회사 고전압 소자의 이온주입 방법
US7868388B2 (en) 2007-01-31 2011-01-11 Sandisk 3D Llc Embedded memory in a CMOS circuit and methods of forming the same
US7888200B2 (en) 2007-01-31 2011-02-15 Sandisk 3D Llc Embedded memory in a CMOS circuit and methods of forming the same
JP5276282B2 (ja) * 2007-06-08 2013-08-28 ローム株式会社 半導体装置の製造方法
US8501585B2 (en) * 2007-10-10 2013-08-06 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor device
TWI490982B (zh) 2011-08-16 2015-07-01 Maxchip Electronics Corp 半導體結構及其製造方法
US8822289B2 (en) * 2012-12-14 2014-09-02 Spansion Llc High voltage gate formation
US10269822B2 (en) 2015-12-29 2019-04-23 Taiwan Semiconductor Manufacturing Co., Ltd. Method to fabricate uniform tunneling dielectric of embedded flash memory cell
TWI737377B (zh) * 2020-07-01 2021-08-21 力晶積成電子製造股份有限公司 半導體結構及其製作方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57113278A (en) * 1980-12-30 1982-07-14 Fujitsu Ltd Manufactue of eprom device
US4590665A (en) * 1984-12-10 1986-05-27 Solid State Scientific, Inc. Method for double doping sources and drains in an EPROM
JP2825585B2 (ja) * 1990-01-29 1998-11-18 株式会社日立製作所 半導体集積回路装置及びその製造方法
KR960012303B1 (ko) * 1992-08-18 1996-09-18 삼성전자 주식회사 불휘발성 반도체메모리장치 및 그 제조방법
DE69320582T2 (de) * 1992-10-07 1999-04-01 Koninklijke Philips Electronics N.V., Eindhoven Verfahren zur Herstellung eines integrierten Schaltkreises mit einem nichtflüchtigen Speicherelement
US5783471A (en) * 1992-10-30 1998-07-21 Catalyst Semiconductor, Inc. Structure and method for improved memory arrays and improved electrical contacts in semiconductor devices
US5292681A (en) * 1993-09-16 1994-03-08 Micron Semiconductor, Inc. Method of processing a semiconductor wafer to form an array of nonvolatile memory devices employing floating gate transistors and peripheral area having CMOS transistors
US5404037A (en) * 1994-03-17 1995-04-04 National Semiconductor Corporation EEPROM cell with the drain diffusion region self-aligned to the tunnel oxide region
JPH08306888A (ja) * 1995-03-09 1996-11-22 Mitsubishi Electric Corp 半導体装置とその製造方法
JP3008854B2 (ja) * 1996-07-12 2000-02-14 日本電気株式会社 不揮発性半導体記憶装置の製造方法
TW360951B (en) * 1997-04-01 1999-06-11 Nxp Bv Method of manufacturing a semiconductor device

Also Published As

Publication number Publication date
KR100560270B1 (ko) 2006-03-10
WO1999057750A2 (en) 1999-11-11
EP0996971B1 (de) 2004-07-14
WO1999057750A3 (en) 2000-02-03
US6174759B1 (en) 2001-01-16
TW420874B (en) 2001-02-01
DE69918636T2 (de) 2005-07-21
KR20010015540A (ko) 2001-02-26
JP2002509652A (ja) 2002-03-26
EP0996971A2 (de) 2000-05-03

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Legal Events

Date Code Title Description
8320 Willingness to grant licences declared (paragraph 23)
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN

8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL