DE69907566D1 - Reed Solomon Kodierungsgerät und Reed Solomon Kodierungsverfahren - Google Patents

Reed Solomon Kodierungsgerät und Reed Solomon Kodierungsverfahren

Info

Publication number
DE69907566D1
DE69907566D1 DE69907566T DE69907566T DE69907566D1 DE 69907566 D1 DE69907566 D1 DE 69907566D1 DE 69907566 T DE69907566 T DE 69907566T DE 69907566 T DE69907566 T DE 69907566T DE 69907566 D1 DE69907566 D1 DE 69907566D1
Authority
DE
Germany
Prior art keywords
reed solomon
solomon coding
coding method
coding device
reed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69907566T
Other languages
English (en)
Other versions
DE69907566T2 (de
Inventor
Toshihiko Fukuoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE69907566D1 publication Critical patent/DE69907566D1/de
Application granted granted Critical
Publication of DE69907566T2 publication Critical patent/DE69907566T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/28—Programmable structures, i.e. where the code converter contains apparatus which is operator-changeable to modify the conversion process
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Algebra (AREA)
  • General Physics & Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
DE69907566T 1998-06-02 1999-06-01 Reed Solomon Kodierungsgerät und Reed Solomon Kodierungsverfahren Expired - Fee Related DE69907566T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP15319698 1998-06-02
JP15319698A JP3238128B2 (ja) 1998-06-02 1998-06-02 リードソロモン符号化装置および方法

Publications (2)

Publication Number Publication Date
DE69907566D1 true DE69907566D1 (de) 2003-06-12
DE69907566T2 DE69907566T2 (de) 2004-02-19

Family

ID=15557151

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69907566T Expired - Fee Related DE69907566T2 (de) 1998-06-02 1999-06-01 Reed Solomon Kodierungsgerät und Reed Solomon Kodierungsverfahren

Country Status (7)

Country Link
US (1) US6467063B1 (de)
EP (1) EP0963047B1 (de)
JP (1) JP3238128B2 (de)
KR (1) KR100309724B1 (de)
CN (1) CN1164039C (de)
DE (1) DE69907566T2 (de)
TW (1) TW418571B (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001188468A (ja) * 1999-12-27 2001-07-10 Toyo Commun Equip Co Ltd ガロア体上の元の除算演算方法および除算演算回路
US6647051B1 (en) * 1999-12-29 2003-11-11 Koninklijke Philips Electronics N.V. Zero delay mask for galois LFSR
JP2001298370A (ja) * 2000-04-13 2001-10-26 Matsushita Electric Ind Co Ltd 符号化装置
US6725412B1 (en) * 2000-08-15 2004-04-20 Dolby Laboratories Licensing Corporation Low latency data encoder
US6836869B1 (en) * 2001-02-02 2004-12-28 Cradle Technologies, Inc. Combined cyclic redundancy check (CRC) and Reed-Solomon (RS) error checking unit
JP2003032122A (ja) * 2001-07-18 2003-01-31 Nec Eng Ltd 符号化装置
US20030061527A1 (en) * 2001-09-26 2003-03-27 Intel Corporation Method and apparatus for realigning bits on a parallel bus
KR100920723B1 (ko) * 2002-10-08 2009-10-07 삼성전자주식회사 동적환경변화에 적응가능한 단일반송파 전송시스템 및 그방법
KR100638741B1 (ko) 2005-07-05 2006-10-30 한국전자통신연구원 프로그램 가능한 오류정정 부호화 장치
US7761776B1 (en) * 2005-11-03 2010-07-20 Xilinx, Inc. Method and apparatus for a modular, programmable cyclic redundancy check design
JP4595055B2 (ja) * 2005-11-07 2010-12-08 ルネサスエレクトロニクス株式会社 ガロア体のα乗算回路および演算回路
US7836386B2 (en) * 2006-09-27 2010-11-16 Qimonda Ag Phase shift adjusting method and circuit
CN100425000C (zh) * 2006-09-30 2008-10-08 东南大学 双涡轮结构低密度奇偶校验码解码器及解码方法
CN100459438C (zh) * 2006-10-20 2009-02-04 东南大学 里德所罗门解码器的关键方程与错误值求解优化电路
US8099655B1 (en) * 2007-12-20 2012-01-17 Pmc-Sierra Us, Inc. Galois field multiplier system and method
JP5100446B2 (ja) * 2008-02-28 2012-12-19 東光東芝メーターシステムズ株式会社 電力量計
EP2283417B1 (de) * 2008-05-12 2014-01-29 QUALCOMM Incorporated Implementierung einer beliebigen galois-feldarithmetik auf einem programmierbaren prozessor
JP5157018B2 (ja) * 2010-06-21 2013-03-06 ネッツエスアイ東洋株式会社 ガロア体上の元の除算演算回路
JP5211398B2 (ja) * 2010-06-21 2013-06-12 ネッツエスアイ東洋株式会社 ガロア体上の元の除算演算回路
CN108665940B (zh) * 2018-05-14 2020-09-04 联芸科技（杭州）有限公司 Ecc编码电路、解码电路以及存储器控制器
CN111884680A (zh) * 2020-06-20 2020-11-03 青岛鼎信通讯股份有限公司 一种应用于电力线载波通信***的rs编码方法
US20230305846A1 (en) * 2022-03-24 2023-09-28 Intel Corporation Processor hardware and instructions for vectorized fused and-xor

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5130990A (en) * 1990-02-15 1992-07-14 The United States Of America, As Represented By The Administrator, National Aeronautics And Space Administration VLSI architecture for a Reed-Solomon decoder
US5323402A (en) * 1991-02-14 1994-06-21 The Mitre Corporation Programmable systolic BCH decoder
JP2543319B2 (ja) 1993-09-24 1996-10-16 三菱電機株式会社 符号化装置
US5642367A (en) * 1994-02-07 1997-06-24 Mitsubishi Semiconductor America, Inc. Finite field polynomial processing module for error control coding
JP2725598B2 (ja) 1994-05-13 1998-03-11 日本電気株式会社 誤り訂正符号化器
US5914969A (en) 1995-10-03 1999-06-22 Matsushita Electric Industrial Co., Ltd. Device and method for error correcting coding, and device and method for error correcting decoding
JP3614978B2 (ja) 1996-05-13 2005-01-26 株式会社東芝 ガロア体の除算方法および除算装置
KR100192795B1 (ko) * 1996-05-14 1999-06-15 전주범 리드 솔로몬 복호기의 에러 위치 다항식 계산 장치
JPH09331263A (ja) 1996-06-11 1997-12-22 Seiko Epson Corp 誤り訂正方法及び装置
JP3233860B2 (ja) * 1996-10-25 2001-12-04 松下電器産業株式会社 リードソロモン復号器
JPH10135848A (ja) 1996-10-30 1998-05-22 Texas Instr Japan Ltd リードソロモン符号化装置およびその方法

Also Published As

Publication number Publication date
KR20000005785A (ko) 2000-01-25
US6467063B1 (en) 2002-10-15
JP3238128B2 (ja) 2001-12-10
CN1238604A (zh) 1999-12-15
EP0963047A3 (de) 2000-07-19
EP0963047A2 (de) 1999-12-08
DE69907566T2 (de) 2004-02-19
CN1164039C (zh) 2004-08-25
EP0963047B1 (de) 2003-05-07
JPH11346157A (ja) 1999-12-14
TW418571B (en) 2001-01-11
KR100309724B1 (ko) 2001-09-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP

8339 Ceased/non-payment of the annual fee