DE69807783D1 - Festwertspeicher-Prüfungschaltung - Google Patents

Festwertspeicher-Prüfungschaltung

Info

Publication number
DE69807783D1
DE69807783D1 DE69807783T DE69807783T DE69807783D1 DE 69807783 D1 DE69807783 D1 DE 69807783D1 DE 69807783 T DE69807783 T DE 69807783T DE 69807783 T DE69807783 T DE 69807783T DE 69807783 D1 DE69807783 D1 DE 69807783D1
Authority
DE
Germany
Prior art keywords
rom
embedded
chip
adjacent
chips
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69807783T
Other languages
English (en)
Other versions
DE69807783T2 (de
Inventor
Akira Ban
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69807783D1 publication Critical patent/DE69807783D1/de
Publication of DE69807783T2 publication Critical patent/DE69807783T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
    • G01R31/318511—Wafer Test

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Microcomputers (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
DE69807783T 1997-06-13 1998-06-12 Festwertspeicher-Prüfungschaltung Expired - Fee Related DE69807783T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9156579A JP2944578B2 (ja) 1997-06-13 1997-06-13 Ｒｏｍテスト回路

Publications (2)

Publication Number Publication Date
DE69807783D1 true DE69807783D1 (de) 2002-10-17
DE69807783T2 DE69807783T2 (de) 2003-05-28

Family

ID=15630856

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69807783T Expired - Fee Related DE69807783T2 (de) 1997-06-13 1998-06-12 Festwertspeicher-Prüfungschaltung

Country Status (4)

Country Link
US (1) US6065142A (de)
EP (1) EP0884680B1 (de)
JP (1) JP2944578B2 (de)
DE (1) DE69807783T2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020070278A (ko) * 1999-11-15 2002-09-05 가부시키가이샤 히타치세이사쿠쇼 반도체 메모리의 검사방법
JP2002184948A (ja) * 2000-12-12 2002-06-28 Hitachi Ltd 半導体集積回路装置の製造方法
JP4045262B2 (ja) * 2004-07-02 2008-02-13 沖電気工業株式会社 Ｒｏｍテスト方法及びｒｏｍテスト回路

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1989000728A1 (en) * 1987-07-17 1989-01-26 Ivor Catt Integrated circuits
JPS6428835A (en) * 1987-07-23 1989-01-31 New Japan Radio Co Ltd Method for testing function of ic chip
JP2672861B2 (ja) * 1989-07-10 1997-11-05 アルプス電気株式会社 駆動制御回路
JPH05218157A (ja) * 1992-01-31 1993-08-27 Hitachi Ltd 半導体装置
JP3377225B2 (ja) * 1992-04-07 2003-02-17 富士写真フイルム株式会社 チェック回路を含む集積回路
JPH06230086A (ja) * 1992-09-22 1994-08-19 Nec Corp Ｌｓｉのテスト回路
JPH06150698A (ja) * 1992-11-13 1994-05-31 Kawasaki Steel Corp 半導体集積回路
US5440724A (en) * 1993-06-17 1995-08-08 Bull Hn Information Systems Inc. Central processing unit using dual basic processing units and combined result bus and incorporating means for obtaining access to internal BPU test signals

Also Published As

Publication number Publication date
JPH117799A (ja) 1999-01-12
EP0884680B1 (de) 2002-09-11
EP0884680A1 (de) 1998-12-16
US6065142A (en) 2000-05-16
DE69807783T2 (de) 2003-05-28
JP2944578B2 (ja) 1999-09-06

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee