DE69629910D1 - Statischer RAM mit verminderter Leistungsaufnahme - Google Patents
Statischer RAM mit verminderter LeistungsaufnahmeInfo
- Publication number
- DE69629910D1 DE69629910D1 DE69629910T DE69629910T DE69629910D1 DE 69629910 D1 DE69629910 D1 DE 69629910D1 DE 69629910 T DE69629910 T DE 69629910T DE 69629910 T DE69629910 T DE 69629910T DE 69629910 D1 DE69629910 D1 DE 69629910D1
- Authority
- DE
- Germany
- Prior art keywords
- power consumption
- reduced power
- static ram
- static
- ram
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/418—Address circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP96830203A EP0801394B1 (de) | 1996-04-11 | 1996-04-11 | Statischer RAM mit verminderter Leistungsaufnahme |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69629910D1 true DE69629910D1 (de) | 2003-10-16 |
DE69629910T2 DE69629910T2 (de) | 2004-07-15 |
Family
ID=8225877
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69629910T Expired - Fee Related DE69629910T2 (de) | 1996-04-11 | 1996-04-11 | Statischer RAM mit verminderter Leistungsaufnahme |
Country Status (3)
Country | Link |
---|---|
US (1) | US5818775A (de) |
EP (1) | EP0801394B1 (de) |
DE (1) | DE69629910T2 (de) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9865316B2 (en) * | 2016-01-21 | 2018-01-09 | Qualcomm Incorporated | Memory with a word line assertion delayed by a bit line discharge for write operations with improved write time and reduced write power |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5132931A (en) * | 1990-08-28 | 1992-07-21 | Analog Devices, Inc. | Sense enable timing circuit for a random access memory |
JPH06139787A (ja) * | 1992-10-26 | 1994-05-20 | Toshiba Corp | 半導体記憶装置 |
JP2687829B2 (ja) * | 1992-12-21 | 1997-12-08 | 松下電器産業株式会社 | メモリ及びメモリ作成方式 |
US5408438A (en) * | 1993-06-01 | 1995-04-18 | Matsushita Electric Industrial Co., Ltd. | Semiconductor memory |
-
1996
- 1996-04-11 DE DE69629910T patent/DE69629910T2/de not_active Expired - Fee Related
- 1996-04-11 EP EP96830203A patent/EP0801394B1/de not_active Expired - Lifetime
-
1997
- 1997-04-10 US US08/833,901 patent/US5818775A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5818775A (en) | 1998-10-06 |
EP0801394B1 (de) | 2003-09-10 |
DE69629910T2 (de) | 2004-07-15 |
EP0801394A1 (de) | 1997-10-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |