DE69602984D1 - Verfahren zum Schützen nichtflüchtiger Speicherbereiche - Google Patents
Verfahren zum Schützen nichtflüchtiger SpeicherbereicheInfo
- Publication number
- DE69602984D1 DE69602984D1 DE69602984T DE69602984T DE69602984D1 DE 69602984 D1 DE69602984 D1 DE 69602984D1 DE 69602984 T DE69602984 T DE 69602984T DE 69602984 T DE69602984 T DE 69602984T DE 69602984 D1 DE69602984 D1 DE 69602984D1
- Authority
- DE
- Germany
- Prior art keywords
- volatile memory
- memory areas
- protecting non
- protecting
- areas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
- G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
- G06F12/1441—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/20—Address safety or protection circuits, i.e. arrangements for preventing unauthorized or accidental access
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Storage Device Security (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9503863A FR2732487B1 (fr) | 1995-03-31 | 1995-03-31 | Procede de protection de zones de memoires non volatiles |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69602984D1 true DE69602984D1 (de) | 1999-07-29 |
DE69602984T2 DE69602984T2 (de) | 1999-10-14 |
Family
ID=9477658
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69602984T Expired - Fee Related DE69602984T2 (de) | 1995-03-31 | 1996-03-06 | Verfahren zum Schützen nichtflüchtiger Speicherbereiche |
Country Status (5)
Country | Link |
---|---|
US (1) | US5812446A (de) |
EP (1) | EP0735489B1 (de) |
JP (1) | JP2727527B2 (de) |
DE (1) | DE69602984T2 (de) |
FR (1) | FR2732487B1 (de) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4572604A (en) * | 1982-08-25 | 1986-02-25 | Elfab Corp. | Printed circuit board finger connector |
FR2757654B1 (fr) * | 1996-12-24 | 1999-02-05 | Sgs Thomson Microelectronics | Memoire avec zones protegees en lecture |
FR2770327B1 (fr) * | 1997-10-24 | 2000-01-14 | Sgs Thomson Microelectronics | Memoire non volatile programmable et effacable electriquement comprenant une zone protegeable en lecture et/ou en ecriture et systeme electronique l'incorporant |
US6295640B1 (en) * | 1998-05-08 | 2001-09-25 | Apple Computer, Inc. | Method and apparatus for distinguishing reference values from non-reference values in a runtime environment |
JP3389186B2 (ja) | 1999-04-27 | 2003-03-24 | 松下電器産業株式会社 | 半導体メモリカード及び読み出し装置 |
JP2002015584A (ja) * | 2000-06-29 | 2002-01-18 | Sanyo Electric Co Ltd | 不揮発性メモリのリードプロテクト回路 |
US7539828B2 (en) * | 2000-08-08 | 2009-05-26 | Faronics Corporation | Method and system for automatically preserving persistent storage |
US6711701B1 (en) * | 2000-08-25 | 2004-03-23 | Micron Technology, Inc. | Write and erase protection in a synchronous memory |
US7134006B2 (en) * | 2003-06-03 | 2006-11-07 | Gateway Inc. | Method and system for changing software access level within or outside a host protected area |
JP2005108273A (ja) * | 2003-09-26 | 2005-04-21 | Toshiba Corp | 不揮発性半導体記憶装置 |
EP1578051B1 (de) * | 2004-03-18 | 2008-10-29 | STMicroelectronics (Research & Development) Limited | Vorrichtung mit einer Schlüsselauswahleniheit und ein Mechanismus zur Aktualisierung der Schüssel für die verschlüsselung/Entschlüsselung von daten die in einen Speicher geschrieben/gelesen werden. |
US7483313B2 (en) * | 2007-01-31 | 2009-01-27 | Dell Products, Lp | Dual ported memory with selective read and write protection |
KR20110132553A (ko) * | 2009-02-23 | 2011-12-08 | 소니 주식회사 | 메모리 장치 |
JP2010198071A (ja) * | 2009-02-23 | 2010-09-09 | Sony Corp | メモリ装置 |
US8319738B2 (en) * | 2009-03-03 | 2012-11-27 | Ncr Corporation | Touchscreen module |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0326053B1 (de) * | 1988-01-28 | 1996-06-26 | National Semiconductor Corporation | Datensicherungsverfahren für einen programmierbaren Speicher |
US5493665A (en) * | 1992-12-21 | 1996-02-20 | Base 10 Systems, Inc. | Portable memory device and method of securing the integrity of stored data therein utilizing a starting address and a stored memory cycle number |
US5559992A (en) * | 1993-01-11 | 1996-09-24 | Ascom Autelca Ag | Apparatus and method for protecting data in a memory address range |
US5363334A (en) * | 1993-04-10 | 1994-11-08 | Microchip Technology Incorporated | Write protection security for memory device |
US5592641A (en) * | 1993-06-30 | 1997-01-07 | Intel Corporation | Method and device for selectively locking write access to blocks in a memory array using write protect inputs and block enabled status |
-
1995
- 1995-03-31 FR FR9503863A patent/FR2732487B1/fr not_active Expired - Fee Related
-
1996
- 1996-03-06 DE DE69602984T patent/DE69602984T2/de not_active Expired - Fee Related
- 1996-03-06 EP EP96470004A patent/EP0735489B1/de not_active Expired - Lifetime
- 1996-03-28 US US08/623,044 patent/US5812446A/en not_active Expired - Lifetime
- 1996-03-29 JP JP10419096A patent/JP2727527B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
FR2732487B1 (fr) | 1997-05-30 |
JPH08286976A (ja) | 1996-11-01 |
JP2727527B2 (ja) | 1998-03-11 |
US5812446A (en) | 1998-09-22 |
EP0735489A1 (de) | 1996-10-02 |
FR2732487A1 (fr) | 1996-10-04 |
EP0735489B1 (de) | 1999-06-23 |
DE69602984T2 (de) | 1999-10-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |