DE69425426D1 - Mehrfache blockmodus-operationen in einem rasterpuffersystem für fensteroperationen - Google Patents
Mehrfache blockmodus-operationen in einem rasterpuffersystem für fensteroperationenInfo
- Publication number
- DE69425426D1 DE69425426D1 DE69425426T DE69425426T DE69425426D1 DE 69425426 D1 DE69425426 D1 DE 69425426D1 DE 69425426 T DE69425426 T DE 69425426T DE 69425426 T DE69425426 T DE 69425426T DE 69425426 D1 DE69425426 D1 DE 69425426D1
- Authority
- DE
- Germany
- Prior art keywords
- operations
- buffer system
- block mode
- multiple block
- window
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/02—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
- G09G5/024—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed using colour registers, e.g. to control background, foreground, surface filling
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
- G09G5/393—Arrangements for updating the contents of the bit-mapped memory
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Controls And Circuits For Display Device (AREA)
- Image Input (AREA)
- Digital Computer Display Output (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/145,755 US5533187A (en) | 1993-10-29 | 1993-10-29 | Multiple block mode operations in a frame buffer system designed for windowing operations |
PCT/US1994/012360 WO1995012166A1 (en) | 1993-10-29 | 1994-10-27 | Multiple block mode operations in a frame buffer system designed for windowing operations |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69425426D1 true DE69425426D1 (de) | 2000-09-07 |
DE69425426T2 DE69425426T2 (de) | 2001-03-15 |
Family
ID=22514393
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69425426T Expired - Fee Related DE69425426T2 (de) | 1993-10-29 | 1994-10-27 | Mehrfache blockmodus-operationen in einem rasterpuffersystem für fensteroperationen |
Country Status (6)
Country | Link |
---|---|
US (1) | US5533187A (de) |
EP (1) | EP0677192B1 (de) |
JP (1) | JPH09506440A (de) |
KR (1) | KR100340621B1 (de) |
DE (1) | DE69425426T2 (de) |
WO (1) | WO1995012166A1 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5539430A (en) * | 1993-10-29 | 1996-07-23 | Sun Microsystems, Inc. | Pipelined read write operations in a high speed frame buffer system |
WO1995012191A1 (en) * | 1993-10-29 | 1995-05-04 | Sun Microsystems, Inc. | Method for increasing the rate of scrolling in a frame buffer |
US5633661A (en) * | 1994-11-21 | 1997-05-27 | International Business Machines Corporation | Video display control system having block write with opaque pattern control expansion |
US5764963A (en) * | 1995-07-07 | 1998-06-09 | Rambus, Inc. | Method and apparatus for performing maskable multiple color block writes |
DE69724327T2 (de) * | 1996-05-17 | 2004-06-17 | Hyundai Electronics America Inc., San Jose | Leistungsreduzierung während eines Blockschreibens |
US6944087B2 (en) * | 2001-02-24 | 2005-09-13 | Intel Corporation | Method and apparatus for off boundary memory access |
KR101661026B1 (ko) * | 2014-09-17 | 2016-09-29 | 엘지디스플레이 주식회사 | 표시장치 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4648077A (en) * | 1985-01-22 | 1987-03-03 | Texas Instruments Incorporated | Video serial accessed memory with midline load |
GB2180729B (en) * | 1985-09-13 | 1989-10-11 | Sun Microsystems Inc | Method and apparatus for dma window display |
US4752893A (en) * | 1985-11-06 | 1988-06-21 | Texas Instruments Incorporated | Graphics data processing apparatus having image operations with transparent color having a selectable number of bits |
US5046023A (en) * | 1987-10-06 | 1991-09-03 | Hitachi, Ltd. | Graphic processing system having bus connection control capable of high-speed parallel drawing processing in a frame buffer and a system memory |
US4823302A (en) * | 1987-01-30 | 1989-04-18 | Rca Licensing Corporation | Block oriented random access memory able to perform a data read, a data write and a data refresh operation in one block-access time |
JPS63204595A (ja) * | 1987-02-20 | 1988-08-24 | Fujitsu Ltd | マルチプレ−ンビデオram構成方式 |
US4807189A (en) * | 1987-08-05 | 1989-02-21 | Texas Instruments Incorporated | Read/write memory having a multiple column select mode |
JPH04216392A (ja) * | 1990-12-18 | 1992-08-06 | Mitsubishi Electric Corp | ブロックライト機能を備える半導体記憶装置 |
US5282177A (en) * | 1992-04-08 | 1994-01-25 | Micron Technology, Inc. | Multiple register block write method and circuit for video DRAMs |
-
1993
- 1993-10-29 US US08/145,755 patent/US5533187A/en not_active Expired - Lifetime
-
1994
- 1994-10-27 DE DE69425426T patent/DE69425426T2/de not_active Expired - Fee Related
- 1994-10-27 JP JP7512838A patent/JPH09506440A/ja active Pending
- 1994-10-27 WO PCT/US1994/012360 patent/WO1995012166A1/en active IP Right Grant
- 1994-10-27 KR KR1019950702653A patent/KR100340621B1/ko not_active IP Right Cessation
- 1994-10-27 EP EP94932085A patent/EP0677192B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR100340621B1 (ko) | 2002-10-11 |
KR960700481A (ko) | 1996-01-20 |
JPH09506440A (ja) | 1997-06-24 |
US5533187A (en) | 1996-07-02 |
EP0677192A1 (de) | 1995-10-18 |
WO1995012166A1 (en) | 1995-05-04 |
DE69425426T2 (de) | 2001-03-15 |
EP0677192A4 (de) | 1996-07-24 |
EP0677192B1 (de) | 2000-08-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |