DE69421103T2 - Programmgesteuertes Prozessor - Google Patents

Programmgesteuertes Prozessor

Info

Publication number
DE69421103T2
DE69421103T2 DE69421103T DE69421103T DE69421103T2 DE 69421103 T2 DE69421103 T2 DE 69421103T2 DE 69421103 T DE69421103 T DE 69421103T DE 69421103 T DE69421103 T DE 69421103T DE 69421103 T2 DE69421103 T2 DE 69421103T2
Authority
DE
Germany
Prior art keywords
program controlled
controlled processor
processor
program
controlled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69421103T
Other languages
English (en)
Other versions
DE69421103D1 (de
Inventor
Akihiko Ohtani
Toshiyuki Araki
Kunitoshi Aono
Toshihide Akiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP00895893A external-priority patent/JP3316901B2/ja
Priority claimed from JP09913793A external-priority patent/JP3305406B2/ja
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE69421103D1 publication Critical patent/DE69421103D1/de
Application granted granted Critical
Publication of DE69421103T2 publication Critical patent/DE69421103T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8092—Array of vector units

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
DE69421103T 1993-01-22 1994-01-21 Programmgesteuertes Prozessor Expired - Lifetime DE69421103T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP00895893A JP3316901B2 (ja) 1993-01-22 1993-01-22 データ分配回路
JP09913793A JP3305406B2 (ja) 1993-04-26 1993-04-26 プログラム制御のプロセッサ

Publications (2)

Publication Number Publication Date
DE69421103D1 DE69421103D1 (de) 1999-11-18
DE69421103T2 true DE69421103T2 (de) 2000-06-08

Family

ID=26343590

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69421103T Expired - Lifetime DE69421103T2 (de) 1993-01-22 1994-01-21 Programmgesteuertes Prozessor

Country Status (3)

Country Link
US (1) US5517666A (de)
EP (1) EP0607988B1 (de)
DE (1) DE69421103T2 (de)

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US8775112B2 (en) * 2003-09-15 2014-07-08 Nvidia Corporation System and method for increasing die yield
US8775997B2 (en) 2003-09-15 2014-07-08 Nvidia Corporation System and method for testing and configuring semiconductor functional circuits
US8732644B1 (en) 2003-09-15 2014-05-20 Nvidia Corporation Micro electro mechanical switch system and method for testing and configuring semiconductor functional circuits
US8711161B1 (en) 2003-12-18 2014-04-29 Nvidia Corporation Functional component compensation reconfiguration system and method
US8427490B1 (en) 2004-05-14 2013-04-23 Nvidia Corporation Validating a graphics pipeline using pre-determined schedules
US7577869B2 (en) * 2004-08-11 2009-08-18 Ati Technologies Ulc Apparatus with redundant circuitry and method therefor
US9098932B2 (en) * 2004-08-11 2015-08-04 Ati Technologies Ulc Graphics processing logic with variable arithmetic logic unit control and method therefor
US8723231B1 (en) 2004-09-15 2014-05-13 Nvidia Corporation Semiconductor die micro electro-mechanical switch management system and method
US8624906B2 (en) * 2004-09-29 2014-01-07 Nvidia Corporation Method and system for non stalling pipeline instruction fetching from memory
US8711156B1 (en) * 2004-09-30 2014-04-29 Nvidia Corporation Method and system for remapping processing elements in a pipeline of a graphics processing unit
US8698817B2 (en) * 2004-11-15 2014-04-15 Nvidia Corporation Video processor having scalar and vector components
KR100917067B1 (ko) * 2004-11-15 2009-09-15 엔비디아 코포레이션 비디오 처리
JP4408836B2 (ja) 2005-05-30 2010-02-03 キヤノン株式会社 画像処理装置及びその制御方法、プログラム
JP2007011872A (ja) * 2005-07-01 2007-01-18 Toshiba Corp メモリカードとその制御方法
US9092170B1 (en) 2005-10-18 2015-07-28 Nvidia Corporation Method and system for implementing fragment operation processing across a graphics bus interconnect
FR2895102B1 (fr) * 2005-12-19 2012-12-07 Dxo Labs Procede pour traiter un objet dans une plateforme a processeur(s) et memoire(s) et plateforme utilisant le procede
US8049760B2 (en) * 2006-02-06 2011-11-01 Via Technologies, Inc. System and method for vector computations in arithmetic logic units (ALUs)
US9135017B2 (en) * 2007-01-16 2015-09-15 Ati Technologies Ulc Configurable shader ALU units
US8683126B2 (en) * 2007-07-30 2014-03-25 Nvidia Corporation Optimal use of buffer space by a storage controller which writes retrieved data directly to a memory
US9024957B1 (en) 2007-08-15 2015-05-05 Nvidia Corporation Address independent shader program loading
US8698819B1 (en) 2007-08-15 2014-04-15 Nvidia Corporation Software assisted shader merging
US8659601B1 (en) 2007-08-15 2014-02-25 Nvidia Corporation Program sequencer for generating indeterminant length shader programs for a graphics processor
US8411096B1 (en) 2007-08-15 2013-04-02 Nvidia Corporation Shader program instruction fetch
US8724483B2 (en) * 2007-10-22 2014-05-13 Nvidia Corporation Loopback configuration for bi-directional interfaces
US9064333B2 (en) 2007-12-17 2015-06-23 Nvidia Corporation Interrupt handling techniques in the rasterizer of a GPU
US8780123B2 (en) * 2007-12-17 2014-07-15 Nvidia Corporation Interrupt handling techniques in the rasterizer of a GPU
US8681861B2 (en) * 2008-05-01 2014-03-25 Nvidia Corporation Multistandard hardware video encoder
US8923385B2 (en) * 2008-05-01 2014-12-30 Nvidia Corporation Rewind-enabled hardware encoder
US8489851B2 (en) * 2008-12-11 2013-07-16 Nvidia Corporation Processing of read requests in a memory controller using pre-fetch mechanism
US9331869B2 (en) 2010-03-04 2016-05-03 Nvidia Corporation Input/output request packet handling techniques by a device specific kernel mode driver
JP5835942B2 (ja) 2010-06-25 2015-12-24 キヤノン株式会社 画像処理装置、その制御方法及びプログラム
WO2012052774A2 (en) * 2010-10-21 2012-04-26 Bluwireless Technology Limited Data processing units
CN102495719B (zh) * 2011-12-15 2014-09-24 中国科学院自动化研究所 一种向量浮点运算装置及方法
US9037931B2 (en) 2011-12-21 2015-05-19 Advanced Micro Devices, Inc. Methods and systems for logic device defect tolerant redundancy
US9141885B2 (en) * 2013-07-29 2015-09-22 Adobe Systems Incorporated Visual pattern recognition in an image
US9268597B2 (en) * 2014-04-01 2016-02-23 Google Inc. Incremental parallel processing of data
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US11853237B2 (en) * 2021-11-19 2023-12-26 Micron Technology, Inc. Input/output sequencer instruction set processing

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US4722052A (en) * 1984-04-02 1988-01-26 Sperry Corporation Multiple unit adapter
US4890220A (en) * 1984-12-12 1989-12-26 Hitachi, Ltd. Vector processing apparatus for incrementing indices of vector operands of different length according to arithmetic operation results
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JPS6353678A (ja) * 1986-08-22 1988-03-07 Hitachi Ltd ベクトル処理装置
JPH0648486B2 (ja) * 1986-10-08 1994-06-22 日本電気株式会社 ベクトルデ−タ処理装置
US4837730A (en) * 1987-02-06 1989-06-06 Scientific Computer Systems Corporation Linking scalar results directly to scalar operation inputs on a bidirectional databus in a computer which superpositions vector and scalar operations
JPS63253468A (ja) * 1987-04-10 1988-10-20 Hitachi Ltd ベクトル処理装置
JP2602240B2 (ja) * 1987-08-28 1997-04-23 株式会社日立製作所 マルチプロセツサシステム
US5367654A (en) * 1988-04-13 1994-11-22 Hitachi Ltd. Method and apparatus for controlling storage in computer system utilizing forecasted access requests and priority decision circuitry
JP2584156B2 (ja) * 1990-09-03 1997-02-19 松下電器産業株式会社 プログラム制御型プロセッサ
US5299320A (en) * 1990-09-03 1994-03-29 Matsushita Electric Industrial Co., Ltd. Program control type vector processor for executing a vector pipeline operation for a series of vector data which is in accordance with a vector pipeline

Also Published As

Publication number Publication date
US5517666A (en) 1996-05-14
EP0607988B1 (de) 1999-10-13
EP0607988A1 (de) 1994-07-27
DE69421103D1 (de) 1999-11-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP

8320 Willingness to grant licences declared (paragraph 23)