DE69404601D1 - Resonantes Tunneln in Silizium - Google Patents

Resonantes Tunneln in Silizium

Info

Publication number
DE69404601D1
DE69404601D1 DE69404601T DE69404601T DE69404601D1 DE 69404601 D1 DE69404601 D1 DE 69404601D1 DE 69404601 T DE69404601 T DE 69404601T DE 69404601 T DE69404601 T DE 69404601T DE 69404601 D1 DE69404601 D1 DE 69404601D1
Authority
DE
Germany
Prior art keywords
silicon
resonant tunneling
tunneling
resonant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69404601T
Other languages
English (en)
Other versions
DE69404601T2 (de
Inventor
Alan C Seabaugh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE69404601D1 publication Critical patent/DE69404601D1/de
Publication of DE69404601T2 publication Critical patent/DE69404601T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/88—Tunnel-effect diodes
    • H01L29/882—Resonant tunneling diodes, i.e. RTD, RTBD
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609—Diodes
    • H01L29/66151—Tunnel diodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nanotechnology (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Composite Materials (AREA)
  • Materials Engineering (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
DE69404601T 1993-10-29 1994-10-25 Resonantes Tunneln in Silizium Expired - Lifetime DE69404601T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/145,267 US5796119A (en) 1993-10-29 1993-10-29 Silicon resonant tunneling

Publications (2)

Publication Number Publication Date
DE69404601D1 true DE69404601D1 (de) 1997-09-04
DE69404601T2 DE69404601T2 (de) 1998-01-15

Family

ID=22512324

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69404601T Expired - Lifetime DE69404601T2 (de) 1993-10-29 1994-10-25 Resonantes Tunneln in Silizium

Country Status (5)

Country Link
US (1) US5796119A (de)
EP (1) EP0651447B1 (de)
JP (1) JPH0818029A (de)
KR (1) KR950012750A (de)
DE (1) DE69404601T2 (de)

Families Citing this family (73)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2749977B1 (fr) * 1996-06-14 1998-10-09 Commissariat Energie Atomique Transistor mos a puits quantique et procedes de fabrication de celui-ci
KR100419253B1 (ko) * 2000-11-24 2004-02-19 엘지전자 주식회사 이 쓰리 데이터 프레임 펄스 위치 검출 장치
US7126151B2 (en) * 2001-05-21 2006-10-24 The Regents Of The University Of Colorado, A Body Corporate Interconnected high speed electron tunneling devices
US6967347B2 (en) * 2001-05-21 2005-11-22 The Regents Of The University Of Colorado Terahertz interconnect system and applications
US6534784B2 (en) * 2001-05-21 2003-03-18 The Regents Of The University Of Colorado Metal-oxide electron tunneling device for solar energy conversion
US7388276B2 (en) * 2001-05-21 2008-06-17 The Regents Of The University Of Colorado Metal-insulator varactor devices
US7173275B2 (en) * 2001-05-21 2007-02-06 Regents Of The University Of Colorado Thin-film transistors based on tunneling structures and applications
US6563185B2 (en) * 2001-05-21 2003-05-13 The Regents Of The University Of Colorado High speed electron tunneling device and applications
US6979580B2 (en) * 2002-12-09 2005-12-27 Progressant Technologies, Inc. Process for controlling performance characteristics of a negative differential resistance (NDR) device
US6830964B1 (en) * 2003-06-26 2004-12-14 Rj Mears, Llc Method for making semiconductor device including band-engineered superlattice
FR2876498B1 (fr) 2004-10-12 2008-03-14 Commissariat Energie Atomique Procede de realisation d'heterostructures resonnantes a transport planaire
CN101263606B (zh) * 2005-09-12 2010-12-15 日产自动车株式会社 半导体装置及其制造方法
US7777290B2 (en) * 2006-06-13 2010-08-17 Wisconsin Alumni Research Foundation PIN diodes for photodetection and high-speed, high-resolution image sensing
US9024297B2 (en) 2010-09-17 2015-05-05 The Governors Of The University Of Alberta Two- and three-terminal molecular electronic devices with ballistic electron transport
US10109342B2 (en) 2016-05-11 2018-10-23 Atomera Incorporated Dram architecture to reduce row activation circuitry power and peripheral leakage and related methods
US10170604B2 (en) 2016-08-08 2019-01-01 Atomera Incorporated Method for making a semiconductor device including a resonant tunneling diode with electron mean free path control layers
US10191105B2 (en) 2016-08-17 2019-01-29 Atomera Incorporated Method for making a semiconductor device including threshold voltage measurement circuitry
WO2018213385A1 (en) 2017-05-16 2018-11-22 Atomera Incorporated Semiconductor device and method including a superlattice as a gettering layer
CN110998843B (zh) 2017-06-13 2023-11-03 阿托梅拉公司 具有含超晶格的凹陷的沟道阵列晶体管（rcat）的半导体器件及相关方法
US10109479B1 (en) 2017-07-31 2018-10-23 Atomera Incorporated Method of making a semiconductor device with a buried insulating layer formed by annealing a superlattice
EP3669401B1 (de) 2017-08-18 2023-08-02 Atomera Incorporated Herstellungsverfahren eines halbleiterbauelements mit entfernung von nicht-monokristallinem stringer neben einem übergitter-sti-übergang
US10304881B1 (en) 2017-12-15 2019-05-28 Atomera Incorporated CMOS image sensor with buried superlattice layer to reduce crosstalk
US10361243B2 (en) 2017-12-15 2019-07-23 Atomera Incorporated Method for making CMOS image sensor including superlattice to enhance infrared light absorption
US10608027B2 (en) 2017-12-15 2020-03-31 Atomera Incorporated Method for making CMOS image sensor including stacked semiconductor chips and image processing circuitry including a superlattice
US10461118B2 (en) 2017-12-15 2019-10-29 Atomera Incorporated Method for making CMOS image sensor including photodiodes with overlying superlattices to reduce crosstalk
US10529757B2 (en) 2017-12-15 2020-01-07 Atomera Incorporated CMOS image sensor including pixels with read circuitry having a superlattice
US10608043B2 (en) 2017-12-15 2020-03-31 Atomera Incorporation Method for making CMOS image sensor including stacked semiconductor chips and readout circuitry including a superlattice
US10529768B2 (en) 2017-12-15 2020-01-07 Atomera Incorporated Method for making CMOS image sensor including pixels with read circuitry having a superlattice
US10355151B2 (en) 2017-12-15 2019-07-16 Atomera Incorporated CMOS image sensor including photodiodes with overlying superlattices to reduce crosstalk
US10276625B1 (en) 2017-12-15 2019-04-30 Atomera Incorporated CMOS image sensor including superlattice to enhance infrared light absorption
US10615209B2 (en) 2017-12-15 2020-04-07 Atomera Incorporated CMOS image sensor including stacked semiconductor chips and readout circuitry including a superlattice
US10396223B2 (en) 2017-12-15 2019-08-27 Atomera Incorporated Method for making CMOS image sensor with buried superlattice layer to reduce crosstalk
US10367028B2 (en) 2017-12-15 2019-07-30 Atomera Incorporated CMOS image sensor including stacked semiconductor chips and image processing circuitry including a superlattice
TWI722398B (zh) 2018-03-08 2021-03-21 美商安托梅拉公司 包含具有超晶格之改良接觸結構之半導體元件及相關方法
US10468245B2 (en) 2018-03-09 2019-11-05 Atomera Incorporated Semiconductor device including compound semiconductor materials and an impurity and point defect blocking superlattice
US10727049B2 (en) 2018-03-09 2020-07-28 Atomera Incorporated Method for making a semiconductor device including compound semiconductor materials and an impurity and point defect blocking superlattice
EP3776073A1 (de) 2018-04-12 2021-02-17 Atomera Incorporated Halbleiterbauelement und verfahren mit vertikal integrierten optischen und elektronischen vorrichtungen und mit einem übergitter
EP3776663A1 (de) 2018-04-12 2021-02-17 Atomera Incorporated Vorrichtung und verfahren zur herstellung eines invertierten t-kanal-feldeffekttransistors (itfet) mit einem übergitter
US10811498B2 (en) 2018-08-30 2020-10-20 Atomera Incorporated Method for making superlattice structures with reduced defect densities
US10566191B1 (en) 2018-08-30 2020-02-18 Atomera Incorporated Semiconductor device including superlattice structures with reduced defect densities
US10840337B2 (en) 2018-11-16 2020-11-17 Atomera Incorporated Method for making a FINFET having reduced contact resistance
US10847618B2 (en) 2018-11-16 2020-11-24 Atomera Incorporated Semiconductor device including body contact dopant diffusion blocking superlattice having reduced contact resistance
US10854717B2 (en) 2018-11-16 2020-12-01 Atomera Incorporated Method for making a FINFET including source and drain dopant diffusion blocking superlattices to reduce contact resistance
US10840335B2 (en) 2018-11-16 2020-11-17 Atomera Incorporated Method for making semiconductor device including body contact dopant diffusion blocking superlattice to reduce contact resistance
US10840336B2 (en) 2018-11-16 2020-11-17 Atomera Incorporated Semiconductor device with metal-semiconductor contacts including oxygen insertion layer to constrain dopants and related methods
US10580867B1 (en) 2018-11-16 2020-03-03 Atomera Incorporated FINFET including source and drain regions with dopant diffusion blocking superlattice layers to reduce contact resistance
US10818755B2 (en) 2018-11-16 2020-10-27 Atomera Incorporated Method for making semiconductor device including source/drain dopant diffusion blocking superlattices to reduce contact resistance
US10593761B1 (en) 2018-11-16 2020-03-17 Atomera Incorporated Method for making a semiconductor device having reduced contact resistance
US10580866B1 (en) 2018-11-16 2020-03-03 Atomera Incorporated Semiconductor device including source/drain dopant diffusion blocking superlattices to reduce contact resistance
US11094818B2 (en) 2019-04-23 2021-08-17 Atomera Incorporated Method for making a semiconductor device including a superlattice and an asymmetric channel and related methods
US10937888B2 (en) 2019-07-17 2021-03-02 Atomera Incorporated Method for making a varactor with a hyper-abrupt junction region including spaced-apart superlattices
US11183565B2 (en) 2019-07-17 2021-11-23 Atomera Incorporated Semiconductor devices including hyper-abrupt junction region including spaced-apart superlattices and related methods
US10840388B1 (en) 2019-07-17 2020-11-17 Atomera Incorporated Varactor with hyper-abrupt junction region including a superlattice
US10937868B2 (en) 2019-07-17 2021-03-02 Atomera Incorporated Method for making semiconductor devices with hyper-abrupt junction region including spaced-apart superlattices
US10825902B1 (en) 2019-07-17 2020-11-03 Atomera Incorporated Varactor with hyper-abrupt junction region including spaced-apart superlattices
US10879357B1 (en) 2019-07-17 2020-12-29 Atomera Incorporated Method for making a semiconductor device having a hyper-abrupt junction region including a superlattice
US10868120B1 (en) 2019-07-17 2020-12-15 Atomera Incorporated Method for making a varactor with hyper-abrupt junction region including a superlattice
US10825901B1 (en) 2019-07-17 2020-11-03 Atomera Incorporated Semiconductor devices including hyper-abrupt junction region including a superlattice
US11437486B2 (en) 2020-01-14 2022-09-06 Atomera Incorporated Methods for making bipolar junction transistors including emitter-base and base-collector superlattices
US11302823B2 (en) 2020-02-26 2022-04-12 Atomera Incorporated Method for making semiconductor device including a superlattice with different non-semiconductor material monolayers
US11177351B2 (en) 2020-02-26 2021-11-16 Atomera Incorporated Semiconductor device including a superlattice with different non-semiconductor material monolayers
US11075078B1 (en) 2020-03-06 2021-07-27 Atomera Incorporated Method for making a semiconductor device including a superlattice within a recessed etch
US11133384B1 (en) * 2020-04-19 2021-09-28 Koucheng Wu Quantum wire resonant tunneling transistor
US11569368B2 (en) 2020-06-11 2023-01-31 Atomera Incorporated Method for making semiconductor device including a superlattice and providing reduced gate leakage
US11469302B2 (en) 2020-06-11 2022-10-11 Atomera Incorporated Semiconductor device including a superlattice and providing reduced gate leakage
US11837634B2 (en) 2020-07-02 2023-12-05 Atomera Incorporated Semiconductor device including superlattice with oxygen and carbon monolayers
TWI803219B (zh) 2021-03-03 2023-05-21 美商安托梅拉公司 包含具超晶格之接地面層之射頻半導體元件及相關方法
US11810784B2 (en) 2021-04-21 2023-11-07 Atomera Incorporated Method for making semiconductor device including a superlattice and enriched silicon 28 epitaxial layer
US11923418B2 (en) 2021-04-21 2024-03-05 Atomera Incorporated Semiconductor device including a superlattice and enriched silicon 28 epitaxial layer
US11682712B2 (en) 2021-05-26 2023-06-20 Atomera Incorporated Method for making semiconductor device including superlattice with O18 enriched monolayers
US11728385B2 (en) 2021-05-26 2023-08-15 Atomera Incorporated Semiconductor device including superlattice with O18 enriched monolayers
US11631584B1 (en) 2021-10-28 2023-04-18 Atomera Incorporated Method for making semiconductor device with selective etching of superlattice to define etch stop layer
US11721546B2 (en) 2021-10-28 2023-08-08 Atomera Incorporated Method for making semiconductor device with selective etching of superlattice to accumulate non-semiconductor atoms

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JPS61198903A (ja) * 1985-02-28 1986-09-03 Tokyo Inst Of Technol 電子増幅素子
DE3604260A1 (de) * 1986-02-11 1987-08-13 Max Planck Gesellschaft Fluessigkeitsepitaxieverfahren
JPS63124462A (ja) * 1986-11-14 1988-05-27 Hitachi Ltd 半導体装置
FR2629636B1 (fr) * 1988-04-05 1990-11-16 Thomson Csf Procede de realisation d'une alternance de couches de materiau semiconducteur monocristallin et de couches de materiau isolant
US5229623A (en) * 1988-10-21 1993-07-20 Hitachi, Ltd. Electric circuit using multiple differential negative resistance elements, semiconductor device and neuro chip using the same
JPH03262161A (ja) * 1990-03-12 1991-11-21 Oki Electric Ind Co Ltd 共鳴トンネルトランジスタ
JPH04335538A (ja) * 1991-05-10 1992-11-24 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5234848A (en) * 1991-11-05 1993-08-10 Texas Instruments Incorporated Method for fabricating lateral resonant tunneling transistor with heterojunction barriers
US5216262A (en) * 1992-03-02 1993-06-01 Raphael Tsu Quantum well structures useful for semiconductor devices

Also Published As

Publication number Publication date
KR950012750A (ko) 1995-05-16
EP0651447B1 (de) 1997-07-30
DE69404601T2 (de) 1998-01-15
EP0651447A1 (de) 1995-05-03
US5796119A (en) 1998-08-18
JPH0818029A (ja) 1996-01-19

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Legal Events

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