DE69217930D1 - Teiler zur Division eines ersten Polynoms durch ein zweites - Google Patents

Teiler zur Division eines ersten Polynoms durch ein zweites

Info

Publication number
DE69217930D1
DE69217930D1 DE69217930T DE69217930T DE69217930D1 DE 69217930 D1 DE69217930 D1 DE 69217930D1 DE 69217930 T DE69217930 T DE 69217930T DE 69217930 T DE69217930 T DE 69217930T DE 69217930 D1 DE69217930 D1 DE 69217930D1
Authority
DE
Germany
Prior art keywords
polynomial
inputs
divider
outputs
bit sequence
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69217930T
Other languages
English (en)
Other versions
DE69217930T2 (de
Inventor
Der Putten Frank Octaaf Van
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Bell NV
Alcatel Lucent NV
Original Assignee
Alcatel Bell NV
Alcatel NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Bell NV, Alcatel NV filed Critical Alcatel Bell NV
Publication of DE69217930D1 publication Critical patent/DE69217930D1/de
Application granted granted Critical
Publication of DE69217930T2 publication Critical patent/DE69217930T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
  • Complex Calculations (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
DE69217930T 1992-07-14 1992-07-14 Teiler zur Division eines ersten Polynoms durch ein zweites Expired - Fee Related DE69217930T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP92202147A EP0582748B1 (de) 1992-07-14 1992-07-14 Teiler zur Division eines ersten Polynoms durch ein zweites

Publications (2)

Publication Number Publication Date
DE69217930D1 true DE69217930D1 (de) 1997-04-10
DE69217930T2 DE69217930T2 (de) 1997-09-25

Family

ID=8210773

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69217930T Expired - Fee Related DE69217930T2 (de) 1992-07-14 1992-07-14 Teiler zur Division eines ersten Polynoms durch ein zweites

Country Status (8)

Country Link
US (1) US5367479A (de)
EP (1) EP0582748B1 (de)
JP (1) JPH06203055A (de)
AT (1) ATE149762T1 (de)
AU (1) AU664459B2 (de)
CA (1) CA2100388A1 (de)
DE (1) DE69217930T2 (de)
ES (1) ES2099789T3 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9419785D0 (en) * 1994-09-30 1994-11-16 Plessey Telecomm Cyclic redundancy code checking
US5615220A (en) * 1995-01-31 1997-03-25 Philips Electronics North America Corporation Polynomial divider which can perform Euclid's Algorithm to produce an error locator polynomial from an error syndrome polynomial, and apparatus including the polynomial divider
US5942002A (en) * 1996-03-08 1999-08-24 Neo-Lore Method and apparatus for generating a transform
US5905664A (en) * 1997-04-04 1999-05-18 National Semiconductor Corp. Circuit for determining, in parallel, the terms of a remainder that results from dividing two binary polynomials
KR100302847B1 (ko) * 1998-09-03 2001-11-22 윤덕용 유한필드에서의긴다항식제산장치
US6968492B1 (en) 2002-03-28 2005-11-22 Annadurai Andy P Hardware-efficient CRC generator for high speed communication networks
JP3579039B2 (ja) * 2002-11-22 2004-10-20 沖電気工業株式会社 巡回符号を用いた誤り訂正回路
KR100731985B1 (ko) * 2005-12-29 2007-06-25 전자부품연구원 파이프라인 구조 병렬 순환 중복 검사 장치 및 방법
US8181269B2 (en) * 2007-11-26 2012-05-22 Exelis, Inc. Night vision goggle mount with retractable stops

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3678469A (en) * 1970-12-01 1972-07-18 Ibm Universal cyclic division circuit
JPS5286011A (en) * 1976-01-12 1977-07-16 Nec Corp Error correction device for parallel processing
US4473902A (en) * 1982-04-22 1984-09-25 Sperrt Corporation Error correcting code processing system
DE3376907D1 (en) * 1982-06-15 1988-07-07 Toshiba Kk Apparatus for dividing the elements of a galois field
WO1985003371A1 (en) * 1984-01-21 1985-08-01 Sony Corporation Circuit for calculating finite fields
US4712215A (en) * 1985-12-02 1987-12-08 Advanced Micro Devices, Inc. CRC calculation machine for separate calculation of checkbits for the header packet and data packet
JPH01150940A (ja) * 1987-12-08 1989-06-13 Hitachi Ltd Ｃｒｃ演算方式
US5136592A (en) * 1989-06-28 1992-08-04 Digital Equipment Corporation Error detection and correction system for long burst errors
EP0431629A3 (en) * 1989-12-08 1993-07-21 Sony Corporation Mutual division circuit
IT1241429B (it) * 1990-03-01 1994-01-17 Sip Circuito elettronico per la generazione di codici per la rilevazione di errori in segnali numerici
CA2049910C (en) * 1990-08-27 1999-02-09 Yoshihiro Uchida Apparatus for testing atm channels
CA2055172A1 (en) * 1990-12-10 1992-06-11 Joseph H. Condon Error detection and framing in packets transmitted in a sequence of fixed-length cells

Also Published As

Publication number Publication date
EP0582748B1 (de) 1997-03-05
AU664459B2 (en) 1995-11-16
US5367479A (en) 1994-11-22
ATE149762T1 (de) 1997-03-15
EP0582748A1 (de) 1994-02-16
ES2099789T3 (es) 1997-06-01
JPH06203055A (ja) 1994-07-22
AU4173493A (en) 1994-01-20
CA2100388A1 (en) 1994-01-15
DE69217930T2 (de) 1997-09-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee