DE69119283D1 - ECL / TTL level converter - Google Patents
ECL / TTL level converterInfo
- Publication number
- DE69119283D1 DE69119283D1 DE69119283T DE69119283T DE69119283D1 DE 69119283 D1 DE69119283 D1 DE 69119283D1 DE 69119283 T DE69119283 T DE 69119283T DE 69119283 T DE69119283 T DE 69119283T DE 69119283 D1 DE69119283 D1 DE 69119283D1
- Authority
- DE
- Germany
- Prior art keywords
- ecl
- level converter
- ttl level
- ttl
- converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/18—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using galvano-magnetic devices, e.g. Hall-effect devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
- H03K19/01806—Interface arrangements
- H03K19/01812—Interface arrangements with at least one differential stage
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2083920A JPH0622325B2 (en) | 1990-03-30 | 1990-03-30 | Level conversion circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69119283D1 true DE69119283D1 (en) | 1996-06-13 |
DE69119283T2 DE69119283T2 (en) | 1996-10-10 |
Family
ID=13816041
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69119283T Expired - Fee Related DE69119283T2 (en) | 1990-03-30 | 1991-03-26 | ECL / TTL level converter |
Country Status (5)
Country | Link |
---|---|
US (1) | US5081376A (en) |
EP (1) | EP0449208B1 (en) |
JP (1) | JPH0622325B2 (en) |
KR (1) | KR940010675B1 (en) |
DE (1) | DE69119283T2 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2528028B2 (en) * | 1990-08-22 | 1996-08-28 | 三菱電機株式会社 | Level conversion circuit |
DE4225750A1 (en) * | 1992-08-04 | 1994-02-10 | Siemens Nixdorf Inf Syst | Highly integrated circuits |
US5481216A (en) * | 1994-05-31 | 1996-01-02 | National Semiconductor Corporation | Transistor drive circuit with shunt transistor saturation control |
DE202010006624U1 (en) | 2010-05-10 | 2010-08-05 | Manitowoc Crane Group France Sas | Crane jib, in particular mobile crane jib, with prestressed tension elements |
KR101381295B1 (en) | 2012-11-01 | 2014-04-04 | 라제건 | Cot |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4536665A (en) * | 1982-12-27 | 1985-08-20 | The Grass Valley Group, Inc. | Circuit for converting two balanced ECL level signals into an inverted TTL level signal |
JPS6157118A (en) * | 1984-08-29 | 1986-03-24 | Toshiba Corp | Level converting circuit |
JPH0683053B2 (en) * | 1987-10-30 | 1994-10-19 | 日本電気株式会社 | Level conversion circuit |
US4870301A (en) * | 1988-09-06 | 1989-09-26 | Motorola, Inc. | Differential emitter-coupled-logic bus driver |
US4835455A (en) * | 1988-09-15 | 1989-05-30 | Honeywell Inc. | Reference voltage generator |
US4996452A (en) * | 1989-11-15 | 1991-02-26 | National Semiconductor Corporation | ECL/TTL tristate buffer |
-
1990
- 1990-03-30 JP JP2083920A patent/JPH0622325B2/en not_active Expired - Fee Related
-
1991
- 1991-03-25 US US07/674,786 patent/US5081376A/en not_active Expired - Lifetime
- 1991-03-26 EP EP91104774A patent/EP0449208B1/en not_active Expired - Lifetime
- 1991-03-26 DE DE69119283T patent/DE69119283T2/en not_active Expired - Fee Related
- 1991-03-28 KR KR1019910004844A patent/KR940010675B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
US5081376A (en) | 1992-01-14 |
KR910017743A (en) | 1991-11-05 |
EP0449208B1 (en) | 1996-05-08 |
JPH0622325B2 (en) | 1994-03-23 |
EP0449208A3 (en) | 1991-12-04 |
EP0449208A2 (en) | 1991-10-02 |
KR940010675B1 (en) | 1994-10-24 |
JPH03283811A (en) | 1991-12-13 |
DE69119283T2 (en) | 1996-10-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |