DE69100003D1 - Sicherheitsverriegelung fuer integrierten schaltkreis. - Google Patents
Sicherheitsverriegelung fuer integrierten schaltkreis.Info
- Publication number
- DE69100003D1 DE69100003D1 DE9191400018T DE69100003T DE69100003D1 DE 69100003 D1 DE69100003 D1 DE 69100003D1 DE 9191400018 T DE9191400018 T DE 9191400018T DE 69100003 T DE69100003 T DE 69100003T DE 69100003 D1 DE69100003 D1 DE 69100003D1
- Authority
- DE
- Germany
- Prior art keywords
- integrated circuit
- safety lock
- lock
- safety
- integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07F—COIN-FREED OR LIKE APPARATUS
- G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
- G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
- G07F7/10—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means together with a coded signal, e.g. in the form of personal identification information, like personal identification number [PIN] or biometric data
- G07F7/1008—Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31701—Arrangements for setting the Unit Under Test [UUT] in a test mode
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31719—Security aspects, e.g. preventing unauthorised access during test
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
- G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
- G06Q20/00—Payment architectures, schemes or protocols
- G06Q20/30—Payment architectures, schemes or protocols characterised by the use of specific devices or networks
- G06Q20/34—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
- G06Q20/341—Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
- G06Q20/00—Payment architectures, schemes or protocols
- G06Q20/30—Payment architectures, schemes or protocols characterised by the use of specific devices or networks
- G06Q20/34—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
- G06Q20/357—Cards having a plurality of specified features
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07F—COIN-FREED OR LIKE APPARATUS
- G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
- G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
- G07F7/0806—Details of the card
- G07F7/0813—Specific details related to card security
- G07F7/082—Features insuring the integrity of the data on or in the card
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/24—Accessing extra cells, e.g. dummy cells or redundant cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/52—Protection of memory contents; Detection of errors in memory contents
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Business, Economics & Management (AREA)
- Computer Security & Cryptography (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Accounting & Taxation (AREA)
- Strategic Management (AREA)
- General Business, Economics & Management (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Storage Device Security (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9000168A FR2656939B1 (fr) | 1990-01-09 | 1990-01-09 | Verrous de securite pour circuit integre. |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69100003D1 true DE69100003D1 (de) | 1992-10-15 |
DE69100003T2 DE69100003T2 (de) | 1993-01-21 |
Family
ID=9392602
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE9191400018T Expired - Lifetime DE69100003T2 (de) | 1990-01-09 | 1991-01-07 | Sicherheitsverriegelung fuer integrierten schaltkreis. |
Country Status (4)
Country | Link |
---|---|
US (1) | US5101121A (de) |
EP (1) | EP0437386B1 (de) |
DE (1) | DE69100003T2 (de) |
FR (1) | FR2656939B1 (de) |
Families Citing this family (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0612422B1 (de) * | 1991-11-12 | 2000-07-05 | Microchip Technology Inc. | Mikrokontroller mit schmelzsicherungs-emulierenden speichern und testverfahren |
FR2690748A1 (fr) * | 1992-04-30 | 1993-11-05 | Sgs Thomson Microelectronics | Circuit de détection de seuil de tension à très faible consommation. |
EP0940851B1 (de) | 1992-07-31 | 2005-10-05 | Hughes Electronics Corporation | Sicherheitssystem für eine integrierte Schaltung und Verfahren mit implantierten Verbindungen |
WO1995024698A1 (en) * | 1992-10-14 | 1995-09-14 | Cp8 Transac | A secure memory card |
US5293424A (en) * | 1992-10-14 | 1994-03-08 | Bull Hn Information Systems Inc. | Secure memory card |
FR2716989B1 (fr) * | 1994-03-04 | 1996-04-05 | Gemplus Card Int | Procédé de fonctionnement d'une carte à puce. |
US5783846A (en) * | 1995-09-22 | 1998-07-21 | Hughes Electronics Corporation | Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering |
US5973375A (en) * | 1997-06-06 | 1999-10-26 | Hughes Electronics Corporation | Camouflaged circuit structure with step implants |
US6041007A (en) * | 1998-02-02 | 2000-03-21 | Motorola, Inc. | Device with programmable memory and method of programming |
US6711684B1 (en) * | 1999-06-08 | 2004-03-23 | General Instrument Corporation | Variable security code download for an embedded processor |
US6396368B1 (en) | 1999-11-10 | 2002-05-28 | Hrl Laboratories, Llc | CMOS-compatible MEM switches and method of making |
US7217977B2 (en) * | 2004-04-19 | 2007-05-15 | Hrl Laboratories, Llc | Covert transformation of transistor properties as a circuit protection method |
US6815816B1 (en) | 2000-10-25 | 2004-11-09 | Hrl Laboratories, Llc | Implanted hidden interconnections in a semiconductor device for preventing reverse engineering |
US6791191B2 (en) | 2001-01-24 | 2004-09-14 | Hrl Laboratories, Llc | Integrated circuits protected against reverse engineering and method for fabricating the same using vias without metal terminations |
US7294935B2 (en) * | 2001-01-24 | 2007-11-13 | Hrl Laboratories, Llc | Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide |
US6466048B1 (en) * | 2001-05-23 | 2002-10-15 | Mosaid Technologies, Inc. | Method and apparatus for switchably selecting an integrated circuit operating mode |
US6774413B2 (en) | 2001-06-15 | 2004-08-10 | Hrl Laboratories, Llc | Integrated circuit structure with programmable connector/isolator |
US6740942B2 (en) | 2001-06-15 | 2004-05-25 | Hrl Laboratories, Llc. | Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact |
US6897535B2 (en) | 2002-05-14 | 2005-05-24 | Hrl Laboratories, Llc | Integrated circuit with reverse engineering protection |
US7049667B2 (en) * | 2002-09-27 | 2006-05-23 | Hrl Laboratories, Llc | Conductive channel pseudo block process and circuit to inhibit reverse engineering |
US6979606B2 (en) * | 2002-11-22 | 2005-12-27 | Hrl Laboratories, Llc | Use of silicon block process step to camouflage a false transistor |
CN1717639A (zh) * | 2002-11-27 | 2006-01-04 | 皇家飞利浦电子股份有限公司 | 芯片集成保护装置 |
JP4846239B2 (ja) * | 2002-12-13 | 2011-12-28 | エイチアールエル ラボラトリーズ,エルエルシー | ウェル注入を用いた集積回路の改変 |
EP1450261A1 (de) * | 2003-02-18 | 2004-08-25 | STMicroelectronics S.r.l. | Halbleiterspeicher mit Zugriffsschutzverfahren |
FR2857535A1 (fr) * | 2003-07-09 | 2005-01-14 | Atmel Corp | Procede et systeme pour brouiller le contenu d'une cellule dans un circuit integre. |
US7242063B1 (en) | 2004-06-29 | 2007-07-10 | Hrl Laboratories, Llc | Symmetric non-intrusive and covert technique to render a transistor permanently non-operable |
US7299327B2 (en) * | 2005-02-18 | 2007-11-20 | International Business Machines Corporation | Content-on-demand memory key with positive access evidence feature |
DE602006006065D1 (de) * | 2005-08-10 | 2009-05-14 | Nxp Bv | Prüfen einer integrierten schaltung, die geheiminformationen enthält |
US8168487B2 (en) | 2006-09-28 | 2012-05-01 | Hrl Laboratories, Llc | Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4209282A (en) * | 1978-05-03 | 1980-06-24 | Hale Fire Pump Company | Pump assembly |
FR2471000B1 (fr) * | 1979-11-30 | 1985-06-28 | Dassault Electronique | Procede et dispositif de controle du nombre de tentatives d'acces a une memoire electronique, notamment celle d'un circuit integre d'un objet comme une carte de credit ou une carte d'achat |
DE3044984A1 (de) * | 1979-11-30 | 1982-04-15 | Dassault Electronique | Integrierte transistorschaltung, insbesondere fuer codierung |
US4583011A (en) * | 1983-11-01 | 1986-04-15 | Standard Microsystems Corp. | Circuit to prevent pirating of an MOS circuit |
US4998203A (en) * | 1985-03-12 | 1991-03-05 | Digiulio Peter C | Postage meter with a non-volatile memory security circuit |
US4855670A (en) * | 1985-03-15 | 1989-08-08 | Tektronix, Inc. | Method of providing information useful in identifying defects in electronic circuits |
US4703163A (en) * | 1985-08-22 | 1987-10-27 | Genest Leonard Joseph | Security system |
JPS6356785A (ja) * | 1986-08-28 | 1988-03-11 | Toshiba Corp | 携帯可能記憶媒体処理装置 |
JPS63236186A (ja) * | 1987-03-24 | 1988-10-03 | Mitsubishi Electric Corp | カ−ド発行装置 |
US4783606A (en) * | 1987-04-14 | 1988-11-08 | Erich Goetting | Programming circuit for programmable logic array I/O cell |
FR2617976B1 (fr) * | 1987-07-10 | 1989-11-10 | Thomson Semiconducteurs | Detecteur electrique de niveau logique binaire |
FR2621409A1 (fr) * | 1987-10-02 | 1989-04-07 | Thomson Semiconducteurs | Dispositif de protection des zones memoires d'un systeme electronique a microprocesseur |
FR2622019B1 (fr) * | 1987-10-19 | 1990-02-09 | Thomson Semiconducteurs | Dispositif de test structurel d'un circuit integre |
JPH01114995A (ja) * | 1987-10-29 | 1989-05-08 | Toppan Printing Co Ltd | Icカード |
JPH01132980A (ja) * | 1987-11-17 | 1989-05-25 | Mitsubishi Electric Corp | テスト機能付電子回路装置 |
US4943804A (en) * | 1988-03-02 | 1990-07-24 | Dallas Semiconductor Corporation | Electronic key locking circuitry |
US5010331A (en) * | 1988-03-02 | 1991-04-23 | Dallas Semiconductor Corporation | Time-key integrated circuit |
FR2638869B1 (fr) * | 1988-11-10 | 1990-12-21 | Sgs Thomson Microelectronics | Dispositif de securite contre la detection non autorisee de donnees protegees |
-
1990
- 1990-01-09 FR FR9000168A patent/FR2656939B1/fr not_active Expired - Lifetime
-
1991
- 1991-01-07 DE DE9191400018T patent/DE69100003T2/de not_active Expired - Lifetime
- 1991-01-07 EP EP91400018A patent/EP0437386B1/de not_active Expired - Lifetime
- 1991-01-08 US US07/638,459 patent/US5101121A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0437386B1 (de) | 1992-09-09 |
FR2656939A1 (fr) | 1991-07-12 |
US5101121A (en) | 1992-03-31 |
FR2656939B1 (fr) | 1992-04-03 |
DE69100003T2 (de) | 1993-01-21 |
EP0437386A1 (de) | 1991-07-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Representative=s name: PATENTANWALTSKANZLEI LIERMANN-CASTELL, 52349 DUEREN |