DE69026565D1 - Verfahren zur Herstellung einer halbleiterintegrierten Schaltung umfassend einen Heteroübergang-Bipolartransistor und/oder einen vergrabenen Widerstand - Google Patents
Verfahren zur Herstellung einer halbleiterintegrierten Schaltung umfassend einen Heteroübergang-Bipolartransistor und/oder einen vergrabenen WiderstandInfo
- Publication number
- DE69026565D1 DE69026565D1 DE69026565T DE69026565T DE69026565D1 DE 69026565 D1 DE69026565 D1 DE 69026565D1 DE 69026565 T DE69026565 T DE 69026565T DE 69026565 T DE69026565 T DE 69026565T DE 69026565 D1 DE69026565 D1 DE 69026565D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- integrated circuit
- semiconductor integrated
- bipolar transistor
- heterojunction bipolar
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/6631—Bipolar junction transistors [BJT] with an active layer made of a group 13/15 material
- H01L29/66318—Heterojunction transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/8252—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using III-V technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/011—Bipolar transistors
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/072—Heterojunctions
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8912405A FR2652200A1 (fr) | 1989-09-21 | 1989-09-21 | Procede de realisation d'un circuit semiconducteur integre incluant un transistor bipolaire a heterojonction et/ou des resistances enterrees. |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69026565D1 true DE69026565D1 (de) | 1996-05-23 |
DE69026565T2 DE69026565T2 (de) | 1996-11-07 |
Family
ID=9385727
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69026565T Expired - Fee Related DE69026565T2 (de) | 1989-09-21 | 1990-09-17 | Verfahren zur Herstellung einer halbleiterintegrierten Schaltung umfassend einen Heteroübergang-Bipolartransistor und/oder einen vergrabenen Widerstand |
Country Status (5)
Country | Link |
---|---|
US (1) | US5073508A (de) |
EP (1) | EP0420322B1 (de) |
JP (1) | JPH03142970A (de) |
DE (1) | DE69026565T2 (de) |
FR (1) | FR2652200A1 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5168071A (en) * | 1991-04-05 | 1992-12-01 | At&T Bell Laboratories | Method of making semiconductor devices |
JPH0582560A (ja) * | 1991-09-20 | 1993-04-02 | Sony Corp | 電界効果型トランジスタの製造方法 |
JPH0669227A (ja) * | 1992-05-29 | 1994-03-11 | Texas Instr Inc <Ti> | 化合物半導体のヘテロ接合バイポーラトランジスタ及びその製造方法 |
US5286661A (en) * | 1992-08-26 | 1994-02-15 | Motorola, Inc. | Method of forming a bipolar transistor having an emitter overhang |
US5883566A (en) * | 1997-02-24 | 1999-03-16 | International Business Machines Corporation | Noise-isolated buried resistor |
DE19842106A1 (de) * | 1998-09-08 | 2000-03-09 | Inst Halbleiterphysik Gmbh | Vertikaler Bipolartransistor und Verfahren zu seiner Herstellung |
US7300595B2 (en) * | 2003-12-25 | 2007-11-27 | Tdk Corporation | Method for filling concave portions of concavo-convex pattern and method for manufacturing magnetic recording medium |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4617724A (en) * | 1983-06-30 | 1986-10-21 | Fujitsu Limited | Process for fabricating heterojunction bipolar transistor with low base resistance |
JPS61147571A (ja) * | 1984-12-21 | 1986-07-05 | Toshiba Corp | ヘテロ接合バイポ−ラトランジスタの製造方法 |
JPS63276267A (ja) * | 1987-05-08 | 1988-11-14 | Fujitsu Ltd | 半導体装置の製造方法 |
-
1989
- 1989-09-21 FR FR8912405A patent/FR2652200A1/fr active Pending
-
1990
- 1990-09-14 US US07/583,270 patent/US5073508A/en not_active Expired - Lifetime
- 1990-09-17 EP EP90202453A patent/EP0420322B1/de not_active Expired - Lifetime
- 1990-09-17 DE DE69026565T patent/DE69026565T2/de not_active Expired - Fee Related
- 1990-09-21 JP JP2250399A patent/JPH03142970A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
US5073508A (en) | 1991-12-17 |
JPH03142970A (ja) | 1991-06-18 |
EP0420322B1 (de) | 1996-04-17 |
DE69026565T2 (de) | 1996-11-07 |
FR2652200A1 (fr) | 1991-03-22 |
EP0420322A1 (de) | 1991-04-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N |
|
8339 | Ceased/non-payment of the annual fee |