DE69022726D1 - Scr-schutzanordnung mit niedriger zündspannung und struktur. - Google Patents

Scr-schutzanordnung mit niedriger zündspannung und struktur.

Info

Publication number
DE69022726D1
DE69022726D1 DE69022726T DE69022726T DE69022726D1 DE 69022726 D1 DE69022726 D1 DE 69022726D1 DE 69022726 T DE69022726 T DE 69022726T DE 69022726 T DE69022726 T DE 69022726T DE 69022726 D1 DE69022726 D1 DE 69022726D1
Authority
DE
Germany
Prior art keywords
ignition voltage
protective arrangement
low ignition
scr protective
scr
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69022726T
Other languages
English (en)
Other versions
DE69022726T2 (de
Inventor
Leslie Avery
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
David Sarnoff Research Center Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB898911360A external-priority patent/GB8911360D0/en
Application filed by Sharp Corp, David Sarnoff Research Center Inc filed Critical Sharp Corp
Publication of DE69022726D1 publication Critical patent/DE69022726D1/de
Application granted granted Critical
Publication of DE69022726T2 publication Critical patent/DE69022726T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0259Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
    • H01L27/0262Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Protection Of Static Devices (AREA)
DE69022726T 1989-05-17 1990-05-14 Scr-schutzanordnung mit niedriger zündspannung und struktur. Expired - Lifetime DE69022726T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB898911360A GB8911360D0 (en) 1989-05-17 1989-05-17 Electronic charge protection devices
US51649890A 1990-05-04 1990-05-04
PCT/US1990/002610 WO1990014691A1 (en) 1989-05-17 1990-05-14 Low trigger voltage scr protection device and structure

Publications (2)

Publication Number Publication Date
DE69022726D1 true DE69022726D1 (de) 1995-11-02
DE69022726T2 DE69022726T2 (de) 1996-03-07

Family

ID=26295365

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69022726T Expired - Lifetime DE69022726T2 (de) 1989-05-17 1990-05-14 Scr-schutzanordnung mit niedriger zündspannung und struktur.

Country Status (5)

Country Link
EP (1) EP0472592B1 (de)
JP (1) JP2505652B2 (de)
DE (1) DE69022726T2 (de)
ES (1) ES2078343T3 (de)
WO (1) WO1990014691A1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5274262A (en) * 1989-05-17 1993-12-28 David Sarnoff Research Center, Inc. SCR protection structure and circuit with reduced trigger voltage
FR2690786A1 (fr) * 1992-04-30 1993-10-29 Sgs Thomson Microelectronics Sa Dispositif de protection d'un circuit intégré contre les décharges électrostatiques.
US5430595A (en) * 1993-10-15 1995-07-04 Intel Corporation Electrostatic discharge protection circuit
US5572394A (en) * 1995-04-06 1996-11-05 Industrial Technology Research Institute CMOS on-chip four-LVTSCR ESD protection scheme
US5754380A (en) * 1995-04-06 1998-05-19 Industrial Technology Research Institute CMOS output buffer with enhanced high ESD protection capability
JPH09148452A (ja) * 1995-11-09 1997-06-06 Ind Technol Res Inst 静電放電防護能力を強化したcmos出力バッファ
JP2815565B2 (ja) * 1995-12-06 1998-10-27 財団法人工業技術研究院 ゲート結合scr構造を有するesd保護回路
DE10005811A1 (de) * 2000-02-10 2001-08-23 Micronas Gmbh Laterale Thyristorstruktur zum Schutz vor elektrostatischer Entladung
US7244992B2 (en) 2003-07-17 2007-07-17 Ming-Dou Ker Turn-on-efficient bipolar structures with deep N-well for on-chip ESD protection

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS508486A (de) * 1973-05-21 1975-01-28
US4176372A (en) * 1974-03-30 1979-11-27 Sony Corporation Semiconductor device having oxygen doped polycrystalline passivation layer
SE392783B (sv) * 1975-06-19 1977-04-18 Asea Ab Halvledaranordning innefattande en tyristor och en felteffekttransistordel
JPS52102690A (en) * 1976-02-25 1977-08-29 Hitachi Ltd Semiconductor capacitance device
US4100561A (en) * 1976-05-24 1978-07-11 Rca Corp. Protective circuit for MOS devices
JPS5422781A (en) * 1977-07-22 1979-02-20 Hitachi Ltd Insulator gate protective semiconductor device
JPS5939904B2 (ja) * 1978-09-28 1984-09-27 株式会社東芝 半導体装置

Also Published As

Publication number Publication date
EP0472592A1 (de) 1992-03-04
ES2078343T3 (es) 1995-12-16
EP0472592A4 (en) 1992-12-23
JP2505652B2 (ja) 1996-06-12
JPH05505060A (ja) 1993-07-29
DE69022726T2 (de) 1996-03-07
EP0472592B1 (de) 1995-09-27
WO1990014691A1 (en) 1990-11-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee
8370 Indication of lapse of patent is to be deleted
8327 Change in the person/name/address of the patent owner

Owner name: SHARP CORP., TENRI, NARA, JP