DE68919178D1 - Phasenregel-Schleife. - Google Patents

Phasenregel-Schleife.

Info

Publication number
DE68919178D1
DE68919178D1 DE68919178T DE68919178T DE68919178D1 DE 68919178 D1 DE68919178 D1 DE 68919178D1 DE 68919178 T DE68919178 T DE 68919178T DE 68919178 T DE68919178 T DE 68919178T DE 68919178 D1 DE68919178 D1 DE 68919178D1
Authority
DE
Germany
Prior art keywords
locked loop
phase locked
phase
loop
locked
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68919178T
Other languages
English (en)
Other versions
DE68919178T2 (de
Inventor
Satoshi Kashiwaba
Masahiro Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE68919178D1 publication Critical patent/DE68919178D1/de
Application granted granted Critical
Publication of DE68919178T2 publication Critical patent/DE68919178T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
DE68919178T 1988-08-31 1989-08-30 Phasenregel-Schleife. Expired - Fee Related DE68919178T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63217936A JP2610171B2 (ja) 1988-08-31 1988-08-31 位相同期回路

Publications (2)

Publication Number Publication Date
DE68919178D1 true DE68919178D1 (de) 1994-12-08
DE68919178T2 DE68919178T2 (de) 1995-03-30

Family

ID=16712028

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68919178T Expired - Fee Related DE68919178T2 (de) 1988-08-31 1989-08-30 Phasenregel-Schleife.

Country Status (4)

Country Link
US (1) US4942371A (de)
EP (1) EP0357374B1 (de)
JP (1) JP2610171B2 (de)
DE (1) DE68919178T2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0770994B2 (ja) * 1989-01-12 1995-07-31 松下電器産業株式会社 位相同期回路
US5036294A (en) * 1990-12-03 1991-07-30 Motorola Inc. Phase locked loop having low-frequency jitter compensation
JPH08213901A (ja) * 1995-02-02 1996-08-20 Fujitsu Ltd 位相同期回路及びこれを構成するための回路装置並びに位相同期回路を用いた電子装置
US5926515A (en) * 1995-12-26 1999-07-20 Samsung Electronics Co., Ltd. Phase locked loop for improving a phase locking time
JPH10257041A (ja) * 1997-03-11 1998-09-25 Sony Corp フェイズロックドループ回路及び再生装置
US6341355B1 (en) 1999-03-16 2002-01-22 Lsi Logic Corporation Automatic clock switcher
US6255871B1 (en) * 2000-01-10 2001-07-03 General Electric Company Method and apparatus for improving capture and lock characteristics of phase lock loops
GB2388978B (en) * 2002-05-14 2004-12-15 Synad Technologies Ltd A phase locking loop frequency synthesiser

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4886412A (de) * 1972-02-16 1973-11-15
US3909735A (en) * 1974-04-04 1975-09-30 Ncr Co Slow switch for bandwidth change in phase-locked loop
US4007429A (en) * 1976-01-19 1977-02-08 Gte International Incorporated Phase-locked loop having a switched lowpass filter
DE2738648C3 (de) * 1977-08-26 1980-05-22 Siemens Ag, 1000 Berlin Und 8000 Muenchen Schaltung zur Regeneration für insbesondere digitale Signale
JPS55141833A (en) * 1979-04-24 1980-11-06 Toshiba Corp Phase locked loop circuit
DE2951283A1 (de) * 1979-12-20 1981-07-02 Robert Bosch Gmbh, 7000 Stuttgart Phasenregelkreis
JP2540792B2 (ja) * 1983-01-20 1996-10-09 日本電気株式会社 位相同期回路
JPS59198028A (ja) * 1983-04-26 1984-11-09 Anritsu Corp 位相同期回路
US4758801A (en) * 1985-07-11 1988-07-19 Siemens Aktiengesellschaft Dynamic control system with switchable filter-function groups
JPS6397016A (ja) * 1986-10-14 1988-04-27 Nec Corp 位相同期発振回路

Also Published As

Publication number Publication date
JPH0265525A (ja) 1990-03-06
US4942371A (en) 1990-07-17
EP0357374B1 (de) 1994-11-02
EP0357374A3 (de) 1991-02-27
DE68919178T2 (de) 1995-03-30
JP2610171B2 (ja) 1997-05-14
EP0357374A2 (de) 1990-03-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee