DE60202443D1 - Methode zum Testen eines elektronischen Bauteils - Google Patents
Methode zum Testen eines elektronischen BauteilsInfo
- Publication number
- DE60202443D1 DE60202443D1 DE60202443T DE60202443T DE60202443D1 DE 60202443 D1 DE60202443 D1 DE 60202443D1 DE 60202443 T DE60202443 T DE 60202443T DE 60202443 T DE60202443 T DE 60202443T DE 60202443 D1 DE60202443 D1 DE 60202443D1
- Authority
- DE
- Germany
- Prior art keywords
- testing
- electronic component
- electronic
- component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
- G11C29/56004—Pattern generation
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
- G01R31/3004—Current or voltage test
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C2029/5006—Current
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02010478A EP1361450B1 (de) | 2002-05-08 | 2002-05-08 | Methode zum Testen eines elektronischen Bauteils |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60202443D1 true DE60202443D1 (de) | 2005-02-03 |
DE60202443T2 DE60202443T2 (de) | 2006-01-12 |
Family
ID=29225632
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60202443T Expired - Lifetime DE60202443T2 (de) | 2002-05-08 | 2002-05-08 | Methode zum Testen eines elektronischen Bauteils |
Country Status (3)
Country | Link |
---|---|
US (1) | US6842712B2 (de) |
EP (1) | EP1361450B1 (de) |
DE (1) | DE60202443T2 (de) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050273685A1 (en) * | 2004-06-08 | 2005-12-08 | Sanjay Sachdev | Automated and customizable generation of efficient test programs for multiple electrical test equipment platforms |
JP5021499B2 (ja) * | 2005-01-24 | 2012-09-05 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 複数の装置のための制御システムを構成するシステム及び方法 |
CN101666853B (zh) * | 2008-09-03 | 2011-08-17 | 京元电子股份有限公司 | 测试排程***与方法 |
CN102222526B (zh) * | 2010-04-14 | 2015-04-01 | 苹果公司 | 用于对电子装置的处理过程进行控制的方法和装置 |
TW201232253A (en) * | 2011-01-24 | 2012-08-01 | Hon Hai Prec Ind Co Ltd | System and method for arranging test data |
CN102636704B (zh) * | 2012-03-05 | 2015-07-15 | 深圳市英威腾电气股份有限公司 | 一种电子产品的测试方法、装置及*** |
CN103809102B (zh) * | 2012-11-06 | 2017-08-22 | 比亚迪股份有限公司 | 一种在编程时对芯片进行测试的方法及测试*** |
KR102185871B1 (ko) * | 2014-01-23 | 2020-12-02 | 삼성전자주식회사 | 부분 칩과 이를 포함하는 시스템 |
CN103760443A (zh) * | 2014-01-24 | 2014-04-30 | 浙江众合机电股份有限公司 | 一种板卡自动测试***及其测试方法 |
US10782339B2 (en) | 2016-04-29 | 2020-09-22 | Teradyne, Inc. | Method and test system for providing accurate analog signals |
CN106093632B (zh) * | 2016-06-03 | 2018-11-06 | 温州大学 | 基于扫描被测电子设备位置的ip地址设定方法及*** |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4646299A (en) * | 1983-08-01 | 1987-02-24 | Fairchild Semiconductor Corporation | Method and apparatus for applying and monitoring programmed test signals during automated testing of electronic circuits |
US4606025A (en) * | 1983-09-28 | 1986-08-12 | International Business Machines Corp. | Automatically testing a plurality of memory arrays on selected memory array testers |
US5592077A (en) * | 1995-02-13 | 1997-01-07 | Cirrus Logic, Inc. | Circuits, systems and methods for testing ASIC and RAM memory devices |
JP2921476B2 (ja) * | 1996-03-28 | 1999-07-19 | 日本電気株式会社 | Lsiの電源電流テスト方法 |
US5742177A (en) * | 1996-09-27 | 1998-04-21 | Intel Corporation | Method for testing a semiconductor device by measuring quiescent currents (IDDQ) at two different temperatures |
US6239609B1 (en) * | 1998-02-11 | 2001-05-29 | Lsi Logic Corporation | Reduced voltage quiescent current test methodology for integrated circuits |
-
2002
- 2002-05-08 DE DE60202443T patent/DE60202443T2/de not_active Expired - Lifetime
- 2002-05-08 EP EP02010478A patent/EP1361450B1/de not_active Expired - Fee Related
-
2003
- 2003-05-08 US US10/431,900 patent/US6842712B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US20030212517A1 (en) | 2003-11-13 |
EP1361450A1 (de) | 2003-11-12 |
DE60202443T2 (de) | 2006-01-12 |
EP1361450B1 (de) | 2004-12-29 |
US6842712B2 (en) | 2005-01-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE502004011042D1 (de) | Verfahren zum testen von unbestückten leiterplatten | |
DE502004009312D1 (de) | Verfahren zum montieren eines endoskopes | |
GB2427632B (en) | Apparatus and method for measuring while drilling | |
DE602005000512D1 (de) | Verfahren und vorrichtung zum montieren von bauelementen | |
EP1959455A4 (de) | Testvorrichtung und -verfahren | |
EP1608281A4 (de) | Gerät und verfahren für die genau begrenzte kryoablation | |
DE602005017318D1 (de) | Verfahren und Vorrichtung zum Bereitstellen von Entwurfsdaten | |
DE502004002598D1 (de) | Treiberschaltung zum Betreiben eines elektronischen Bauteils | |
GB0410967D0 (en) | An apparatus and method for fatigue testing | |
GB0516400D0 (en) | A method and apparatus for testing software | |
EG24333A (en) | Methods and apparatus for testing a component | |
DE502006009103D1 (de) | Verfahren und schaltungsanordnung zur detektion eines leitungsbruches | |
DE50305912D1 (de) | Verfahren zur zerstörungsfreien prüfung eines bauteils | |
DE50304832D1 (de) | Vorrichtung und Verfahren zum Positionieren eines optischen Bauteils | |
DE50309954D1 (de) | Schaltungsanordnung und verfahren zum überprüfen eines stromkreises | |
DE602005002054D1 (de) | Verfahren zum Nachweis von Testkörpern | |
DE60202443D1 (de) | Methode zum Testen eines elektronischen Bauteils | |
FI20045312A0 (fi) | Elektronisten laitteiden testausmenetelmä | |
DE502005003338D1 (de) | Elektronische Schaltung, System mit einer elektronischen Schaltung und Verfahren zum Testen einer elektronischen Schaltung | |
GB0324074D0 (en) | Apparatus and method for testing combustion | |
DE50303609D1 (de) | Verfahren zur erkennung eines aufpralls | |
DE60311596D1 (de) | Methode und vorrichtung zum härten eines verbundlaminates | |
DE112005001256T5 (de) | Vorrichtung und Verfahren zum Prüfen von Halbleiter-Wafern | |
DE502005004637D1 (de) | Verfahren und vorrichtung zum aufwickeln mehrerer fäden | |
DE60322829D1 (de) | Verfahren zum Prüfen |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: QIMONDA AG, 81739 MUENCHEN, DE |