DE602006012292D1 - Verfahren zur datenverarbeitung mit modularer potenzierung und dazugehörige vorrichtung - Google Patents

Verfahren zur datenverarbeitung mit modularer potenzierung und dazugehörige vorrichtung

Info

Publication number
DE602006012292D1
DE602006012292D1 DE602006012292T DE602006012292T DE602006012292D1 DE 602006012292 D1 DE602006012292 D1 DE 602006012292D1 DE 602006012292 T DE602006012292 T DE 602006012292T DE 602006012292 T DE602006012292 T DE 602006012292T DE 602006012292 D1 DE602006012292 D1 DE 602006012292D1
Authority
DE
Germany
Prior art keywords
data processing
potentration
modular
associated device
variable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602006012292T
Other languages
English (en)
Inventor
Arnaud Boscher
Christophe Giraud
Robert Naciri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Idemia France SAS
Original Assignee
Oberthur Card Systems SA France
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oberthur Card Systems SA France filed Critical Oberthur Card Systems SA France
Publication of DE602006012292D1 publication Critical patent/DE602006012292D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/723—Modular exponentiation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • G06F2207/7271—Fault verification, e.g. comparing two values which should be the same, unless a computational fault occurred

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Storage Device Security (AREA)
  • Electrotherapy Devices (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
DE602006012292T 2005-03-30 2006-03-27 Verfahren zur datenverarbeitung mit modularer potenzierung und dazugehörige vorrichtung Active DE602006012292D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0503083A FR2884004B1 (fr) 2005-03-30 2005-03-30 Procede de traitement de donnees impliquant une exponentiation modulaire et un dispositif associe
PCT/FR2006/000662 WO2006103341A1 (fr) 2005-03-30 2006-03-27 Procédé de traitement de données impliquant une exponentiation modulaire et un dispositif associé

Publications (1)

Publication Number Publication Date
DE602006012292D1 true DE602006012292D1 (de) 2010-04-01

Family

ID=35559283

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006012292T Active DE602006012292D1 (de) 2005-03-30 2006-03-27 Verfahren zur datenverarbeitung mit modularer potenzierung und dazugehörige vorrichtung

Country Status (7)

Country Link
US (1) US8682951B2 (de)
EP (1) EP1864211B1 (de)
AT (1) ATE458219T1 (de)
DE (1) DE602006012292D1 (de)
ES (1) ES2337925T3 (de)
FR (1) FR2884004B1 (de)
WO (1) WO2006103341A1 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2916113B1 (fr) * 2007-05-07 2009-07-31 Oberthur Card Syst Sa Procede de traitement cryptographique d'un message.
FR2919739B1 (fr) * 2007-08-03 2009-12-04 Oberthur Card Syst Sa Procede de traitement de donnees protege contre les attaques par generation de fautes et dispositif associe
US8670557B2 (en) 2007-09-10 2014-03-11 Spansion Llc Cryptographic system with modular randomization of exponentiation
US8139763B2 (en) 2007-10-10 2012-03-20 Spansion Llc Randomized RSA-based cryptographic exponentiation resistant to side channel and fault attacks
US8774400B2 (en) 2008-01-03 2014-07-08 Spansion Llc Method for protecting data against differntial fault analysis involved in rivest, shamir, and adleman cryptography using the chinese remainder theorem
FR2942560B1 (fr) * 2009-02-24 2015-06-26 Oberthur Technologies Procede de traitement de donnees impliquant une exponentiation et un dispositif associe.
FR2948792B1 (fr) 2009-07-30 2011-08-26 Oberthur Technologies Procede de traitement de donnees protege contre les attaques par faute et dispositif associe
EP2504757B1 (de) * 2010-01-28 2013-11-06 NDS Limited System zur exponentiation
EP2535804A1 (de) 2011-06-17 2012-12-19 Thomson Licensing Fehlerbeständiger Potenzierungsalgorithmus
FR2979725B1 (fr) * 2011-09-06 2016-05-27 Oberthur Technologies Procede de calculs cryptographique resistant aux defaillances materielles
EP2793123A1 (de) * 2013-04-16 2014-10-22 Gemalto SA Verfahren zur sicheren Ausführung einer modularen Exponentiation
US9590805B1 (en) * 2014-12-23 2017-03-07 EMC IP Holding Company LLC Ladder-based cryptographic techniques using pre-computed points
TW201810989A (zh) * 2016-05-18 2018-03-16 納格維遜股份有限公司 用以保護密碼指數的方法及系統
CN106603221B (zh) * 2016-12-23 2022-07-26 北京握奇智能科技有限公司 一种抵抗spa攻击的模幂计算方法、***及嵌入式单芯片
FR3069671A1 (fr) 2017-07-25 2019-02-01 Stmicroelectronics (Rousset) Sas Protection d'un calcul iteratif contre des attaques horizontales
EP3579493A1 (de) 2018-06-08 2019-12-11 STMicroelectronics (Rousset) SAS Schutz einer iterativen berechnung
EP3579492A1 (de) 2018-06-08 2019-12-11 STMicroelectronics (Rousset) SAS Schutz einer iterativen berechnung
FR3094522B1 (fr) 2019-03-29 2021-11-19 St Microelectronics Rousset Protection d’un calcul itératif
FR3143243A1 (fr) * 2022-12-09 2024-06-14 Idemia France Signature et dechiffrement de message securises par double rsa-crt

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6748410B1 (en) * 1997-05-04 2004-06-08 M-Systems Flash Disk Pioneers, Ltd. Apparatus and method for modular multiplication and exponentiation based on montgomery multiplication
US5991415A (en) 1997-05-12 1999-11-23 Yeda Research And Development Co. Ltd. At The Weizmann Institute Of Science Method and apparatus for protecting public key schemes from timing and fault attacks
EP1050133B2 (de) 1998-01-02 2009-05-27 Cryptography Research Inc. Leckresistentes kryptographisches verfahren und vorrichtung
AU6381799A (en) 1998-06-03 2000-01-10 Cryptography Research, Inc. Secure modular exponentiation with leak minimization for smartcards and other cryptosystems
FR2799851B1 (fr) * 1999-10-14 2002-01-25 Gemplus Card Int Procede de contre-mesure dans un composant electronique mettant en oeuvre un algorithme de cryptographie a cle publique de type rsa
FR2828608B1 (fr) 2001-08-10 2004-03-05 Gemplus Card Int Procede securise de realisation d'une operation d'exponentiation modulaire
JP2004226674A (ja) * 2003-01-23 2004-08-12 Renesas Technology Corp 情報処理方法

Also Published As

Publication number Publication date
FR2884004A1 (fr) 2006-10-06
WO2006103341A1 (fr) 2006-10-05
FR2884004B1 (fr) 2007-06-29
US8682951B2 (en) 2014-03-25
ES2337925T3 (es) 2010-04-30
ATE458219T1 (de) 2010-03-15
US20090240756A1 (en) 2009-09-24
EP1864211A1 (de) 2007-12-12
EP1864211B1 (de) 2010-02-17

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Legal Events

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