DE602004024995D1 - Parallelverarbeitungseinrichtung und parallelverarbeitungsverfahren - Google Patents

Parallelverarbeitungseinrichtung und parallelverarbeitungsverfahren

Info

Publication number
DE602004024995D1
DE602004024995D1 DE602004024995T DE602004024995T DE602004024995D1 DE 602004024995 D1 DE602004024995 D1 DE 602004024995D1 DE 602004024995 T DE602004024995 T DE 602004024995T DE 602004024995 T DE602004024995 T DE 602004024995T DE 602004024995 D1 DE602004024995 D1 DE 602004024995D1
Authority
DE
Germany
Prior art keywords
parallel processing
processing device
processing method
parallel
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602004024995T
Other languages
English (en)
Inventor
Toshishige Shimamura
Koji Fujii
Satoshi Shigematsu
Katsuyuki Machida
Hiroki Morimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Publication of DE602004024995D1 publication Critical patent/DE602004024995D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/509—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators
    • G06F7/5095—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators word-serial, i.e. with an accumulator-register
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V10/00—Arrangements for image or video recognition or understanding
    • G06V10/10—Image acquisition
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V10/00—Arrangements for image or video recognition or understanding
    • G06V10/20—Image preprocessing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V10/00—Arrangements for image or video recognition or understanding
    • G06V10/70—Arrangements for image or video recognition or understanding using pattern recognition or machine learning
    • G06V10/74—Image or video pattern matching; Proximity measures in feature spaces
    • G06V10/75—Organisation of the matching processes, e.g. simultaneous or sequential comparisons of image or video features; Coarse-fine approaches, e.g. multi-scale approaches; using context analysis; Selection of dictionaries
    • G06V10/751—Comparing pixel values or logical combinations thereof, or feature values having positional relevance, e.g. template matching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V10/00—Arrangements for image or video recognition or understanding
    • G06V10/94—Hardware or software architectures specially adapted for image or video understanding
    • G06V10/955—Hardware or software architectures specially adapted for image or video understanding using specific electronic processors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/607—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers number-of-ones counters, i.e. devices for counting the number of input lines set to ONE among a plurality of input lines, also called bit counters or parallel counters

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • Software Systems (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Artificial Intelligence (AREA)
  • Databases & Information Systems (AREA)
  • Evolutionary Computation (AREA)
  • General Health & Medical Sciences (AREA)
  • Medical Informatics (AREA)
  • Mathematical Optimization (AREA)
  • Image Processing (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE602004024995T 2003-05-23 2004-02-13 Parallelverarbeitungseinrichtung und parallelverarbeitungsverfahren Expired - Lifetime DE602004024995D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2003146723 2003-05-23
JP2003271037 2003-07-04
PCT/JP2004/001526 WO2004104819A1 (ja) 2003-05-23 2004-02-13 並列処理装置及び並列処理方法

Publications (1)

Publication Number Publication Date
DE602004024995D1 true DE602004024995D1 (de) 2010-02-25

Family

ID=33478989

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004024995T Expired - Lifetime DE602004024995D1 (de) 2003-05-23 2004-02-13 Parallelverarbeitungseinrichtung und parallelverarbeitungsverfahren

Country Status (5)

Country Link
US (1) US7480785B2 (de)
EP (1) EP1643356B1 (de)
JP (1) JP3788804B2 (de)
DE (1) DE602004024995D1 (de)
WO (1) WO2004104819A1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9436477B2 (en) 2012-06-15 2016-09-06 International Business Machines Corporation Transaction abort instruction
US9348642B2 (en) 2012-06-15 2016-05-24 International Business Machines Corporation Transaction begin/end instructions
US9740549B2 (en) 2012-06-15 2017-08-22 International Business Machines Corporation Facilitating transaction completion subsequent to repeated aborts of the transaction
US9448796B2 (en) 2012-06-15 2016-09-20 International Business Machines Corporation Restricted instructions in transactional execution
US10437602B2 (en) 2012-06-15 2019-10-08 International Business Machines Corporation Program interruption filtering in transactional execution
US9384004B2 (en) 2012-06-15 2016-07-05 International Business Machines Corporation Randomized testing within transactional execution
US20130339680A1 (en) 2012-06-15 2013-12-19 International Business Machines Corporation Nontransactional store instruction
CN108427932B (zh) * 2015-10-19 2021-07-02 Oppo广东移动通信有限公司 指纹图像的识别方法及装置
US11424621B2 (en) 2020-01-28 2022-08-23 Qualcomm Incorporated Configurable redundant systems for safety critical applications

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4399517A (en) * 1981-03-19 1983-08-16 Texas Instruments Incorporated Multiple-input binary adder
US4660165A (en) * 1984-04-03 1987-04-21 Trw Inc. Pyramid carry adder circuit
EP0257362A1 (de) * 1986-08-27 1988-03-02 Siemens Aktiengesellschaft Addierer
CA2021192A1 (en) * 1989-07-28 1991-01-29 Malcolm A. Mumme Simplified synchronous mesh processor
US5054090A (en) * 1990-07-20 1991-10-01 Knight Arnold W Fingerprint correlation system with parallel FIFO processor
US5148388A (en) * 1991-05-17 1992-09-15 Advanced Micro Devices, Inc. 7 to 3 counter circuit
US5187679A (en) * 1991-06-05 1993-02-16 International Business Machines Corporation Generalized 7/3 counters
US5291443A (en) * 1991-06-26 1994-03-01 Micron Technology, Inc. Simultaneous read and refresh of different rows in a dram
JPH07109549B2 (ja) * 1993-08-01 1995-11-22 株式会社日立製作所 グラフィックプロセッサ
JP3724014B2 (ja) * 1994-08-25 2005-12-07 ソニー株式会社 画像認識装置および画像認識方法
US5963679A (en) * 1996-01-26 1999-10-05 Harris Corporation Electric field fingerprint sensor apparatus and related methods
KR100198662B1 (ko) * 1996-05-16 1999-06-15 구본준 디램 셀, 디램 및 그의 제조 방법
US6075876A (en) * 1997-05-07 2000-06-13 Draganoff; Georgi Hristoff Sliding yardsticks fingerprint enrollment and verification system and method
US6442286B1 (en) * 1998-12-22 2002-08-27 Stmicroelectronics, Inc. High security flash memory and method
JP3455477B2 (ja) * 1999-09-13 2003-10-14 日本電信電話株式会社 指紋認識装置およびデータ処理方法
EP1085426B1 (de) * 1999-09-13 2006-01-11 Nippon Telegraph and Telephone Corporation Parallelverarbeitungsvorrichtung und -verfahren
JP2001242771A (ja) 2000-02-29 2001-09-07 Canon Inc 画像読取装置及び画像形成装置
US6728862B1 (en) * 2000-05-22 2004-04-27 Gazelle Technology Corporation Processor array and parallel data processing methods
US7085796B1 (en) * 2000-06-08 2006-08-01 International Business Machines Corporation Dynamic adder with reduced logic
US7199897B2 (en) * 2002-02-22 2007-04-03 Ricoh Company, Ltd. Image data processing apparatus for and image data processing method of pattern matching

Also Published As

Publication number Publication date
EP1643356A4 (de) 2009-04-01
JP3788804B2 (ja) 2006-06-21
US20050259502A1 (en) 2005-11-24
EP1643356A1 (de) 2006-04-05
JPWO2004104819A1 (ja) 2006-07-20
EP1643356B1 (de) 2010-01-06
WO2004104819A1 (ja) 2004-12-02
US7480785B2 (en) 2009-01-20

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