DE60138868D1 - Method and apparatus for executing instructions of an auxiliary processor - Google Patents
Method and apparatus for executing instructions of an auxiliary processorInfo
- Publication number
- DE60138868D1 DE60138868D1 DE60138868T DE60138868T DE60138868D1 DE 60138868 D1 DE60138868 D1 DE 60138868D1 DE 60138868 T DE60138868 T DE 60138868T DE 60138868 T DE60138868 T DE 60138868T DE 60138868 D1 DE60138868 D1 DE 60138868D1
- Authority
- DE
- Germany
- Prior art keywords
- executing instructions
- auxiliary processor
- auxiliary
- processor
- executing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3818—Decoding for concurrent execution
- G06F9/382—Pipelined decoding, e.g. using predecoding
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/808,406 US6832305B2 (en) | 2001-03-14 | 2001-03-14 | Method and apparatus for executing coprocessor instructions |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60138868D1 true DE60138868D1 (en) | 2009-07-16 |
Family
ID=25198667
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60138868T Expired - Lifetime DE60138868D1 (en) | 2001-03-14 | 2001-07-19 | Method and apparatus for executing instructions of an auxiliary processor |
Country Status (5)
Country | Link |
---|---|
US (1) | US6832305B2 (en) |
EP (1) | EP1241567B1 (en) |
KR (1) | KR100423910B1 (en) |
DE (1) | DE60138868D1 (en) |
TW (1) | TW548591B (en) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2382175A (en) * | 2001-11-20 | 2003-05-21 | Hewlett Packard Co | Reconfigurable processor |
EP1324191A1 (en) * | 2001-12-27 | 2003-07-02 | STMicroelectronics S.r.l. | Processor architecture, related system and method of operation |
EP1387252B1 (en) * | 2002-07-31 | 2019-02-13 | Texas Instruments Incorporated | Instruction prefix to indicate system commands |
EP1387250B8 (en) * | 2002-07-31 | 2012-02-29 | Texas Instruments Inc. | Processor that accomodates multiple instruction sets and multiple decode modes |
EP1387259B1 (en) * | 2002-07-31 | 2017-09-20 | Texas Instruments Incorporated | Inter-processor control |
US20040225840A1 (en) * | 2003-05-09 | 2004-11-11 | O'connor Dennis M. | Apparatus and method to provide multithreaded computer processing |
TWI224281B (en) * | 2003-07-16 | 2004-11-21 | Sunplus Technology Co Ltd | A processor executing script with different length and method thereof |
JP4699685B2 (en) * | 2003-08-21 | 2011-06-15 | パナソニック株式会社 | Signal processing apparatus and electronic apparatus using the same |
US20050055594A1 (en) * | 2003-09-05 | 2005-03-10 | Doering Andreas C. | Method and device for synchronizing a processor and a coprocessor |
US8914618B2 (en) * | 2005-12-29 | 2014-12-16 | Intel Corporation | Instruction set architecture-based inter-sequencer communications with a heterogeneous resource |
US7689402B2 (en) | 2006-11-17 | 2010-03-30 | Telefonaktiebolaget Lm Ericsson (Publ) | Method and apparatus for retrieving application-specific code using memory access capabilities of a host processor |
US7945763B2 (en) * | 2006-12-13 | 2011-05-17 | International Business Machines Corporation | Single shared instruction predecoder for supporting multiple processors |
US8001361B2 (en) * | 2006-12-13 | 2011-08-16 | International Business Machines Corporation | Structure for a single shared instruction predecoder for supporting multiple processors |
US20080148020A1 (en) * | 2006-12-13 | 2008-06-19 | Luick David A | Low Cost Persistent Instruction Predecoded Issue and Dispatcher |
US7788470B1 (en) * | 2008-03-27 | 2010-08-31 | Xilinx, Inc. | Shadow pipeline in an auxiliary processor unit controller |
US7865698B1 (en) * | 2008-03-27 | 2011-01-04 | Xilinix, Inc. | Decode mode for an auxiliary processor unit controller in which an opcode is partially masked such that a configuration register defines a plurality of user defined instructions |
US9304774B2 (en) | 2011-02-04 | 2016-04-05 | Qualcomm Incorporated | Processor with a coprocessor having early access to not-yet issued instructions |
WO2013065687A1 (en) * | 2011-11-04 | 2013-05-10 | 学校法人 早稲田大学 | Processor system and accelerator |
US10733141B2 (en) | 2018-03-27 | 2020-08-04 | Analog Devices, Inc. | Distributed processor system |
JP7273176B2 (en) * | 2019-05-05 | 2023-05-12 | 長江存儲科技有限責任公司 | Memory control system with sequence processing unit |
US11755333B2 (en) * | 2021-09-23 | 2023-09-12 | Apple Inc. | Coprocessor prefetcher |
CN114579288B (en) * | 2022-05-09 | 2022-09-02 | 成都登临科技有限公司 | Task processing method and device and computer equipment |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63158657A (en) * | 1986-12-23 | 1988-07-01 | Fanuc Ltd | Coprocessor control system |
JPH01147656A (en) * | 1987-12-03 | 1989-06-09 | Nec Corp | Microprocessor |
US5519873A (en) * | 1990-08-31 | 1996-05-21 | International Business Machines Corporation | Apparatus for switching digital command execution between a general purpose microprocessor and dedicted execution logic |
JPH07504054A (en) * | 1992-02-18 | 1995-04-27 | アプル・コンピュータ・インコーポレーテッド | Programming model for coprocessors in computer systems |
US5752071A (en) * | 1995-07-17 | 1998-05-12 | Intel Corporation | Function coprocessor |
US5794068A (en) * | 1996-03-18 | 1998-08-11 | Advanced Micro Devices, Inc. | CPU with DSP having function preprocessor that converts instruction sequences intended to perform DSP function into DSP function identifier |
US6148395A (en) * | 1996-05-17 | 2000-11-14 | Texas Instruments Incorporated | Shared floating-point unit in a single chip multiprocessor |
KR100308618B1 (en) * | 1999-02-27 | 2001-09-26 | 윤종용 | Pipelined data processing system having a microprocessor-coprocessor system on a single chip and method for interfacing host microprocessor with coprocessor |
KR100325430B1 (en) * | 1999-10-11 | 2002-02-25 | 윤종용 | Data processing apparatus and method for performing different word-length arithmetic operations |
-
2001
- 2001-03-14 US US09/808,406 patent/US6832305B2/en not_active Expired - Lifetime
- 2001-05-18 KR KR10-2001-0027317A patent/KR100423910B1/en active IP Right Grant
- 2001-07-19 EP EP01306229A patent/EP1241567B1/en not_active Expired - Lifetime
- 2001-07-19 DE DE60138868T patent/DE60138868D1/en not_active Expired - Lifetime
- 2001-08-01 TW TW090118738A patent/TW548591B/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
TW548591B (en) | 2003-08-21 |
KR100423910B1 (en) | 2004-03-22 |
US20020133689A1 (en) | 2002-09-19 |
KR20020073233A (en) | 2002-09-23 |
EP1241567A3 (en) | 2003-09-10 |
EP1241567B1 (en) | 2009-06-03 |
EP1241567A2 (en) | 2002-09-18 |
US6832305B2 (en) | 2004-12-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |