DE60119546D1 - Digitale takt-multiplizierer und -teiler mit synchronisierung - Google Patents

Digitale takt-multiplizierer und -teiler mit synchronisierung

Info

Publication number
DE60119546D1
DE60119546D1 DE60119546T DE60119546T DE60119546D1 DE 60119546 D1 DE60119546 D1 DE 60119546D1 DE 60119546 T DE60119546 T DE 60119546T DE 60119546 T DE60119546 T DE 60119546T DE 60119546 D1 DE60119546 D1 DE 60119546D1
Authority
DE
Germany
Prior art keywords
disconnector
synchronization
digital clock
clock multiplier
multiplier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60119546T
Other languages
English (en)
Other versions
DE60119546T2 (de
Inventor
D Logue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xilinx Inc
Original Assignee
Xilinx Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/713,707 external-priority patent/US6445232B1/en
Priority claimed from US09/713,514 external-priority patent/US6448915B1/en
Priority claimed from US09/713,651 external-priority patent/US6384647B1/en
Application filed by Xilinx Inc filed Critical Xilinx Inc
Application granted granted Critical
Publication of DE60119546D1 publication Critical patent/DE60119546D1/de
Publication of DE60119546T2 publication Critical patent/DE60119546T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0818—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter comprising coarse and fine delay or phase-shifting means
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/083—Details of the phase-locked loop the reference signal being additionally directly applied to the generator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/50—All digital phase-locked loop
DE60119546T 2000-08-31 2001-03-15 Digitale takt-multiplizierer und -teiler mit synchronisierung Expired - Lifetime DE60119546T2 (de)

Applications Claiming Priority (13)

Application Number Priority Date Filing Date Title
US713514 1985-03-19
US22970500P 2000-08-31 2000-08-31
US22970400P 2000-08-31 2000-08-31
US22964000P 2000-08-31 2000-08-31
US229704P 2000-08-31
US229640P 2000-08-31
US229705P 2000-08-31
US713707 2000-11-14
US09/713,707 US6445232B1 (en) 2000-08-31 2000-11-14 Digital clock multiplier and divider with output waveform shaping
US09/713,514 US6448915B1 (en) 2000-08-31 2000-11-14 Modulo-M delta sigma circuit
US713651 2000-11-14
US09/713,651 US6384647B1 (en) 2000-08-31 2000-11-14 Digital clock multiplier and divider with sychronization during concurrences
PCT/US2001/008481 WO2002019526A1 (en) 2000-08-31 2001-03-15 Digital clock multiplier and divider with synchronization

Publications (2)

Publication Number Publication Date
DE60119546D1 true DE60119546D1 (de) 2006-06-14
DE60119546T2 DE60119546T2 (de) 2007-05-16

Family

ID=27559201

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60119546T Expired - Lifetime DE60119546T2 (de) 2000-08-31 2001-03-15 Digitale takt-multiplizierer und -teiler mit synchronisierung

Country Status (5)

Country Link
EP (1) EP1314251B1 (de)
JP (1) JP4686108B2 (de)
CA (1) CA2420700C (de)
DE (1) DE60119546T2 (de)
WO (1) WO2002019526A1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5457813B2 (ja) * 2009-12-16 2014-04-02 ルネサスエレクトロニクス株式会社 Ａｄｐｌｌ回路、半導体装置及び携帯情報機器
DE102013221678B4 (de) 2012-11-12 2024-08-01 Nvidia Corp. System und Verfahren zum Bestimmen einer Zeit zum sicheren Abtasten eines Signals einer Takt-Domäne
US9164134B2 (en) 2012-11-13 2015-10-20 Nvidia Corporation High-resolution phase detector

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63211919A (ja) * 1987-02-27 1988-09-05 Nec Corp クロツク発生回路
US5771264A (en) * 1996-08-29 1998-06-23 Altera Corporation Digital delay lock loop for clock signal frequency multiplication
US5910740A (en) * 1997-06-18 1999-06-08 Raytheon Company Phase locked loop having memory
US5825253A (en) * 1997-07-15 1998-10-20 Qualcomm Incorporated Phase-locked-loop with noise shaper
JP2908398B1 (ja) * 1998-01-14 1999-06-21 日本電気アイシーマイコンシステム株式会社 ディジタルｐｌｌ回路および発振器の遅延素子
JP3323824B2 (ja) * 1999-02-22 2002-09-09 松下電器産業株式会社 クロック生成回路

Also Published As

Publication number Publication date
JP2004507962A (ja) 2004-03-11
DE60119546T2 (de) 2007-05-16
JP4686108B2 (ja) 2011-05-18
CA2420700A1 (en) 2002-03-07
WO2002019526A1 (en) 2002-03-07
EP1314251B1 (de) 2006-05-10
CA2420700C (en) 2010-05-18
EP1314251A1 (de) 2003-05-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition