DE4243356A1 - Circuit board mounting process - Google Patents

Circuit board mounting process

Info

Publication number
DE4243356A1
DE4243356A1 DE4243356A DE4243356A DE4243356A1 DE 4243356 A1 DE4243356 A1 DE 4243356A1 DE 4243356 A DE4243356 A DE 4243356A DE 4243356 A DE4243356 A DE 4243356A DE 4243356 A1 DE4243356 A1 DE 4243356A1
Authority
DE
Germany
Prior art keywords
circuit board
contact points
solder
components
pads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE4243356A
Other languages
German (de)
Inventor
Robert Hierl
Hans Erdreich Dipl Ing Kiecker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to DE4243356A priority Critical patent/DE4243356A1/en
Publication of DE4243356A1 publication Critical patent/DE4243356A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0191—Using tape or non-metallic foil in a process, e.g. during filling of a hole with conductive paste
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0568—Resist used for applying paste, ink or powder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0577—Double layer of resist having the same pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/167—Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3485—Applying solder paste, slurry or powder
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

The circuit board (1) has contact points (2) for the corresponding contacts (7) of electronic components (6) which are to be stuck on the board (1).A separating foil (4) is put on the circuit board (1). The foil (4) is then removed from the contact points (2). A solder material (5) is put on the circuit board (1). The components (6) are positioned with their contacts (7) on the contact points (2). The solder material (5) is then heated to melting point.

Description

Die vorliegende Erfindung betrifft ein Bestückungsver­ fahren für eine Leiterplatte, die Kontaktstellen für Ge­ genkontaktstellen von elektronischen Bauelementen auf­ weist, mit denen die Leiterplatte zu bestücken ist.The present invention relates to a component assembly drive for a circuit board, the contact points for Ge gene contact points of electronic components points with which the circuit board is to be equipped.

Nach dem heutigen Stand der Technik werden Leiterplatten auf folgende Art bestückt:According to the current state of technology, printed circuit boards equipped in the following way:

  • - Eine dünne Photoresistschicht, welche die Leiterplatte abdeckt, wird an den Kontaktstellen entfernt, z. B. weggeätzt.- A thin layer of photoresist covering the circuit board covers, is removed at the contact points, e.g. B. etched away.
  • - Mittels Schablonendruck wird eine Lotpaste auf die Kon­ taktstellen aufgebracht. Die Kontaktstellen können da­ bei wahlweise heiß- oder galvanisch verzinnt sein.- A stencil paste is applied to the con beat points applied. The contact points can do that with either hot or galvanized tin.
  • - Die Bauelemente werden auf die Kontaktstellen aufge­ setzt.- The components are placed on the contact points puts.
  • - Die bestückte Leiterplatte wird in einem Infrarotofen erhitzt, so daß die Lotpaste schmilzt und die Bauele­ mente elektrisch und mechanisch mit den Kontaktstellen verbunden werden.- The printed circuit board is placed in an infrared oven heated so that the solder paste melts and the components elements electrically and mechanically with the contact points get connected.

Im Zuge der allgemeinen Miniaturisierung wird auch die Größe der einzelnen Kontaktstellen und der Abstand be­ nachbarter Kontaktstellen verringert. Da die Lotpaste aus Zinnkügelchen von ca. 30 bis 60 µm Durchmesser, Flußmittel und Bindemitteln besteht, kommt es beim Bestücken vor, daß die Zinnkügelchen von den Gegenkontaktstellen der Bauele­ mente, d. h. den Pins, verdrängt werden. Dadurch entstehen zwei Probleme. Zum einen bilden sich unerwünschte Löt­ brücken zwischen benachbarten Kontaktstellen (PADs), zum anderen reicht die Lotmenge eines PADs nicht mehr für eine gute Lötverbindung aus. In the course of general miniaturization, the Size of the individual contact points and the distance be neighboring contact points reduced. Because the solder paste is out Tin balls of approx. 30 to 60 µm in diameter, flux and binders, it happens when loading that the tin balls from the mating contact points of the components mente, d. H. the pins. This creates two problems. On the one hand, unwanted solder is formed bridge between neighboring contact points (PADs) to others the amount of solder in a PAD is no longer sufficient for one good solder joint.  

Zur Lösung dieser beiden Probleme wurden schon mehrfach Lösungen vorgeschlagen. Sie erwiesen sich jedoch ent­ weder als wirtschaftlich nicht tragbar oder als technisch nicht wirksam.There have been several attempts to solve these two problems Solutions suggested. However, they turned out to be neither as economically unsustainable nor as technical not effective.

Die Aufgabe der vorliegenden Erfindung besteht folglich darin, ein Verfahren anzugeben, bei dem man trotz geringer Kontaktstellenabstände (Mitte-Mitte kleiner oder gleich 600 µm) einerseits eine sichere Kontaktierung der Kontakt­ stellen mit den Gegegenkontaktstellen der Bauelemente er­ reicht und trotzdem Lötbrücken mit nur geringem Aufwand sicher verhindert. Es soll also ein Verfahren geschaffen werden, das den Ausschuß drastisch reduziert und dennoch nur geringen Aufwand erfordert.The object of the present invention is therefore in specifying a procedure in which, despite less Contact point distances (center-center smaller or equal 600 µm) on the one hand, reliable contacting of the contact with the counter contact points of the components is enough and still solder bridges with little effort safely prevented. So a procedure is to be created that drastically reduces the committee and yet requires little effort.

Die Aufgabe wird durch ein Verfahren mit folgenden Schritten gelöst:The task is accomplished through a procedure with the following Steps solved:

  • - auf die Leiterplatte wird eine Trennfolie aufgebracht,- a release film is applied to the circuit board,
  • - die Trennfolie wird an den Kontaktstellen entfernt,- the release film is removed at the contact points,
  • - auf die Leiterplatte wird ein Lotmaterial aufgebracht,- a solder material is applied to the circuit board,
  • - die elektronischen Bauelemente werden mit ihren Ge­ genkontaktstellen auf die Kontaktstellen aufgesetzt,- The electronic components with their Ge gene contact points placed on the contact points,
  • - das Lotmaterial wird erhitzt und so geschmolzen.- The solder material is heated and melted in this way.

Durch dieses Verfahren kann die ansonsten zwingend erfor­ derliche manuelle Kontrolle der automatisierten Bestückung und Verlötung entfallen. Gleichzeitig wird, wie oben er­ wähnt, der Ausschuß praktisch auf Null reduziert.This procedure can otherwise be mandatory Manual control of the automated assembly and soldering are eliminated. At the same time, he becomes like above thinks the committee is practically reduced to zero.

Weitere Vorteile und Einzelheiten ergeben sich aus der nachfolgenden Beschreibung eines Ausführungsbeispiels und anhand der Zeichnungen. Dabei zeigen:Further advantages and details emerge from the following description of an embodiment and based on the drawings. Show:

Fig. 1 bis 4 den Verfahrensablauf. Fig. 1 to 4 the process sequence.

Gemäß Fig. 1 besteht die Leiterplatte 1 aus einem Grund­ körper mit nicht dargestellten Leiterbahnen, die in Kon­ taktstellen 2 und Durchkontaktierungen 2′, z. B. für be­ drahtete Bauelemente, enden. Die Kontaktstellen 2 und die Durchkontaktierungen 2′ sind aus Kupfer und an ihrer Oberfläche dünn verzinnt. Die Kontaktstellen 2 werden allgemein als PADs bezeichnet. Sie haben eine Höhe von typisch 30 µm. Zwischen den PADs befindet sich ein Flüs­ sigresist 3, dessen Dicke kleiner als die Höhe der PADs 2 ist und der als Lötstopplack wirkt. Die Dicke des Flüssig­ resists 3 beträgt z. B. 20 µm. Nicht dargestellt in Fig. 1 sind Durchkontaktierungen, d. h. Stellen, an denen die beiden Oberflächen der Leiterplatte 1 elektrisch leitend miteinander verbunden sind.Referring to FIG. 1, the circuit board 1 comprises a base body with unillustrated conductor tracks, the clock set in Kon 2 and vias 2 ', z. B. for wired components, end. The contact points 2 and the plated-through holes 2 'are made of copper and thinly tinned on their surface. The contact points 2 are generally referred to as PADs. They typically have a height of 30 µm. There is a liquid resist 3 between the PADs, the thickness of which is smaller than the height of the PADs 2 and which acts as a solder resist. The thickness of the liquid resist 3 is z. B. 20 microns. Through-holes, that is to say points at which the two surfaces of the printed circuit board 1 are connected to one another in an electrically conductive manner, are not shown in FIG. 1.

Auf die obere Seite dieser, insoweit konventionell ausge­ bildeten Leiterplatte 1 wird, wie ebenfalls in Fig. 1 dargestellt, eine Trennfolie 4 aufgebracht, deren Dicke erheblich größer ist als die des Flüssigresists 3. Die Dicke der Trennfolie beträgt beispielsweise 75 oder 100 µm. Bei Bedarf können aber auch beide Seiten der Leiter­ platte 1 mit der Trennfolie 4 beschichtet werden.On the upper side of this, as far as conventionally formed circuit board 1 , as shown in Fig. 1, a release film 4 is applied, the thickness of which is considerably greater than that of the liquid resist 3rd The thickness of the separating film is, for example, 75 or 100 μm. If necessary, however, both sides of the circuit board 1 can be coated with the release film 4 .

Die Trennfolie 4 wird an den Stellen, an denen sich PADs 2 befinden, weggeätzt, so daß die PADs 2 für Bestückungs­ zwecke zugänglich sind. Zwischen den PADs 2 wird die Trennfolie 4 jedoch nicht entfernt, so daß Trennwände um die PADs 2 gebildet werden. In diesem Zustand, der in Fig. 1 dargestellt ist, liefert der Leiterplattenhersteller die Leiterplatte 1 an den Leiterplattenbestücker.The release film 4 is etched away at the points where PADs 2 are located, so that the PADs 2 are accessible for assembly purposes. However, the separating film 4 is not removed between the PADs 2 , so that dividing walls are formed around the PADs 2 . In this state, which is shown in FIG. 1, the circuit board manufacturer supplies the circuit board 1 to the circuit board assembler.

Vom Leiterplattenbestücker wird nun mittels Schablonen­ druck ein Lotmaterial 5, z. B. eine Lotpaste 5, auf die PADs 2 aufgebracht. Bei Verwendung einer Lotpaste 5 wer­ den, wie in Fig. 2 dargestellt, die durch die Trennfolie 4 geschaffenen Löcher nicht nur gefüllt, sondern sogar ge­ häuft gefüllt. Bei Verwendung eines reinen Lots ist eine Häufung möglich, aber nicht unbedingt nötig. In diesem Fall muß jedoch zusätzlich vorher oder nachher ein Fluß­ mittel beigefügt werden.From the PCB assembler a solder material 5 , z. B. a solder paste 5 , applied to the PADs 2 . When using a solder paste 5 who, as shown in Fig. 2, the holes created by the release film 4 not only filled, but even filled ge. If a pure solder is used, an accumulation is possible, but not absolutely necessary. In this case, however, a flux must also be added before or after.

In die so geschaffenen Lotdepots 5 hinein werden dann ge­ mäß Fig. 3 die Bauelemente 6 mit ihren Gegenkontaktstellen 7 bzw. Pins 7 hineinbestückt. Die Lotpaste 5 wird dabei etwas aus den durch die Trennfolie 4 geschaffenen Löchern verdrängt. Die Trennfolie 4 verhindert jedoch, daß über­ mäßig viel Lotpaste 5 aus den durch die Trennfolie 4 ge­ schaffenen Löchern verdrängt wird. Es wird also einerseits verhindert, daß zu wenig Lotpaste 5 zwischen den PADs 2 und den korrespondierenden Pins 7 vorhanden ist. Anderer­ seits wird auch verhindert, daß zuviel Lotpaste 5 zwischen benachbarten Löcher vorhanden ist. Das Lotmaterial 5 wird also dort zurückgehalten, wo es sein soll, und von Be­ reichen ferngehalten, an die es nicht gelangen soll.Then the components are used in the thus created solder deposits 5 in accelerator as FIG. 3 in 6 equipped with their counter-contact points 7 and 7 pins. The solder paste 5 is displaced somewhat from the holes created by the separating film 4 . The release film 4 prevents, however, that a moderate amount of solder paste 5 is displaced from the holes created by the separating film 4 . On the one hand, it is prevented that too little solder paste 5 is present between the PADs 2 and the corresponding pins 7 . On the other hand, it is also prevented that there is too much solder paste 5 between adjacent holes. The solder material 5 is thus retained where it should be, and is kept away from loading areas to which it should not reach.

Die bestückte Leiterplatte 1 wird nunmehr, z. B. in einem Infrarotofen, erhitzt, so daß das in der Lotpaste 5 ent­ haltene Lötzinn schmilzt und einen guten elektrischen Kontakt zwischen korrespondierenden PADs 2 und Pins 7 schafft. Der dadurch erreichte Zustand der bestückten Leiterplatte 1 ist in Fig. 4 dargestellt.The assembled circuit board 1 is now, for. B. heated in an infrared oven, so that the solder contained in the solder paste 5 ent melts and creates good electrical contact between corresponding PADs 2 and pins 7 . The state of the populated circuit board 1 thus achieved is shown in FIG. 4.

Die Leiterplatte 1 wird sodann in üblicher Weise, soweit vorgesehen, auf der Oberseite mit bedrahteten und auf der Unterseite mit SMD-Bauelementen, allerdings nicht in Fine- Pitch-Technik, bestückt sowie schwallgelötet. Wenn die Leiterplatte 1 jedoch auf beiden Seiten ausschließlich mit SMD-Bauelementen bestückt wird, kann auch die Unter­ seite der Leiterplatte 1 in prinzipiell gleicher Art und Weise wie die Oberseite bestückt und gelötet werden. Ins­ besondere in diesem letztgenannten Fall kann ein Aufbrin­ gen einer Trennfolie 4 auch auf die Unterseite der Lei­ terplatte 1 sinnvoll und vorteilhaft sein.The circuit board 1 is then, in the usual way, as far as provided, equipped with wired on the top and with SMD components on the bottom, but not in fine-pitch technology, and wave soldered. However, if the circuit board 1 is only equipped with SMD components on both sides, the underside of the circuit board 1 can be assembled and soldered in basically the same way as the top. In particular, in this latter case, application of a release film 4 to the underside of Lei terplatte 1 can be useful and advantageous.

Das obenstehend beschriebene Verfahren ist prinzipiell bei beliebigen Abständen zwischen einzelnen PADs 2 anwendbar. Besonders vorteilhaft ist es jedoch für sogenannte Fine- Pitch-Bauelemente anwendbar, d. h. Bauelemente mit Raster­ maßen kleiner oder gleich 635 µm. Bei diesen Bauelementen ist die Gefahr von unerwünschter Brückenbildung bzw. uner­ wünschter Nichtkontaktierung nämlich besonders groß.The method described above can in principle be used for any spacing between individual PADs 2 . However, it can be used particularly advantageously for so-called fine-pitch components, ie components with a grid dimension of less than or equal to 635 μm. With these components, the risk of undesired bridging or undesired non-contacting is particularly great.

Claims (2)

1. Bestückungsverfahren für eine Leiterplatte (1), die Kontaktstellen (2) für Gegenkontaktstellen (7) von elek­ tronischen Bauelementen (6) aufweist, mit denen die Lei­ terplatte (1) zu bestücken ist, mit folgenden Schritten:
  • - auf die Leiterplatte (1) wird eine Trennfolie (4) auf­ gebracht,
  • - die Trennfolie (4) wird an den Kontaktstellen (2) ent­ fernt,
  • - auf die Leiterplatte (1) wird ein Lotmaterial (5) auf­ gebracht,
  • - die elektronischen Bauelemente (6) werden mit ihren Ge­ genkontaktstellen (7) auf die Kontaktstellen (2) aufge­ setzt,
  • - das Lotmaterial (5) wird erhitzt und so geschmolzen.
1. assembly method for a printed circuit board ( 1 ), the contact points ( 2 ) for mating contact points ( 7 ) of electronic components ( 6 ) with which the Lei terplatte ( 1 ) is to be assembled, with the following steps:
  • - A release film ( 4 ) is placed on the circuit board ( 1 ),
  • - The separating film ( 4 ) is removed at the contact points ( 2 ),
  • - A solder material ( 5 ) is placed on the circuit board ( 1 ),
  • - The electronic components ( 6 ) are placed with their Ge counter-contact points ( 7 ) on the contact points ( 2 ),
  • - The solder material ( 5 ) is heated and melted in this way.
2. Leiterplatte (1) mit Kontaktstellen (2), mit denen die Gegenkontaktstellen (7) von elektronischen Bauelementen (6) verlötet sind, wobei zwischen benachbarten Kontakt­ stellen (2) zusätzlich zu einer Photoresistschicht (3) eine Trennfolie (4) angeordnet ist.2. Printed circuit board ( 1 ) with contact points ( 2 ) with which the mating contact points ( 7 ) of electronic components ( 6 ) are soldered, a separating film ( 4 ) being arranged between adjacent contact points ( 2 ) in addition to a photoresist layer ( 3 ) .
DE4243356A 1992-12-21 1992-12-21 Circuit board mounting process Withdrawn DE4243356A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE4243356A DE4243356A1 (en) 1992-12-21 1992-12-21 Circuit board mounting process

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Application Number Priority Date Filing Date Title
DE4243356A DE4243356A1 (en) 1992-12-21 1992-12-21 Circuit board mounting process

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DE4243356A1 true DE4243356A1 (en) 1994-06-23

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DE4243356A Withdrawn DE4243356A1 (en) 1992-12-21 1992-12-21 Circuit board mounting process

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0723387A1 (en) * 1995-01-19 1996-07-24 Digital Equipment Corporation Soldermask gasketing of printed wiring board surface mount pads
WO2019012136A1 (en) * 2017-07-13 2019-01-17 Safran Electronics & Defense Attaching an smd to an insulating layer with a solder joint in a cavity formed in an insulating layer
WO2019012139A1 (en) * 2017-07-13 2019-01-17 Safran Electronics & Defense Electronic board comprising smds soldered on buried solder pads

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4088828A (en) * 1975-03-04 1978-05-09 Matsushita Electric Industrial Co., Ltd. Printed circuit board
AT367943B (en) * 1977-11-21 1982-08-10 Ciba Geigy Ag METHOD FOR PRODUCING SOLDER STOP MASKS ON PRINTED CIRCUITS
DE3824008A1 (en) * 1988-07-15 1990-01-25 Contraves Ag ELECTRONIC CIRCUIT AND METHOD FOR THE PRODUCTION THEREOF

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4088828A (en) * 1975-03-04 1978-05-09 Matsushita Electric Industrial Co., Ltd. Printed circuit board
AT367943B (en) * 1977-11-21 1982-08-10 Ciba Geigy Ag METHOD FOR PRODUCING SOLDER STOP MASKS ON PRINTED CIRCUITS
DE3824008A1 (en) * 1988-07-15 1990-01-25 Contraves Ag ELECTRONIC CIRCUIT AND METHOD FOR THE PRODUCTION THEREOF

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
DE-Z.: Components 30 (1992) H. 4, "SIPAD-Tech- nologie ermöglicht SMD-Montage ohne Lötpaste", S. 143-146 *

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0723387A1 (en) * 1995-01-19 1996-07-24 Digital Equipment Corporation Soldermask gasketing of printed wiring board surface mount pads
WO2019012136A1 (en) * 2017-07-13 2019-01-17 Safran Electronics & Defense Attaching an smd to an insulating layer with a solder joint in a cavity formed in an insulating layer
WO2019012139A1 (en) * 2017-07-13 2019-01-17 Safran Electronics & Defense Electronic board comprising smds soldered on buried solder pads
FR3069128A1 (en) * 2017-07-13 2019-01-18 Safran Electronics & Defense FIXING A CMS ON AN INSULATING LAYER WITH A SOLDER JOINT IN A CAVITY REALIZED IN AN INSULATING LAYER
FR3069127A1 (en) * 2017-07-13 2019-01-18 Safran Electronics & Defense ELECTRONIC CARD COMPRISING BRASED CMS ON BRAZING BEACHES ENTERREES
CN111034375A (en) * 2017-07-13 2020-04-17 赛峰电子与防务公司 Attaching an SMD to an insulating layer by a solder joint in a cavity formed in the insulating layer
CN111052884A (en) * 2017-07-13 2020-04-21 赛峰电子与防务公司 Electronic board comprising an SMD soldered on a buried pad
CN111034375B (en) * 2017-07-13 2020-12-01 赛峰电子与防务公司 Method for attaching electronic components to printed circuits
US10959338B2 (en) 2017-07-13 2021-03-23 Safran Electronics & Defense Attaching an SMD to an insulating layer with a solder joint in a cavity formed in an insulating layer
US11284519B2 (en) 2017-07-13 2022-03-22 Safran Electronics & Defense Electronic board comprising SMDS soldered on buried solder pads
IL271985B (en) * 2017-07-13 2022-07-01 Safran Electronics & Defense Attaching an smd to an insulating layer with a solder joint in a cavity formed in an insulating layer

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