DE3854455D1 - Halbleiteranordnung und Verfahren zu ihrer Herstellung. - Google Patents

Halbleiteranordnung und Verfahren zu ihrer Herstellung.

Info

Publication number
DE3854455D1
DE3854455D1 DE3854455T DE3854455T DE3854455D1 DE 3854455 D1 DE3854455 D1 DE 3854455D1 DE 3854455 T DE3854455 T DE 3854455T DE 3854455 T DE3854455 T DE 3854455T DE 3854455 D1 DE3854455 D1 DE 3854455D1
Authority
DE
Germany
Prior art keywords
manufacture
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3854455T
Other languages
English (en)
Other versions
DE3854455T2 (de
Inventor
Katsuya Okumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3854455D1 publication Critical patent/DE3854455D1/de
Publication of DE3854455T2 publication Critical patent/DE3854455T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors having potential barriers
    • H01L29/94—Metal-insulator-semiconductors, e.g. MOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
    • H01L29/66621—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation using etching to form a recess at the gate location
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/053—Field effect transistors fets

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE3854455T 1987-07-16 1988-07-15 Halbleiteranordnung und Verfahren zu ihrer Herstellung. Expired - Lifetime DE3854455T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62177887A JPH0640583B2 (ja) 1987-07-16 1987-07-16 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE3854455D1 true DE3854455D1 (de) 1995-10-19
DE3854455T2 DE3854455T2 (de) 1996-03-14

Family

ID=16038794

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3854455T Expired - Lifetime DE3854455T2 (de) 1987-07-16 1988-07-15 Halbleiteranordnung und Verfahren zu ihrer Herstellung.

Country Status (5)

Country Link
US (2) US4952993A (de)
EP (1) EP0299505B1 (de)
JP (1) JPH0640583B2 (de)
KR (1) KR910006703B1 (de)
DE (1) DE3854455T2 (de)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
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US5146291A (en) * 1988-08-31 1992-09-08 Mitsubishi Denki Kabushiki Kaisha MIS device having lightly doped drain structure
US5217913A (en) * 1988-08-31 1993-06-08 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing an MIS device having lightly doped drain structure and conductive sidewall spacers
EP0661733A2 (de) * 1993-12-21 1995-07-05 International Business Machines Corporation Eindimensionale Silizium-Quantumdrahtelementen und Verfahren zur Herstellung
US5409853A (en) * 1994-05-20 1995-04-25 International Business Machines Corporation Process of making silicided contacts for semiconductor devices
KR0172262B1 (ko) * 1995-12-30 1999-02-01 김주용 반도체 소자의 제조방법
KR100207472B1 (ko) 1996-06-07 1999-07-15 윤종용 티타늄 질화막 적층 구조의 게이트 전극을 갖춘 반도체장치 및 그 제조 방법
US5763310A (en) * 1996-10-08 1998-06-09 Advanced Micro Devices, Inc. Integrated circuit employing simultaneously formed isolation and transistor trenches
US5821573A (en) * 1996-10-17 1998-10-13 Mitsubishi Semiconductor America, Inc. Field effect transistor having an arched gate and manufacturing method thereof
US5846862A (en) * 1997-05-20 1998-12-08 Advanced Micro Devices Semiconductor device having a vertical active region and method of manufacture thereof
US5994736A (en) * 1997-09-22 1999-11-30 United Microelectronics Corporation Semiconductor device having buried gate electrode with silicide layer and manufacture method thereof
DE19743342C2 (de) * 1997-09-30 2002-02-28 Infineon Technologies Ag Feldeffekttransistor hoher Packungsdichte und Verfahren zu seiner Herstellung
US5891763A (en) * 1997-10-22 1999-04-06 Wanlass; Frank M. Damascene pattering of SOI MOS transistors
US5998835A (en) 1998-02-17 1999-12-07 International Business Machines Corporation High performance MOSFET device with raised source and drain
EP1060518A1 (de) * 1998-02-20 2000-12-20 Infineon Technologies AG Graben-gate-mos-transistor, dessen verwendung in einer eeprom-anordnung und verfahren zu dessen herstellung
US6133132A (en) * 2000-01-20 2000-10-17 Advanced Micro Devices, Inc. Method for controlling transistor spacer width
US6621131B2 (en) 2001-11-01 2003-09-16 Intel Corporation Semiconductor transistor having a stressed channel
US6900502B2 (en) * 2003-04-03 2005-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. Strained channel on insulator device
US6882025B2 (en) * 2003-04-25 2005-04-19 Taiwan Semiconductor Manufacturing Company, Ltd. Strained-channel transistor and methods of manufacture
US6867433B2 (en) * 2003-04-30 2005-03-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors
US20050012087A1 (en) * 2003-07-15 2005-01-20 Yi-Ming Sheu Self-aligned MOSFET having an oxide region below the channel
US6936881B2 (en) * 2003-07-25 2005-08-30 Taiwan Semiconductor Manufacturing Company, Ltd. Capacitor that includes high permittivity capacitor dielectric
US7078742B2 (en) * 2003-07-25 2006-07-18 Taiwan Semiconductor Manufacturing Co., Ltd. Strained-channel semiconductor structure and method of fabricating the same
US6940705B2 (en) * 2003-07-25 2005-09-06 Taiwan Semiconductor Manufacturing Company, Ltd. Capacitor with enhanced performance and method of manufacture
US7101742B2 (en) * 2003-08-12 2006-09-05 Taiwan Semiconductor Manufacturing Company, Ltd. Strained channel complementary field-effect transistors and methods of manufacture
US7112495B2 (en) * 2003-08-15 2006-09-26 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit
US20050035410A1 (en) * 2003-08-15 2005-02-17 Yee-Chia Yeo Semiconductor diode with reduced leakage
US7071052B2 (en) * 2003-08-18 2006-07-04 Taiwan Semiconductor Manufacturing Company, Ltd. Resistor with reduced leakage
US7888201B2 (en) 2003-11-04 2011-02-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors
US7060567B1 (en) * 2005-07-26 2006-06-13 Episil Technologies Inc. Method for fabricating trench power MOSFET
US8558278B2 (en) 2007-01-16 2013-10-15 Taiwan Semiconductor Manufacturing Company, Ltd. Strained transistor with optimized drive current and method of forming
US7943961B2 (en) 2008-03-13 2011-05-17 Taiwan Semiconductor Manufacturing Company, Ltd. Strain bars in stressed layers of MOS devices
US7808051B2 (en) 2008-09-29 2010-10-05 Taiwan Semiconductor Manufacturing Company, Ltd. Standard cell without OD space effect in Y-direction
US9748356B2 (en) 2012-09-25 2017-08-29 Stmicroelectronics, Inc. Threshold adjustment for quantum dot array devices with metal source and drain
US9601630B2 (en) * 2012-09-25 2017-03-21 Stmicroelectronics, Inc. Transistors incorporating metal quantum dots into doped source and drain regions
US10002938B2 (en) 2013-08-20 2018-06-19 Stmicroelectronics, Inc. Atomic layer deposition of selected molecular clusters
CN109037337A (zh) * 2018-06-28 2018-12-18 华为技术有限公司 一种功率半导体器件及制造方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1399163A (en) * 1972-11-08 1975-06-25 Ferranti Ltd Methods of manufacturing semiconductor devices
US4042953A (en) * 1973-08-01 1977-08-16 Micro Power Systems, Inc. High temperature refractory metal contact assembly and multiple layer interconnect structure
JPS5316581A (en) * 1976-05-29 1978-02-15 Toshiba Corp Insulated gate type field effect transistor
JPS54161889A (en) * 1978-06-13 1979-12-21 Toshiba Corp Insulated gate type field effect transistor
US4336550A (en) * 1980-03-20 1982-06-22 Rca Corporation CMOS Device with silicided sources and drains and method
US4324038A (en) * 1980-11-24 1982-04-13 Bell Telephone Laboratories, Incorporated Method of fabricating MOS field effect transistors
JPH0682837B2 (ja) * 1982-09-16 1994-10-19 財団法人半導体研究振興会 半導体集積回路
US4505023A (en) * 1982-09-29 1985-03-19 The United States Of America As Represented By The Secretary Of The Navy Method of making a planar INP insulated gate field transistor by a virtual self-aligned process
US4830975A (en) * 1983-01-13 1989-05-16 National Semiconductor Corporation Method of manufacture a primos device
US4536782A (en) * 1983-09-22 1985-08-20 General Electric Company Field effect semiconductor devices and method of making same
JPS6070766A (ja) * 1983-09-26 1985-04-22 Mitsubishi Electric Corp 半導体装置の製造方法
US4546066A (en) * 1983-09-27 1985-10-08 International Business Machines Corporation Method for forming narrow images on semiconductor substrates
JPS61102067A (ja) * 1984-10-24 1986-05-20 Mitsubishi Electric Corp 半導体装置
US4685196A (en) * 1985-07-29 1987-08-11 Industrial Technology Research Institute Method for making planar FET having gate, source and drain in the same plane
JPS62136877A (ja) * 1985-12-11 1987-06-19 Toshiba Corp 絶縁ゲ−ト型電界効果トランジスタ

Also Published As

Publication number Publication date
US4952993A (en) 1990-08-28
KR890003049A (ko) 1989-04-12
EP0299505A2 (de) 1989-01-18
DE3854455T2 (de) 1996-03-14
EP0299505A3 (en) 1990-01-24
JPS6421967A (en) 1989-01-25
US5093273A (en) 1992-03-03
JPH0640583B2 (ja) 1994-05-25
KR910006703B1 (ko) 1991-08-31
EP0299505B1 (de) 1995-09-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)