DE3719219A1 - Method for producing a printed-circuit board - Google Patents

Method for producing a printed-circuit board

Info

Publication number
DE3719219A1
DE3719219A1 DE19873719219 DE3719219A DE3719219A1 DE 3719219 A1 DE3719219 A1 DE 3719219A1 DE 19873719219 DE19873719219 DE 19873719219 DE 3719219 A DE3719219 A DE 3719219A DE 3719219 A1 DE3719219 A1 DE 3719219A1
Authority
DE
Germany
Prior art keywords
circuit board
graphite
printed
contact points
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE19873719219
Other languages
German (de)
Inventor
Robert Joens
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Grundig EMV Elektromechanische Versuchsanstalt Max Grundig GmbH
Original Assignee
Grundig EMV Elektromechanische Versuchsanstalt Max Grundig GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Grundig EMV Elektromechanische Versuchsanstalt Max Grundig GmbH filed Critical Grundig EMV Elektromechanische Versuchsanstalt Max Grundig GmbH
Priority to DE19873719219 priority Critical patent/DE3719219A1/en
Publication of DE3719219A1 publication Critical patent/DE3719219A1/en
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/245Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • H05K3/247Finish coating of conductors by using conductive pastes, inks or powders
    • H05K3/249Finish coating of conductors by using conductive pastes, inks or powders comprising carbon particles as main constituent
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703Plating
    • H05K2203/0723Electroplating, e.g. finish plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • H05K3/062Etching masks consisting of metals or alloys or metallic inorganic compounds
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)

Abstract

Method for producing a printed-circuit board which on both sides has conductor (wiring) tracks with plated-through connecting points. Such printed-circuit boards are principally produced using the MR method. The printed-circuit boards have, as required, contact pads to which pressure elements are applied and which therefore have a gold support (locating) pad. This gold support pad is expensive and is therefore to be replaced by a graphite support pad. In order to be able to apply a graphite support pad to a printed-circuit board at specific contact points of a printed-circuit board, which is produced using the MR method, in a technically acceptable quality and a cost-effective fashion, it is necessary to print a graphite resist onto the printed-circuit board as early as after the chemical copper-plating of the printed-circuit board in order to produce the connection conductivity. The graphite resist which is to be used must have a prescribed chemical stability.

Description

Die Erfindung bezieht sich auf ein Verfahren zur Herstellung einer Leiterplatte, die beidseitig Leiterzüge mit durchkontaktierten Verbindungsstellen aufweist, wobei die metallischen Leiterzüge in bekannter Weise auf galvanischem und/oder chemischem Wege aufgebracht und Kontaktstellen zur Druckkontaktierung über Druckelemente angeordnet sind.The invention relates to a method for Production of a printed circuit board, the conductor tracks on both sides with plated-through connection points, wherein the metallic conductor tracks in a known manner applied by galvanic and / or chemical means and Contact points for pressure contact via pressure elements are arranged.

Es sind Verfahren zur Herstellung einer Leiterplatte bekannt, die beidseitig Leiterzüge mit durchkontaktierten Verbindungsstellen aufweist. Die Herstellung dieser Leiterplatten geschieht vorwiegend nach dem Metallresist-Verfahren (MR-Verfahren), das ein chemisch-galvanisches Verfahren zur Herstellung von Leiterplatten mit durchmetallisierten Löchern (durchkontaktierten Verbindungsstellen) ist. Diese geben entweder eine leitende Verbindung zwischen Bestückungs- und Lötseite oder dienen zur festen mechanischen Verankerung und sicheren Verlötung der eingesteckten Bauelemente. Der Begriff Metallresist-Verfahren ist zurückzuführen auf das Bilden der Leiterzüge aus Kupfer auf kupferkaschiertem Isolierstoff und das Galvanisieren derselben mit Zinn, Blei-Zinn. Gleichzeitig dienen diese Metalle als Ätzresist beim Abätzen der kupfernen Grundleitschicht. Edlere Metalle, wie Silber, Gold, können in gesonderten Arbeitsgängen an besonderen Stellen zusätzlich aufgebracht werden. Von der Wahl des Metalles hängt es ab, ob z.B. an diesen besonderen Kontaktstellen ein langzeitbeständiger Korrosionsschutz bei geringstem Übergangswiderstand gegeben ist. Hier haben sich mit einer Goldauflage versehene Kontaktstellen besonders bewährt. Die für das Aufbringen der Goldauflage erforderlichen zusätzlichen Arbeitsgänge bestehen im wesentlichen aus dem Aufbringen eines Galvanoresist-Negativdruckes, dem Abdecken der Kanten, dem Vernickeln und Vergolden der Kontaktstellen, dem Strippen, Nachreinigen und Bürsten. Diese Arbeitsgänge sind verfahrenstechnisch und somit kostenmäßig aufwendig.There are methods of making a printed circuit board known, the conductor tracks with plated-through holes on both sides Has connection points. The making of this Printed circuit boards mainly happen after the Metal resist method (MR method), the one chemical-galvanic process for the production of Printed circuit boards with through-plated holes (plated-through connection points). Give this either a conductive connection between assembly  and solder side or serve for fixed mechanical Anchoring and securely soldering the inserted Components. The term metal resist process is attributed to the formation of the conductor tracks from copper on copper-clad insulating material and electroplating the same with tin, lead-tin. At the same time, these serve Metals as an etching resist when etching the copper Basic control layer. Noble metals like silver, gold, can be carried out in special operations at special points can also be applied. From the choice of the metal it depends on whether at these special contact points long-term corrosion protection with the least Contact resistance is given. Here are with gold-plated contact points in particular proven. The one for applying the gold plating necessary additional operations exist in essentially from applying a Galvanoresist negative pressure, covering the edges, the nickel plating and gold plating of the contact points, the Stripping, cleaning and brushing. These operations are procedural and therefore costly.

Aufgabe der Erfindung ist es, ein kostengünstiges Verfahren bei der Herstellung von Leiterplatten nach dem MR-Verfahren zu finden, bei dem die Goldauflage auf den Kontaktstellen, die der Druckkontaktierung dienen, durch eine Graphitauflage zu ersetzen ist.The object of the invention is an inexpensive Process in the manufacture of printed circuit boards according to the Find MR method in which the gold plating on the Contact points that are used for pressure contact a graphite layer is to be replaced.

Zur Lösung der Aufgabe werden erfindungsgemäß die im kennzeichnenden Teil des Anspruchs 1 angegebenen Verfahrensschritte vorgeschlagen. To achieve the object, the im characterizing part of claim 1 specified Process steps proposed.  

Die Kontaktstellen, die vorzugsweise zur Druckkontaktierung von mehreren Einzeltasten in Form von Tastenfeldern angeordnet sind, können auch als Graphitkontakte ausgebildet sein. Es ist also möglich, statt der zum Vergolden nötigen Arbeitsschritte solche einzuführen, die zum Aufbringen einer Graphitauflage erforderlich sind. Hierdurch bleibt der Verfahrensaufwand jedoch ebenso kostenaufwendig wie beim Aufbringen einer Goldauflage. Zusätzlich ist hierbei nachteilig, daß durch den galvanischen Aufbau und dem anschließenden Ätzen die Kontaktstellen hohe Seitenwände aufweisen. Dies bedeutet, daß die Kontaktstellen absolut konturdeckend mit einer Graphitauflage zu bedrucken sind, um zu vermeiden, daß in Zwischenräumen zwischen einer Kontaktstelle zur anderen oder zu einem Leiterzug, ein überschüssiges Graphitmaterial gelangt und zu einer Kurzschlußbrücke führt. Mit den üblichen kostengünstigen Druckverfahren, z.B. dem Siebdruck und bei geringen Abständen zwischen den Kontaktstellen, ist der aufgeführte Nachteil nicht zu beseitigen. Das erfindungsgemäß geschilderte Verfahren umgeht diesen Nachteil dadurch, daß die Graphitbeschichtung der Kontaktstellen integrierter Bestandteil des bekannten MR-Verfahrens ist. Die Graphitauflagen erhalten Leiteranbindungen, die so ausgebildet sind, daß diese nach dem Laminieren, Belichten und Entwickeln den Anfang des galvanisch aufzubringenden Anschlußleiters bilden, damit beim späteren alkalischen Ätzen ein Durchätzen der Basiskupferschicht ausgeschlossen ist. Das vorgeschlagene Verfahren ist insbesondere geeignet für wässrig-alkalisch entwickel- und strippbare Galvanoresiste. Dies setzt jedoch voraus, daß die zu verwendende Graphitauflage in Form eines Graphitlackes im gesamten pH-Bereich beständig ist. Als integrierter Bestandteil der Graphitauflage im MR-Verfahren wird die Leiterplatte bereits nach dem Lochen der durchzukontaktierenden Stellen und dem anschließenden chemischen Verkupfern mit dem Graphitdruck an den Kontaktstellen versehen. Die Weiterverarbeitung der Leiterplatte mit den aufgedruckten Graphit-Kontaktstellen erfolgt voll nach dem bekannten MR-Verfahren ohne jeglich erforderliche Rücksichtnahme auf die graphitbedruckten Stellen. Es ist auch möglich, daß das Aufbringen des Graphitlackes bereits vor dem chemischen Verkupfern stattfindet. Nach dem Strippen des Galvanoresist im Verfahrensablauf dienen die verbliebenen verzinnten und durch Graphitlack dargestellten Strukturflächen als Ätzresist, wobei der Graphitlack auch beim anschließenden Sn-Strippen nicht angegriffen wird. Anschließend an das Aufdrucken eines Lötstopplacks wird die Leiterplatte heiß verzinnt, und auch hierbei halten die Graphit-Kontaktstellen diesem Verfahrensschritt stand und müssen nicht eigens geschützt bzw. abgedeckt werden.The contact points, which are preferably for Pressure contacting of several individual keys in the form of Keypads can also be arranged as Graphite contacts can be formed. So it's possible instead of the steps required for gilding introduce that to apply a graphite overlay required are. This leaves the procedural effort however, just as costly as applying one Gold plating. In addition, it is disadvantageous here that the galvanic structure and the subsequent etching Contact points have high side walls. This means, that the contact points absolutely cover the contour with a Graphite overlay are to be printed on in order to avoid that in Gaps between one contact point to another or to a ladder, an excess Graphite material arrives and to a short circuit bridge leads. With the usual inexpensive printing processes, e.g. screen printing and with small gaps between the contact points, the disadvantage mentioned is not too remove. The method described according to the invention circumvents this disadvantage in that the Integrated graphite coating of the contact points It is part of the known MR method. The Graphite pads get conductor connections that way are designed so that after lamination, Expose and develop the beginning of the galvanic form to be attached lead so that when later alkaline etching an etching through the Base copper layer is excluded. The proposed  The method is particularly suitable for aqueous alkaline developable and strippable galvanoresists. This sets however, assume that the graphite layer to be used in Form of a graphite varnish resistant in the entire pH range is. As an integral part of the graphite layer in the MR method is already the PCB after the Punching the locations to be contacted and the subsequent chemical copper plating with graphite printing provided at the contact points. Further processing the printed circuit board with the printed ones Graphite contact points are made entirely according to the known MR procedures without any consideration on the graphite printed areas. It is also possible, that the application of the graphite varnish before chemical copper plating takes place. After stripping the The remaining are used for galvanoresist in the process tinned and represented by graphite varnish Structured surfaces as an etching resist, the graphite varnish also is not attacked during the subsequent Sn stripping. Subsequent to the printing of a solder resist the circuit board is hot tinned, and hold here too the graphite contact points stood this process step and do not need to be specially protected or covered.

Claims (3)

1. Verfahren zur Herstellung einer Leiterplatte, die beidseitig Leiterzüge mit durchkontaktierten Verbindungsstellen aufweist, wobei die metallischen Leiterzüge in bekannter Weise auf galvanischem und/oder chemischem Wege aufgebracht und Kontaktstellen zur Druckkontaktierung über Druckelemente angeordnet sind, dadurch gekennzeichnet, daß die Kontaktstellen aus einer Graphitauflage bestehen, die nach folgenden Verfahrensschritten auf die Leiterplatte aufgebracht sind:
  • a) Eine beidseitig kupferkaschierte Leiterplatte wird in bekannter Weise an den durchzukontaktierenden Stellen gelocht und anschließend chemisch verkupfert,
  • b) eine Graphitauflage in Form eines Graphitlacks wird an den vorgesehenen Kontaktstellen in gewünschter Formgebung aufgedruckt und bedarfsweise eingebrannt,
  • c) die Weiterverarbeitung der Leiterplatte mit aufgedruckten Graphit-Kontaktstellen erfolgt vorwiegend nach dem bisher bekannten MR-Verfahren, wie Laminieren, Belichten, Entwickeln, galvanisches Aufbringen einer Kupfer- und Zinn- oder Blei-Zinn-Schicht, Folie strippen, ätzen und strippen, Aufbringen von Lötstoppdruck, bedarfsweise Heißverzinnen und mit Abziehlack versehen, Lochen, Formschneiden.
1. A process for producing a printed circuit board which has conductor tracks with plated-through connection points on both sides, the metallic conductor tracks being applied in a known manner by galvanic and / or chemical means and contact points for pressure contacting being arranged via pressure elements, characterized in that the contact points consist of a graphite layer which are applied to the circuit board according to the following process steps:
  • a) A copper-clad printed circuit board on both sides is perforated in a known manner at the points to be plated through and then chemically copper-plated,
  • b) a graphite layer in the form of a graphite varnish is printed on the intended contact points in the desired shape and baked if necessary,
  • c) the further processing of the printed circuit board with printed graphite contact points takes place predominantly according to the MR method known to date, such as lamination, exposure, development, galvanic application of a copper and tin or lead-tin layer, stripping, etching and stripping, Applying solder stop pressure, if necessary hot tinning and provided with peeling varnish, punching, shape cutting.
2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß das Aufbringen des Graphitlacks nach Verfahrensschritt b bereits im Verfahrenschritt a und hierbei vor dem chemischen Verkupfern auf die Leiterplatte aufgebracht wird.2. The method according to claim 1, characterized characterized in that the application of the graphite varnish after Method step b already in method steps a and here before chemical copper plating on the Printed circuit board is applied. 3. Verfahren nach den Ansprüchen 1 und 2, dadurch gekennzeichnet, daß der Graphitlack vorwiegend durch Siebdruck auf die Leiterplatte aufgebracht wird.3. The method according to claims 1 and 2, characterized characterized in that the graphite varnish predominantly by Screen printing is applied to the circuit board.
DE19873719219 1987-06-09 1987-06-09 Method for producing a printed-circuit board Ceased DE3719219A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE19873719219 DE3719219A1 (en) 1987-06-09 1987-06-09 Method for producing a printed-circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19873719219 DE3719219A1 (en) 1987-06-09 1987-06-09 Method for producing a printed-circuit board

Publications (1)

Publication Number Publication Date
DE3719219A1 true DE3719219A1 (en) 1988-12-22

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Family Applications (1)

Application Number Title Priority Date Filing Date
DE19873719219 Ceased DE3719219A1 (en) 1987-06-09 1987-06-09 Method for producing a printed-circuit board

Country Status (1)

Country Link
DE (1) DE3719219A1 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3137279A1 (en) * 1981-09-18 1983-04-14 Wilhelm Ruf KG, 8000 München MULTI-LAYER CIRCUIT BOARD AND METHOD FOR THE PRODUCTION THEREOF
DE3517551A1 (en) * 1984-06-22 1985-10-24 Alps Electric Co Ltd Thin-film switch
DE3532834A1 (en) * 1985-09-12 1987-03-19 Schering Ag METHOD FOR INTEGRATING RESISTORS IN CHEMICAL SEPARATED CIRCUIT NETWORKS

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3137279A1 (en) * 1981-09-18 1983-04-14 Wilhelm Ruf KG, 8000 München MULTI-LAYER CIRCUIT BOARD AND METHOD FOR THE PRODUCTION THEREOF
DE3517551A1 (en) * 1984-06-22 1985-10-24 Alps Electric Co Ltd Thin-film switch
DE3532834A1 (en) * 1985-09-12 1987-03-19 Schering Ag METHOD FOR INTEGRATING RESISTORS IN CHEMICAL SEPARATED CIRCUIT NETWORKS

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Dietrich, R., Carbon-Leitbooke, Leiterplatte '86, Bd. 1, VDI/VDE-Gesellschaft, Düssedorf 1986, S. 97-102 *
Hermann, G., et. al., Handbuch der Leiterplattentechnik, Eugen Lenze Verlag, Saalgau 1982, S. 191-196 *

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