DE3672519D1 - Planares halbleiterbauteil mit einer schutzringstruktur, klasse solcher bauteile und herstellungsverfahren. - Google Patents

Planares halbleiterbauteil mit einer schutzringstruktur, klasse solcher bauteile und herstellungsverfahren.

Info

Publication number
DE3672519D1
DE3672519D1 DE8686200696T DE3672519T DE3672519D1 DE 3672519 D1 DE3672519 D1 DE 3672519D1 DE 8686200696 T DE8686200696 T DE 8686200696T DE 3672519 T DE3672519 T DE 3672519T DE 3672519 D1 DE3672519 D1 DE 3672519D1
Authority
DE
Germany
Prior art keywords
class
manufacturing
components
ring structure
semiconductor component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8686200696T
Other languages
English (en)
Inventor
Minh-Chau Nguyen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of DE3672519D1 publication Critical patent/DE3672519D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/013Breakdown voltage
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/07Guard rings and cmos

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Thyristors (AREA)
DE8686200696T 1985-04-26 1986-04-23 Planares halbleiterbauteil mit einer schutzringstruktur, klasse solcher bauteile und herstellungsverfahren. Expired - Lifetime DE3672519D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8506410A FR2581252B1 (fr) 1985-04-26 1985-04-26 Composant semiconducteur du type planar a structure d'anneaux de garde, famille de tels composants et procede de realisation

Publications (1)

Publication Number Publication Date
DE3672519D1 true DE3672519D1 (de) 1990-08-16

Family

ID=9318733

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686200696T Expired - Lifetime DE3672519D1 (de) 1985-04-26 1986-04-23 Planares halbleiterbauteil mit einer schutzringstruktur, klasse solcher bauteile und herstellungsverfahren.

Country Status (5)

Country Link
US (1) US5028548A (de)
EP (1) EP0199424B1 (de)
JP (1) JPH0799747B2 (de)
DE (1) DE3672519D1 (de)
FR (1) FR2581252B1 (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2201543A (en) * 1987-02-25 1988-09-01 Philips Electronic Associated A photosensitive device
US5032878A (en) * 1990-01-02 1991-07-16 Motorola, Inc. High voltage planar edge termination using a punch-through retarding implant
US5266831A (en) * 1991-11-12 1993-11-30 Motorola, Inc. Edge termination structure
US5677562A (en) * 1996-05-14 1997-10-14 General Instrument Corporation Of Delaware Planar P-N junction semiconductor structure with multilayer passivation
US6002159A (en) * 1996-07-16 1999-12-14 Abb Research Ltd. SiC semiconductor device comprising a pn junction with a voltage absorbing edge
JP3632344B2 (ja) * 1997-01-06 2005-03-23 日産自動車株式会社 半導体装置
EP1029358A1 (de) * 1997-11-03 2000-08-23 Infineon Technologies AG Hochspannungsfeste randstruktur für halbleiterbauelemente
GB2373634B (en) * 2000-10-31 2004-12-08 Fuji Electric Co Ltd Semiconductor device
GB2403850B (en) * 2000-10-31 2005-05-11 Fuji Electric Co Ltd Semiconductor device
JP5011611B2 (ja) 2001-06-12 2012-08-29 富士電機株式会社 半導体装置
DE10250608B4 (de) * 2002-10-30 2005-09-29 eupec Europäische Gesellschaft für Leistungshalbleiter mbH Thyristorbauelement mit verbessertem Sperrverhalten in Rückwärtsrichtung
US7595542B2 (en) * 2006-03-13 2009-09-29 Fairchild Semiconductor Corporation Periphery design for charge balance power devices
US7592668B2 (en) * 2006-03-30 2009-09-22 Fairchild Semiconductor Corporation Charge balance techniques for power devices
US7541247B2 (en) * 2007-07-16 2009-06-02 International Business Machines Corporation Guard ring structures for high voltage CMOS/low voltage CMOS technology using LDMOS (lateral double-diffused metal oxide semiconductor) device fabrication
US8174067B2 (en) 2008-12-08 2012-05-08 Fairchild Semiconductor Corporation Trench-based power semiconductor devices with increased breakdown voltage characteristics
US8304829B2 (en) 2008-12-08 2012-11-06 Fairchild Semiconductor Corporation Trench-based power semiconductor devices with increased breakdown voltage characteristics
US8227855B2 (en) * 2009-02-09 2012-07-24 Fairchild Semiconductor Corporation Semiconductor devices with stable and controlled avalanche characteristics and methods of fabricating the same
US8148749B2 (en) * 2009-02-19 2012-04-03 Fairchild Semiconductor Corporation Trench-shielded semiconductor device
US8049276B2 (en) * 2009-06-12 2011-11-01 Fairchild Semiconductor Corporation Reduced process sensitivity of electrode-semiconductor rectifiers
JP5558393B2 (ja) * 2011-03-10 2014-07-23 株式会社東芝 半導体装置
JP2012195519A (ja) * 2011-03-18 2012-10-11 Kyoto Univ 半導体素子及び半導体素子の製造方法
WO2013021727A1 (ja) * 2011-08-05 2013-02-14 富士電機株式会社 半導体装置および半導体装置の製造方法
US8872278B2 (en) 2011-10-25 2014-10-28 Fairchild Semiconductor Corporation Integrated gate runner and field implant termination for trench devices
CN108475701B (zh) * 2015-11-27 2021-03-30 Abb电网瑞士股份公司 面积高效的浮置场环终端
US10424635B2 (en) * 2016-04-06 2019-09-24 Littelfuse, Inc. High voltage semiconductor device with guard rings and method associated therewith
CN107611165A (zh) * 2016-07-12 2018-01-19 北大方正集团有限公司 分压环的制备方法、分压环和功率晶体管
JP7190256B2 (ja) 2018-02-09 2022-12-15 ローム株式会社 半導体装置
US10361276B1 (en) * 2018-03-17 2019-07-23 Littelfuse, Inc. Embedded field plate field effect transistor

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2108781B1 (de) * 1970-10-05 1974-10-31 Radiotechnique Compelec
JPS523277B2 (de) * 1973-05-19 1977-01-27
FR2480036A1 (fr) * 1980-04-04 1981-10-09 Thomson Csf Structure de dispositif a semi-conducteur a anneau de garde et a fonctionnement unipolaire
DE3131611A1 (de) * 1981-08-10 1983-02-24 Siemens AG, 1000 Berlin und 8000 München Epitaxialer transistor
US4573064A (en) * 1981-11-02 1986-02-25 Texas Instruments Incorporated GaAs/GaAlAs Heterojunction bipolar integrated circuit devices
JPS5976466A (ja) * 1982-10-25 1984-05-01 Mitsubishi Electric Corp プレ−ナ形半導体装置
GB2131603B (en) * 1982-12-03 1985-12-18 Philips Electronic Associated Semiconductor devices
JPS59189679A (ja) * 1983-04-13 1984-10-27 Hitachi Ltd ダイオ−ド
JPS6012859A (ja) * 1983-06-20 1985-01-23 Ricoh Co Ltd フアクシミリ・複写機・ソ−タ複合装置

Also Published As

Publication number Publication date
EP0199424B1 (de) 1990-07-11
JPH0799747B2 (ja) 1995-10-25
FR2581252A1 (fr) 1986-10-31
EP0199424A3 (en) 1987-01-21
FR2581252B1 (fr) 1988-06-10
US5028548A (en) 1991-07-02
EP0199424A2 (de) 1986-10-29
JPS61248555A (ja) 1986-11-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL

8339 Ceased/non-payment of the annual fee