DE3586040D1 - Praezisionskondensator vom mos-typ hohen wertes. - Google Patents
Praezisionskondensator vom mos-typ hohen wertes.Info
- Publication number
- DE3586040D1 DE3586040D1 DE8585402316T DE3586040T DE3586040D1 DE 3586040 D1 DE3586040 D1 DE 3586040D1 DE 8585402316 T DE8585402316 T DE 8585402316T DE 3586040 T DE3586040 T DE 3586040T DE 3586040 D1 DE3586040 D1 DE 3586040D1
- Authority
- DE
- Germany
- Prior art keywords
- high value
- value precision
- precision capacitor
- capacitor
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000003990 capacitor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/676,033 US4639274A (en) | 1984-11-28 | 1984-11-28 | Method of making precision high-value MOS capacitors |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3586040D1 true DE3586040D1 (de) | 1992-06-17 |
Family
ID=24712948
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8585402316T Expired - Fee Related DE3586040D1 (de) | 1984-11-28 | 1985-11-27 | Praezisionskondensator vom mos-typ hohen wertes. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4639274A (de) |
EP (1) | EP0183623B1 (de) |
JP (1) | JPH0691183B2 (de) |
CA (1) | CA1232361A (de) |
DE (1) | DE3586040D1 (de) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5190886A (en) * | 1984-12-11 | 1993-03-02 | Seiko Epson Corporation | Semiconductor device and method of production |
JPS61139058A (ja) * | 1984-12-11 | 1986-06-26 | Seiko Epson Corp | 半導体製造装置 |
US4717680A (en) * | 1985-10-16 | 1988-01-05 | Harris Corporation | Fabrication of vertical NPN and PNP bipolar transistors in monolithic substrate |
NL8701357A (nl) * | 1987-06-11 | 1989-01-02 | Philips Nv | Halfgeleiderinrichting bevattende een condensator en een begraven passiveringslaag. |
US5851871A (en) * | 1987-12-23 | 1998-12-22 | Sgs-Thomson Microelectronics, S.R.L. | Process for manufacturing integrated capacitors in MOS technology |
IT1224656B (it) * | 1987-12-23 | 1990-10-18 | Sgs Thomson Microelectronics | Procedimento per la fabbricazione di condensatori integrati in tecnologia mos. |
IT1237894B (it) * | 1989-12-14 | 1993-06-18 | Sgs Thomson Microelectronics | Processo per la fabbricazione di circuiti integrati comprendenti componenti elettronici di due tipi diversi aventi ciascuno coppie di elettrodi ricavati dagli stessi strati di silicio policristallino e separati da dielettrici diversi |
CA2023172A1 (en) * | 1990-08-13 | 1992-02-14 | Francois L. Cordeau | Method to manufacture double-poly capacitors |
US5434098A (en) * | 1993-01-04 | 1995-07-18 | Vlsi Techology, Inc. | Double poly process with independently adjustable interpoly dielectric thickness |
US5393691A (en) * | 1993-07-28 | 1995-02-28 | Taiwan Semiconductor Manufacturing Company | Fabrication of w-polycide-to-poly capacitors with high linearity |
US5338701A (en) * | 1993-11-03 | 1994-08-16 | Taiwan Semiconductor Manufacturing Company | Method for fabrication of w-polycide-to-poly capacitors with high linearity |
KR0137902B1 (en) * | 1994-01-28 | 1998-04-27 | Lg Semicon Co Ltd | Mos transistor & manufacturing method thereof |
US5554558A (en) * | 1995-02-13 | 1996-09-10 | Taiwan Semiconductor Manufacturing Company | Method of making high precision w-polycide-to-poly capacitors in digital/analog process |
US5547892A (en) * | 1995-04-27 | 1996-08-20 | Taiwan Semiconductor Manufacturing Company | Process for forming stacked contacts and metal contacts on static random access memory having thin film transistors |
US5804488A (en) * | 1995-08-24 | 1998-09-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a tungsten silicide capacitor having a high breakdown voltage |
US6133077A (en) * | 1998-01-13 | 2000-10-17 | Lsi Logic Corporation | Formation of high-voltage and low-voltage devices on a semiconductor substrate |
US6093585A (en) * | 1998-05-08 | 2000-07-25 | Lsi Logic Corporation | High voltage tolerant thin film transistor |
US6420747B2 (en) | 1999-02-10 | 2002-07-16 | International Business Machines Corporation | MOSCAP design for improved reliability |
JP3887588B2 (ja) * | 2002-08-30 | 2007-02-28 | 株式会社リガク | X線回折による応力測定法 |
US8373215B2 (en) * | 2010-10-25 | 2013-02-12 | Texas Instruments Incorporated | Zero temperature coefficient capacitor |
CN103456616A (zh) * | 2013-09-02 | 2013-12-18 | 上海华力微电子有限公司 | 制备栅氧层的工艺 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4249194A (en) * | 1977-08-29 | 1981-02-03 | Texas Instruments Incorporated | Integrated circuit MOS capacitor using implanted region to change threshold |
DE2743662A1 (de) * | 1977-09-28 | 1979-04-05 | Siemens Ag | Ein-transistor-speicherelement und verfahren zu seiner herstellung |
US4240195A (en) * | 1978-09-15 | 1980-12-23 | Bell Telephone Laboratories, Incorporated | Dynamic random access memory |
US4212684A (en) * | 1978-11-20 | 1980-07-15 | Ncr Corporation | CISFET Processing including simultaneous doping of silicon components and FET channels |
DE3032632A1 (de) * | 1980-08-29 | 1982-04-08 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur herstellung integrierter dynamischer ram-eintransistor-speicherzellen |
US4373250A (en) * | 1980-11-17 | 1983-02-15 | Signetics Corporation | Process for fabricating a high capacity memory cell |
DE3133468A1 (de) * | 1981-08-25 | 1983-03-17 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen von hochintegrierten komplementaeren mos-feldeffekttransistorschaltungen in siliziumgate-technologie |
JPS59195859A (ja) * | 1983-04-21 | 1984-11-07 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
US4466177A (en) * | 1983-06-30 | 1984-08-21 | International Business Machines Corporation | Storage capacitor optimization for one device FET dynamic RAM cell |
-
1984
- 1984-11-28 US US06/676,033 patent/US4639274A/en not_active Expired - Lifetime
-
1985
- 1985-11-27 CA CA000496283A patent/CA1232361A/en not_active Expired
- 1985-11-27 DE DE8585402316T patent/DE3586040D1/de not_active Expired - Fee Related
- 1985-11-27 EP EP85402316A patent/EP0183623B1/de not_active Expired - Lifetime
- 1985-11-28 JP JP60268246A patent/JPH0691183B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CA1232361A (en) | 1988-02-02 |
JPS61131557A (ja) | 1986-06-19 |
EP0183623A2 (de) | 1986-06-04 |
US4639274A (en) | 1987-01-27 |
EP0183623A3 (en) | 1988-12-07 |
JPH0691183B2 (ja) | 1994-11-14 |
EP0183623B1 (de) | 1992-05-13 |
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BR6100804U (pt) | Morsa de precisao |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |