DE3583111D1 - METHOD FOR CUTTING SEMICONDUCTOR DISC. - Google Patents

METHOD FOR CUTTING SEMICONDUCTOR DISC.

Info

Publication number
DE3583111D1
DE3583111D1 DE8585114207T DE3583111T DE3583111D1 DE 3583111 D1 DE3583111 D1 DE 3583111D1 DE 8585114207 T DE8585114207 T DE 8585114207T DE 3583111 T DE3583111 T DE 3583111T DE 3583111 D1 DE3583111 D1 DE 3583111D1
Authority
DE
Germany
Prior art keywords
cutting semiconductor
semiconductor disc
disc
cutting
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585114207T
Other languages
German (de)
Inventor
Takashi C O Patent Divi Kimura
Toshihiro C O Patent Divi Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3583111D1 publication Critical patent/DE3583111D1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B28WORKING CEMENT, CLAY, OR STONE
    • B28DWORKING STONE OR STONE-LIKE MATERIALS
    • B28D1/00Working stone or stone-like materials, e.g. brick, concrete or glass, not provided for elsewhere; Machines, devices, tools therefor
    • B28D1/003Multipurpose machines; Equipment therefor
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B28WORKING CEMENT, CLAY, OR STONE
    • B28DWORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/0058Accessories specially adapted for use with machines for fine working of gems, jewels, crystals, e.g. of semiconductor material
    • B28D5/0082Accessories specially adapted for use with machines for fine working of gems, jewels, crystals, e.g. of semiconductor material for supporting, holding, feeding, conveying or discharging work
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043Making grooves, e.g. cutting
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    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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    • H01L2224/29001Core members of the layer connector
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    • H01L2924/1025Semiconducting materials
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    • H01L2924/1032III-V
    • H01L2924/10329Gallium arsenide [GaAs]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
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    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49789Obtaining plural product pieces from unitary workpiece
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/4981Utilizing transitory attached element or associated separate material

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Mechanical Engineering (AREA)
  • Mining & Mineral Resources (AREA)
  • Dicing (AREA)
DE8585114207T 1984-11-07 1985-11-07 METHOD FOR CUTTING SEMICONDUCTOR DISC. Expired - Lifetime DE3583111D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59233330A JPS61112345A (en) 1984-11-07 1984-11-07 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
DE3583111D1 true DE3583111D1 (en) 1991-07-11

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Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585114207T Expired - Lifetime DE3583111D1 (en) 1984-11-07 1985-11-07 METHOD FOR CUTTING SEMICONDUCTOR DISC.

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US (1) US4722130A (en)
EP (1) EP0182218B1 (en)
JP (1) JPS61112345A (en)
DE (1) DE3583111D1 (en)

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US5252079A (en) * 1992-02-10 1993-10-12 Amp Incorporated Method of manufacture of a contact guide
DE4317721C1 (en) * 1993-05-27 1994-07-21 Siemens Ag Process for separating chips from a wafer
US5733175A (en) * 1994-04-25 1998-03-31 Leach; Michael A. Polishing a workpiece using equal velocity at all points overlapping a polisher
DE4415132C2 (en) * 1994-04-29 1997-03-20 Siemens Ag Process for shaping thin wafers and solar cells from crystalline silicon
US5607341A (en) * 1994-08-08 1997-03-04 Leach; Michael A. Method and structure for polishing a wafer during manufacture of integrated circuits
DE19505906A1 (en) * 1995-02-21 1996-08-22 Siemens Ag Process for damaging the back of a semiconductor wafer with the front of the wafer protected
DE19613561C2 (en) * 1996-04-04 2002-04-11 Micronas Gmbh Method for separating electrically tested electronic elements connected to one another in a body
EP2270845A3 (en) 1996-10-29 2013-04-03 Invensas Corporation Integrated circuits and methods for their fabrication
US6882030B2 (en) * 1996-10-29 2005-04-19 Tru-Si Technologies, Inc. Integrated circuit structures with a conductor formed in a through hole in a semiconductor substrate and protruding from a surface of the substrate
US6498074B2 (en) 1996-10-29 2002-12-24 Tru-Si Technologies, Inc. Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners
CN1212820A (en) * 1997-01-29 1999-03-31 摩托罗拉公司 Method and combined circuit board for preventing delamination and sagging in course of manufacturing complex circuit board
US5994205A (en) * 1997-02-03 1999-11-30 Kabushiki Kaisha Toshiba Method of separating semiconductor devices
US6294439B1 (en) 1997-07-23 2001-09-25 Kabushiki Kaisha Toshiba Method of dividing a wafer and method of manufacturing a semiconductor device
JPH1140520A (en) * 1997-07-23 1999-02-12 Toshiba Corp Method of dividing wafer and manufacture of semiconductor device
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US4722130A (en) 1988-02-02
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EP0182218B1 (en) 1991-06-05
EP0182218A2 (en) 1986-05-28

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