DE3266010D1 - Improved search array of a programmable logic array - Google Patents
Improved search array of a programmable logic arrayInfo
- Publication number
- DE3266010D1 DE3266010D1 DE8282104506T DE3266010T DE3266010D1 DE 3266010 D1 DE3266010 D1 DE 3266010D1 DE 8282104506 T DE8282104506 T DE 8282104506T DE 3266010 T DE3266010 T DE 3266010T DE 3266010 D1 DE3266010 D1 DE 3266010D1
- Authority
- DE
- Germany
- Prior art keywords
- array
- programmable logic
- improved search
- logic array
- improved
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
- H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/280,418 US4467439A (en) | 1981-06-30 | 1981-06-30 | OR Product term function in the search array of a PLA |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3266010D1 true DE3266010D1 (en) | 1985-10-10 |
Family
ID=23072995
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8282104506T Expired DE3266010D1 (en) | 1981-06-30 | 1982-05-24 | Improved search array of a programmable logic array |
Country Status (4)
Country | Link |
---|---|
US (1) | US4467439A (de) |
EP (1) | EP0069225B1 (de) |
JP (1) | JPS587931A (de) |
DE (1) | DE3266010D1 (de) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3215671C2 (de) * | 1982-04-27 | 1984-05-03 | Siemens AG, 1000 Berlin und 8000 München | Programmierbare Logikanordnung |
US4599721A (en) * | 1984-04-02 | 1986-07-08 | Tektronix, Inc. | Programmable cross bar multiplexer |
JPS61234047A (ja) * | 1985-04-10 | 1986-10-18 | Matsushita Electronics Corp | 集積回路素子 |
US4764691A (en) * | 1985-10-15 | 1988-08-16 | American Microsystems, Inc. | CMOS programmable logic array using NOR gates for clocking |
US4700187A (en) * | 1985-12-02 | 1987-10-13 | Concurrent Logic, Inc. | Programmable, asynchronous logic cell and array |
DE3611557A1 (de) * | 1986-04-07 | 1987-10-29 | Nixdorf Computer Ag | In integrierter technik hergestellter logik-array-baustein zur erstellung integrierter schaltungen |
LU86790A1 (de) * | 1986-09-17 | 1987-07-24 | Siemens Ag | Breitbandsignal-koppeleinrichtung |
JPS63108746A (ja) * | 1986-10-27 | 1988-05-13 | Nec Corp | プログラマブルロジツクアレイ |
US4918440A (en) * | 1986-11-07 | 1990-04-17 | Furtek Frederick C | Programmable logic cell and array |
US5019736A (en) * | 1986-11-07 | 1991-05-28 | Concurrent Logic, Inc. | Programmable logic cell and array |
US5155389A (en) * | 1986-11-07 | 1992-10-13 | Concurrent Logic, Inc. | Programmable logic cell and array |
US5089973A (en) * | 1986-11-07 | 1992-02-18 | Apple Computer Inc. | Programmable logic cell and array |
DE3718915A1 (de) * | 1987-06-05 | 1988-12-15 | Siemens Ag | Programmierbare schaltungsanordnung |
DE3718916A1 (de) * | 1987-06-05 | 1988-12-15 | Siemens Ag | Verbindungsnetzwerk zur einstellbaren verbindung von schaltungsanordnungen, insbesondere programmierbaren schaltungsanordnungen |
JPH01109922A (ja) * | 1987-10-23 | 1989-04-26 | Mitsubishi Electric Corp | プログラマブルロジツクアレイ |
EP0389663B1 (de) * | 1989-03-31 | 1993-11-10 | Siemens Aktiengesellschaft | Breitbandsignal-Koppeleinrichtung |
US4950928A (en) * | 1989-09-14 | 1990-08-21 | Advanced Micro Devices, Inc. | Dynamic PLA circuit with no "virtual grounds" |
US5144166A (en) * | 1990-11-02 | 1992-09-01 | Concurrent Logic, Inc. | Programmable logic cell and array |
US5646556A (en) * | 1995-11-27 | 1997-07-08 | Advanced Micro Devices, Inc. | Apparatus and method for precharging bus conductors to minimize both drive delay and crosstalk within the bus |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3702985A (en) * | 1969-04-30 | 1972-11-14 | Texas Instruments Inc | Mos transistor integrated matrix |
JPS508850U (de) * | 1973-05-21 | 1975-01-29 | ||
DE2455178C2 (de) * | 1974-11-21 | 1982-12-23 | Siemens AG, 1000 Berlin und 8000 München | Integrierte, programmierbare Logikanordnung |
US3987287A (en) * | 1974-12-30 | 1976-10-19 | International Business Machines Corporation | High density logic array |
US3936812A (en) * | 1974-12-30 | 1976-02-03 | Ibm Corporation | Segmented parallel rail paths for input/output signals |
US4084152A (en) * | 1976-06-30 | 1978-04-11 | International Business Machines Corporation | Time shared programmable logic array |
US4140967A (en) * | 1977-06-24 | 1979-02-20 | International Business Machines Corporation | Merged array PLA device, circuit, fabrication method and testing technique |
US4123669A (en) * | 1977-09-08 | 1978-10-31 | International Business Machines Corporation | Logical OR circuit for programmed logic arrays |
US4233667A (en) * | 1978-10-23 | 1980-11-11 | International Business Machines Corporation | Demand powered programmable logic array |
-
1981
- 1981-06-30 US US06/280,418 patent/US4467439A/en not_active Expired - Lifetime
-
1982
- 1982-04-16 JP JP57062656A patent/JPS587931A/ja active Granted
- 1982-05-24 DE DE8282104506T patent/DE3266010D1/de not_active Expired
- 1982-05-24 EP EP82104506A patent/EP0069225B1/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
EP0069225A3 (en) | 1983-05-11 |
EP0069225B1 (de) | 1985-09-04 |
US4467439A (en) | 1984-08-21 |
JPH0213863B2 (de) | 1990-04-05 |
JPS587931A (ja) | 1983-01-17 |
EP0069225A2 (de) | 1983-01-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |