DE3177135D1 - Modulares datenverarbeitungssystem. - Google Patents
Modulares datenverarbeitungssystem.Info
- Publication number
- DE3177135D1 DE3177135D1 DE8181302300T DE3177135T DE3177135D1 DE 3177135 D1 DE3177135 D1 DE 3177135D1 DE 8181302300 T DE8181302300 T DE 8181302300T DE 3177135 T DE3177135 T DE 3177135T DE 3177135 D1 DE3177135 D1 DE 3177135D1
- Authority
- DE
- Germany
- Prior art keywords
- data processing
- processing system
- modular data
- modular
- processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0615—Address space extension
- G06F12/063—Address space extension for I/O modules, e.g. memory mapped I/O
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Microcomputers (AREA)
- Semiconductor Memories (AREA)
- Calculators And Similar Devices (AREA)
Applications Claiming Priority (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15472880A | 1980-05-29 | 1980-05-29 | |
US15455480A | 1980-05-29 | 1980-05-29 | |
US06/154,342 US4430584A (en) | 1980-05-29 | 1980-05-29 | Modular input/output system |
US06/154,339 US4418397A (en) | 1980-05-29 | 1980-05-29 | Address decode system |
US06/154,335 US4447881A (en) | 1980-05-29 | 1980-05-29 | Data processing system integrated circuit having modular memory add-on capacity |
US06/154,560 US4454591A (en) | 1980-05-29 | 1980-05-29 | Interface system for bus line control |
US15471080A | 1980-05-30 | 1980-05-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3177135D1 true DE3177135D1 (de) | 1990-01-25 |
Family
ID=27569028
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8181302300T Expired - Lifetime DE3177135D1 (de) | 1980-05-29 | 1981-05-26 | Modulares datenverarbeitungssystem. |
DE19813177305 Expired - Lifetime DE3177305T2 (de) | 1980-05-29 | 1981-05-26 | Modulares E/A-System. |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19813177305 Expired - Lifetime DE3177305T2 (de) | 1980-05-29 | 1981-05-26 | Modulares E/A-System. |
Country Status (3)
Country | Link |
---|---|
EP (2) | EP0041351B1 (de) |
JP (1) | JPH0666413B2 (de) |
DE (2) | DE3177135D1 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0750432B2 (ja) * | 1985-04-12 | 1995-05-31 | 沖電気工業株式会社 | デ−タバスプリチャ−ジ回路 |
US4641247A (en) * | 1985-08-30 | 1987-02-03 | Advanced Micro Devices, Inc. | Bit-sliced, dual-bus design of integrated circuits |
US5539614A (en) * | 1993-09-29 | 1996-07-23 | Mitsubishi Denki Kabushiki Kaisha | Control unit, plug-in unit, transformer, zero-phase current transformer, and frequency measuring circuit applied to control center |
US6594818B2 (en) * | 2001-03-21 | 2003-07-15 | Samsung Electronics Co., Ltd. | Memory architecture permitting selection of storage density after fabrication of active circuitry |
US10102327B2 (en) * | 2014-12-31 | 2018-10-16 | Stmicroelectronics, Inc. | Integrated circuit layout wiring for multi-core chips |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1305029A (de) * | 1969-11-13 | 1973-01-31 | ||
DE2643482A1 (de) * | 1976-09-27 | 1978-03-30 | Siemens Ag | Halbleiterplaettchen zur herstellung hochintegrierter bausteine |
-
1981
- 1981-05-26 EP EP81302300A patent/EP0041351B1/de not_active Expired
- 1981-05-26 DE DE8181302300T patent/DE3177135D1/de not_active Expired - Lifetime
- 1981-05-26 DE DE19813177305 patent/DE3177305T2/de not_active Expired - Lifetime
- 1981-05-26 EP EP19890110008 patent/EP0340804B1/de not_active Expired - Lifetime
- 1981-05-28 JP JP56080201A patent/JPH0666413B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE3177305D1 (de) | 1994-01-27 |
DE3177305T2 (de) | 1994-06-16 |
JPH0666413B2 (ja) | 1994-08-24 |
EP0041351B1 (de) | 1989-12-20 |
JPS5712545A (en) | 1982-01-22 |
EP0340804B1 (de) | 1993-12-15 |
EP0041351A2 (de) | 1981-12-09 |
EP0340804A2 (de) | 1989-11-08 |
EP0041351A3 (en) | 1986-01-15 |
EP0340804A3 (en) | 1989-12-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |