DE29823619U1 - Power semiconductor circuit arrangement with vibration-damped parallel connection - Google Patents

Power semiconductor circuit arrangement with vibration-damped parallel connection

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Publication number
DE29823619U1
DE29823619U1 DE29823619U DE29823619U DE29823619U1 DE 29823619 U1 DE29823619 U1 DE 29823619U1 DE 29823619 U DE29823619 U DE 29823619U DE 29823619 U DE29823619 U DE 29823619U DE 29823619 U1 DE29823619 U1 DE 29823619U1
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Germany
Prior art keywords
emitter
dcb
chips
circuit arrangement
adjacent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE29823619U
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German (de)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semikron Elektronik GmbH and Co KG
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Semikron GmbH and Co KG
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Publication date
Application filed by Semikron GmbH and Co KG filed Critical Semikron GmbH and Co KG
Publication of DE29823619U1 publication Critical patent/DE29823619U1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Power Conversion In General (AREA)

Description

Der Beschreibungstext wurde nicht elektronisch erfaßt The description text was not recorded electronically  

Der Beschreibungstext wurde nicht elektronisch erfaßt The description text was not recorded electronically  

Der Beschreibungstext wurde nicht elektronisch erfaßt The description text was not recorded electronically  

Der Beschreibungstext wurde nicht elektronisch erfaßt The description text was not recorded electronically  

Der Beschreibungstext wurde nicht elektronisch erfaßt The description text was not recorded electronically  

Der Beschreibungstext wurde nicht elektronisch erfaßt The description text was not recorded electronically  

Der Beschreibungstext wurde nicht elektronisch erfaßtThe description text was not recorded electronically

Claims (5)

1. Leistungshalbleiterschaltungsanordnung mit Halbleiterbauelementen in Form von IGBT- Leistungsschaltern mit Parallelschaltung auf Isolierkeramiken schwingungsfrei aufgebaut, dadurch gekennzeichnet, daß die Schwingungsfreiheit der Aufbauten aller parallel geschalteten Chips der IGBT- Leistungsschalter durch eine minimiert kurze ohmsche Verbindung zwischen jeweils zwei benachbarten Emitterkontaktfenstern der benachbarten Chips oder durch Vergrößerung der parasitären Induktivitäten in Form verlängerter Bonddrähte oder Verlängerung der Stromwege für die Kollektor- oder Emitterströme auf den Kupferflächen der Aufbauseite der DCB-Isolierkeramik oder durch Kombination von zwei oder mehrerer der genannten Varianten hergestellt wird. 1. Power semiconductor circuit arrangement with semiconductor components in the form of IGBT circuit breakers with parallel connection on insulating ceramics constructed vibration-free, characterized in that the freedom from vibrations of the structures of all parallel-connected chips of the IGBT circuit breakers by a minimized short ohmic connection between two adjacent emitter contact windows of the adjacent chips or by Enlargement of the parasitic inductances in the form of extended bond wires or extension of the current paths for the collector or emitter currents on the copper surfaces of the assembly side of the DCB insulating ceramic or by combining two or more of the variants mentioned. 2. Schaltungsanordnung nach Anspruch 1, dadurch gekennzeichnet, daß die minimiert kurze ohmsche Verbindung zwischen jeweils zwei benachbarten zu zwei Chips gehörenden Emitterkontaktfenstern der auf eine DCB-Keramik mindestens zwei für eine Parallelschaltung gelöteten und gebondeten Chips besteht, der kürzer als die halbe Chip- Kantenlänge plus 2 mm ist.2. Circuit arrangement according to claim 1, characterized in that minimizes the short ohmic connection between two adjacent to two chips emitter contact windows belonging to a DCB ceramic at least two for one Parallel connection of soldered and bonded chips, which is shorter than half the chip Edge length plus 2 mm. 3. Schaltungsanordnung nach Anspruch 1, dadurch gekennzeichnet, daß die ohmsche Verbindung zwischen den Emitterkontaktfenstern der auf DCB-Keramiken für eine Parallelschaltung gelöteten mindestens zwei Chips und den Emitterkontaktflächen der DCB-Keramik hergestellt wurde und aus Bonddraht mit einer Mindestlänge von einer halben Chip- Kantenlänge plus 6 mm zwischen Emitterkontaktfläche jedes Chips und der damit verbundenen Emitterbondfläche der DCB-Keramik besteht.3. Circuit arrangement according to claim 1, characterized in that the ohmic connection between the emitter contact windows of the on DCB ceramics for a parallel connection soldered at least two chips and the emitter contact areas of the DCB ceramic was made from bond wire with a minimum length of one half the chip edge length plus 6 mm between the emitter contact area of each chip and the associated emitter bond surface of the DCB ceramic. 4. Schaltungsanordnung nach Anspruch 1, dadurch gekennzeichnet, daß die Verlängerung der Stromwege der Kollektorströme in den für die Kollektoranschlüsse vorgesehenen Kupferflächen der DCB-Isolierkeramiken durch isolierende Stege zwischen den benachbart getöteten Chips mit einer Steglänge, die mindestens länger als die halbe Chipkante ist, vorgenommen wird.4. Circuit arrangement according to claim 1, characterized in that the extension of the current paths of the collector currents in the for the collector connections provided copper surfaces of the DCB insulating ceramics by insulating webs between the adjacent killed chips with a bridge length that is at least longer than half Chip edge is made. 5. Schaltungsanordnung nach Anspruch 1, dadurch gekennzeichnet, daß die Verlängerung der Stromwege der Emitterströme in der für die Emitteranschlüsse vorgesehenen Kupferfläche der DCB-Isolierkeramik durch isolierende Stege zwischen den emitterseitigen Verbindungsstellen auf der Kupferfläche von jeweils zwei benachbart gebondeten Chips mit einer Steglänge, die länger als die Chipkante der gebondeten IGBT- Leistungshalbleiterbauelemente ist, vorgenommen wird.5. Circuit arrangement according to claim 1, characterized in that the extension of the current paths of the emitter currents in the for the emitter connections provided copper surface of the DCB insulating ceramic by insulating webs between the emitter-side connection points on the copper surface of two adjacent bonded chips with a land length that is longer than the chip edge of the bonded IGBT Power semiconductor devices is made.
DE29823619U 1998-08-21 1998-08-21 Power semiconductor circuit arrangement with vibration-damped parallel connection Expired - Lifetime DE29823619U1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19837993 1998-08-21

Publications (1)

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DE29823619U1 true DE29823619U1 (en) 1999-09-30

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DE19938302A Expired - Lifetime DE19938302C2 (en) 1998-08-21 1999-08-12 Power semiconductor circuit arrangement-g with vibration-damped parallel connection

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10006505A1 (en) * 2000-02-15 2001-08-23 Infineon Technologies Ag Power semiconductor module using parallel IGBT-chips - has at least one slit formed in common emitter, base or collector conductor paths for providing stray inductance suppressing plateau oscillations
DE10043921A1 (en) * 2000-09-06 2002-03-21 Infineon Technologies Ag Circuit arrangement has output compensation connection provided between output load connections of electronic circuits to keep output load connections independent while maintaining same potential
DE10158374C1 (en) * 2001-11-28 2003-04-17 Semikron Elektronik Gmbh HF oscillation prevention circuit for power semiconductor module uses inductors and capacitors for de-tuning oscillator provided by parallel semiconductors
DE10204157A1 (en) * 2002-02-01 2003-08-28 Semikron Elektronik Gmbh Wire bonding connection arrangement for power semiconducting components has variable separation of individual bonding wires and of individual groups in connections with a number of sub-groups
EP2091081A1 (en) * 2008-02-13 2009-08-19 SEMIKRON Elektronik GmbH & Co. KG Switching assembly with bond connection
EP2341532A1 (en) * 2009-12-30 2011-07-06 Kabushiki Kaisha Toshiba Power semiconductor module and semiconductor power converter provided with the same
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DE10043921A1 (en) * 2000-09-06 2002-03-21 Infineon Technologies Ag Circuit arrangement has output compensation connection provided between output load connections of electronic circuits to keep output load connections independent while maintaining same potential
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EP2091081A1 (en) * 2008-02-13 2009-08-19 SEMIKRON Elektronik GmbH & Co. KG Switching assembly with bond connection
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US8493762B2 (en) 2009-12-28 2013-07-23 Kabushiki Kaisha Toshiba Power semiconductor module and semiconductor power converter provided with the same
EP2341532A1 (en) * 2009-12-30 2011-07-06 Kabushiki Kaisha Toshiba Power semiconductor module and semiconductor power converter provided with the same
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