DE2558744A1 - METHOD OF MAKING A MULTI-LAYER PRINTED CIRCUIT - Google Patents

METHOD OF MAKING A MULTI-LAYER PRINTED CIRCUIT

Info

Publication number
DE2558744A1
DE2558744A1 DE19752558744 DE2558744A DE2558744A1 DE 2558744 A1 DE2558744 A1 DE 2558744A1 DE 19752558744 DE19752558744 DE 19752558744 DE 2558744 A DE2558744 A DE 2558744A DE 2558744 A1 DE2558744 A1 DE 2558744A1
Authority
DE
Germany
Prior art keywords
making
printed circuit
layer printed
layer
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19752558744
Other languages
German (de)
Inventor
Spaeter Genannt Werden Wird
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MACHIDA HIDEO SAITAMA (JAPAN)
Original Assignee
MACHIDA HIDEO SAITAMA (JAPAN)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MACHIDA HIDEO SAITAMA (JAPAN) filed Critical MACHIDA HIDEO SAITAMA (JAPAN)
Publication of DE2558744A1 publication Critical patent/DE2558744A1/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)
DE19752558744 1974-12-28 1975-12-24 METHOD OF MAKING A MULTI-LAYER PRINTED CIRCUIT Pending DE2558744A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP406775A JPS5210568A (en) 1974-12-28 1974-12-28 Method of manufacturing multilayered printed wiring substrate

Publications (1)

Publication Number Publication Date
DE2558744A1 true DE2558744A1 (en) 1976-07-01

Family

ID=11574472

Family Applications (2)

Application Number Title Priority Date Filing Date
DE19752558367 Pending DE2558367A1 (en) 1974-12-28 1975-12-23 METHOD OF MAKING A MULTI-LAYER PRINTED CIRCUIT
DE19752558744 Pending DE2558744A1 (en) 1974-12-28 1975-12-24 METHOD OF MAKING A MULTI-LAYER PRINTED CIRCUIT

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE19752558367 Pending DE2558367A1 (en) 1974-12-28 1975-12-23 METHOD OF MAKING A MULTI-LAYER PRINTED CIRCUIT

Country Status (4)

Country Link
JP (1) JPS5210568A (en)
DE (2) DE2558367A1 (en)
FR (1) FR2296347A1 (en)
NL (1) NL7515090A (en)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3006117C2 (en) * 1980-02-19 1981-11-26 Ruwel-Werke Spezialfabrik für Leiterplatten GmbH, 4170 Geldern Process for the production of printed circuit boards with at least two conductor additions
US4416914A (en) * 1980-12-29 1983-11-22 General Electric Company Electrical conductors arranged in multiple layers and preparation thereof
EP0062084A1 (en) * 1981-04-06 1982-10-13 Herbert Irwin Schachter Multi-level circuit and method of making same
DE3137279C2 (en) * 1981-09-18 1986-12-11 Wilhelm Ruf KG, 8000 München Process for the production of multilayer printed circuit boards as well as multilayer printed circuit board produced by the process
DE3407799A1 (en) * 1984-03-02 1985-09-05 Brown, Boveri & Cie Ag, 6800 Mannheim Method for producing a multilayer hybrid circuit
US4566186A (en) * 1984-06-29 1986-01-28 Tektronix, Inc. Multilayer interconnect circuitry using photoimageable dielectric
JPS6276600A (en) * 1985-09-29 1987-04-08 株式会社　アサヒ化学研究所 Forming method for conductive circuit on substrate
US4735676A (en) * 1986-01-14 1988-04-05 Asahi Chemical Research Laboratory Co., Ltd. Method for forming electric circuits on a base board
US4724040A (en) * 1986-01-14 1988-02-09 Asahi Chemical Research Laboratory Co., Ltd. Method for producing electric circuits on a base boad
CA1261481A (en) * 1986-03-13 1989-09-26 Kazumasa Eguchi Printed circuit board capable of preventing electromagnetic interference
AU8107987A (en) * 1986-09-30 1988-04-21 Wilde Membran Impulstechnik G.m.b.H. Electrically conductive structure with applied metallization
DE3733002A1 (en) * 1986-09-30 1988-04-07 Wilde Membran Impuls Tech Electroconductive pattern metallised additively
US4837050A (en) * 1986-09-30 1989-06-06 Asahi Chemical Research Laboratory Co., Ltd. Method for producing electrically conductive circuits on a base board
DE3704498A1 (en) * 1987-02-13 1988-08-25 Aristo Graphic Systeme METHOD FOR PRODUCING A DIGITALIZED TABLET
DE3704497A1 (en) * 1987-02-13 1988-08-25 Aristo Graphic Systeme METHOD FOR PRODUCING A DIGITALIZED TABLET
JPH0724335B2 (en) * 1987-04-30 1995-03-15 三井金属鉱業株式会社 Manufacturing method of multilayer circuit board
DE3741918A1 (en) * 1987-12-10 1989-06-22 Heino Pachschwoell Method for producing an electronic circuit device
KR900005308B1 (en) * 1987-12-31 1990-07-27 정풍물산 주식회사 Printed circuit board method
JPH0682926B2 (en) * 1988-04-22 1994-10-19 日本電気株式会社 Method for manufacturing multilayer wiring board
EP0375954B1 (en) * 1988-11-29 1994-03-16 Nippon Cmk Corporation Limited Method of manufacturing printed circuit board
CN107484358B (en) * 2017-07-26 2019-06-21 江门崇达电路技术有限公司 It is a kind of without pressing the manufacturing method of multi-layer circuit board without drilling

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5517518B2 (en) * 1972-01-28 1980-05-12

Also Published As

Publication number Publication date
DE2558367A1 (en) 1976-07-08
FR2296347A1 (en) 1976-07-23
JPS5210568A (en) 1977-01-26
NL7515090A (en) 1976-06-30

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