DE2521900A1 - ELECTRONIC CALCULATOR - Google Patents

ELECTRONIC CALCULATOR

Info

Publication number
DE2521900A1
DE2521900A1 DE19752521900 DE2521900A DE2521900A1 DE 2521900 A1 DE2521900 A1 DE 2521900A1 DE 19752521900 DE19752521900 DE 19752521900 DE 2521900 A DE2521900 A DE 2521900A DE 2521900 A1 DE2521900 A1 DE 2521900A1
Authority
DE
Germany
Prior art keywords
memory
data
computer according
electronic computer
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19752521900
Other languages
German (de)
Inventor
Anthony William Sweet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Publication of DE2521900A1 publication Critical patent/DE2521900A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30029—Logical and Boolean instructions, e.g. XOR, NOT
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4482—Procedural
    • G06F9/4484—Executing subprograms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/10—Plc systems
    • G05B2219/11—Plc I-O input output
    • G05B2219/1127—Selector for I-O, multiplex for I-O
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/10—Plc systems
    • G05B2219/12—Plc mp multi processor system
    • G05B2219/1204—Multiprocessing, several plc's, distributed logic control
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/10—Plc systems
    • G05B2219/15—Plc structure of the system
    • G05B2219/15049—Timer, counter, clock-calendar, flip-flop as peripheral
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/10—Plc systems
    • G05B2219/15—Plc structure of the system
    • G05B2219/15055—FIFO

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Executing Machine-Instructions (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Storage Device Security (AREA)
  • Debugging And Monitoring (AREA)
  • Complex Calculations (AREA)

Description

5G9849/G88S5G9849 / G88S

BezugszeichenlisteList of reference symbols

ISIS input staticiserinput staticiser OSOS output staticiseroutput staticiser 31,3231.32 busbus RAMR.A.M. randoh access memoryrandoh access memory DECDEC decoderdecoder ALUALU arithmetic logic unitarithmetic logic unit ASOASO operation stackoperation stack Α,Β,Ο,ΰΑ, Β, Ο, ΰ stagesstages DELDEL delay elementsdelay elements RASRAS address selectoraddress selector LFCLFC clockclock K1,N2K1, N2 HAND-unitsHAND units FDFD control circuitrycontrol circuitry ROMROME read-only memoryread-only memory BP1, BP2BP1, BP2 Boolean processorsBoolean processors PCPc .program counter.program counter G1G1 AKD-gateAKD gate OSCOSC oscillatoroscillator

Einfangswandler Ausgangswandler Ds t enve ro inc1 ung s le i tu ng or - icherCapture transducer Output transducer Ds t enve ro inc 1 ung s le i tu ng or - icher

Decoderdecoder

Logikeinheit Arbeitsspeicher StufenLogic unit working memory stages

Verzögerungsschaltungen Adressenausv/ahlschaltung TaktgeberDelay circuits Address selection clock generator

NAND-Schaitungen Steuerschaltungen Lasespeicher Boole'sehe Rechner Programmzähler UND-Schaltung OszillatorNAND circuits Control circuits L a ses memory Boolean calculator Program counter AND circuit Oscillator

509B49/0885509B49 / 0885

Claims (9)

A.W.Sweet - 3A.W.Sweet - 3 • Patentansprüche • Claims r~ 1., Elektronischer Rechner, mit Einggängen zur Dateneingabe und mit Eingangswandlern zur Speicherung der Eingangsdaten, mit Ausgangswandlern zur Speicherung der"Rechenergebnisse und mit Ausgängen zur Abgabe der Rechenergebnisse ,g_ejcenn^e_ic2in^t_durch folgende Bestandteile: r ~ 1., electronic calculator, with inputs for data entry and with input transducers for storing the input data, with output transducers for storing the calculation results and with outputs for outputting the calculation results, g_ejcenn ^ e_ic2in ^ t_ through the following components: - einen Speicher (RAM) zur Speicherung von Zwischenergebnissen und/oder zur Speicherung von Informationen für die Durchführung der Rechnung- A memory (RAM) for storing intermediate results and / or for storing information for the execution of the invoice - einen Befehlseingang (IP) zur Eingabe von Befehlsworten mit ,einem Adressenteil und einem Punktionsteil- A command input (IP) for entering command words with, an address part and a puncture part -ersten Adressenauswahlschaltungen, gesteuert vom Adressenteil des Befehlswortes zur Auswahl von zu verarbeitenden Daten., .-first address selection circuits, controlled by the address part of the command word for selecting to be processed Data., . - eine Logikschaltung, gesteuert vom Funktionsteil des Befehlswortes, um die Daten zu verarbeiten, die sie erhält - a logic circuit controlled by the functional part of the Command word to process the data it receives - zweite Adressenauswahlschaltungen, ebenfalls gesteuert vom Adressenteil des Befehlswortes, zur Übermittlung von Rechenergebnissen entweder an den Speicher (RAM) oder an einen Ausgangswandler (OS)- Second address selection circuits, also controlled by the address part of the command word, for the transmission of Calculation results either to the memory (RAM) or to an output converter (OS) wobei jeder VerarbeitungsVorgang nur mit jeweils einem Bit durchgeführt wird und wobei jedes Rechenergebnis aus einem Bit besteht.each processing operation with only one Bit is carried out and each calculation result consists of one bit. 2. Elektronischer Rechner nach Anspruch I9 dadurch gekennzeichnet, daß die Logikschaltung einen mehrstufigen Ar. beitsspeicher (ASO) enthält, dessen Stufen ein umkehrbares Schieberegister bilden, ferner UND-Schaltungen, um an zwei2. Electronic computer according to claim I 9, characterized in that the logic circuit has a multi-stage Ar. Contains secondary memory (ASO), the stages of which form a reversible shift register, and AND circuits to connect to two 509849/0885509849/0885 A.W.Sweet 3A.W.Sweet 3 Daten in zwei Stufen des Arbeitsspeichers (ASO) eine UND-Verknüpfung durchzuführen und das Ergebnis in einer der Stufen abzuspeichern, ferner ODER-Schaltungen, um an zwei Daten in zwei Stufen des Arbeitsspeichers (ASO) eine ODER-Verknüpfung durchzuführen, und das Ergebnis in einer der Stufen abzuspeichern, wobei die Verknüpfungsart (UND5ODER oder andere) durch den Funktionsteil eines Befehlswortes festgelegt ist.To perform an AND operation on data in two stages of the main memory (ASO) and to store the result in one of the stages, further OR circuits to carry out an OR operation on two data in two stages of the main memory (ASO), and the result in to save one of the levels, whereby the type of logic operation (AND 5 OR or other) is determined by the functional part of a command word. 3. Elektronischer Rechner nach Anspruch 2, dadurch gekennzeichnet, daß nach Durchführung einer logischen Verknüpfung · und Festlegung eines Ausgangswandlers (OS) oder eines Platzes im Speicher (RAM) das Ergebnis der Verknüpfung zur festgelegten Stelle übertragung wird und gleichzeitig in seiner Stufe des Arbeitsspeichers (ASO) stehen bleibt, und daß ein Adressenteil mit Null-Bit-Werten bewirkt, daß das Ergebnis einer Verknüpfung lediglich in seiner Stufe erhalten bleibt und keine Übermittlung stattfindet.3. Electronic computer according to claim 2, characterized in that after a logical link has been carried out and an output transducer (OS) or a location in the memory (RAM) has been determined, the result of the link to the specified location is transmitted and at the same time in its main memory level ( ASO) remains, and an address part with zero-bit values has the effect that the result of a link is only retained in its level and that no transmission takes place. 4. Elektronischer Rechner nach Anspruch 1, dadurch gekennzeichnet, daß in der Logikschaltung zwei NAND-Schaltungen (Nl9 N2) enthalten sind, von denen eine oder beide gemäß dem Funktionsteil eines Befehlswortes die Rechnung durchführen.4. Electronic computer according to claim 1, characterized in that two NAND circuits (Nl 9 N2) are contained in the logic circuit, one or both of which perform the calculation according to the functional part of a command word. 5. Elektronischer Rechner nach Anspruch 4, dadurch gekennzeichnet, daß die erste NAND-Schaltung (Nl) vom Speicher (RAM) oder von einem Eingangswandler (IS) Daten erhält, daß beide NAND-Schaltungen (Nl, N2) Daten an den Speicher (RAM) oder an einen Ausgangswandler (OS) abgeben können und daß jede der NAND-Schaltungen ausgangsseitig über eine Steuereinheit (FD) mit der anderen verbindbar ist,wobei die Steuereinheit (FD) durch den Funktionsteil eines Befehlswortes gesteuert wird.5. Electronic computer according to claim 4, characterized in that the first NAND circuit (Nl) from the memory (RAM) or from an input transducer (IS) receives data that both NAND circuits (Nl, N2) data to the memory ( RAM) or to an output converter (OS) and that each of the NAND circuits can be connected to the other on the output side via a control unit (FD), the control unit (FD) being controlled by the functional part of a command word. 509849/0885 -/-509849/0885 - / - A.W.Sweet 3A.W.Sweet 3 6. Elektronischer Rechner nach Anspruch 53 dadurch gekennzeichnet, daß jede der NAND-Schaltungen aus einer UND-Schaltung und einer Kippstufe besteht, wobei der Ausgang der UND-Schaltung mit der Seite der Kippstufe verbunden ist.6. Electronic computer according to claim 5 3, characterized in that each of the NAND circuits consists of an AND circuit and a flip-flop, wherein the output of the AND circuit is connected to the side of the flip-flop. 7. Elektronischer Rechner nach den Ansprüchen 1-6, dadurch gekennzeichnet ? daß Datenverbindungsleitungen (Bl,B2) vorgesehen sind, die die Eingangswandler, die Ausgangswandler, den Speicher und die Logikschaltung miteinander verbinden.7. Electronic computer according to claims 1-6, characterized ? that data connection lines (B1, B2) are provided which connect the input transducer, the output transducer, the memory and the logic circuit to one another. 8. Elektronischer Rechner nach einem der Ansprüche 1-7 a dadurch gekennzeichnet, daß Verzögerungselemente (DEL) vorgesehen sind, um ein bestimmtes zu verarbeitendes Bit eine festgesetzte Zeitspanne zu verzögern, sowie Takteinrichtungen, um verschiedene Takte mit verschiedenen Frequenzen zu erzeugen*8. Electronic computer according to one of claims 1-7 a, characterized in that delay elements (DEL) are provided in order to delay a certain bit to be processed for a fixed period of time, as well as clock devices to generate different clocks with different frequencies * 9. Elektronischer Rechner nach einem der Ansprüche 1-8,. dadurch gekennzeichnet, daß er mit integrierten Schaltkreisen als Chip ausgeführt ist.9. Electronic computer according to one of claims 1-8 ,. characterized in that it is implemented as a chip with integrated circuits.
DE19752521900 1974-05-23 1975-05-16 ELECTRONIC CALCULATOR Withdrawn DE2521900A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2306774A GB1448041A (en) 1974-05-23 1974-05-23 Data processing equipment

Publications (1)

Publication Number Publication Date
DE2521900A1 true DE2521900A1 (en) 1975-12-04

Family

ID=10189588

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19752521900 Withdrawn DE2521900A1 (en) 1974-05-23 1975-05-16 ELECTRONIC CALCULATOR

Country Status (11)

Country Link
JP (1) JPS5124844A (en)
AU (1) AU8105175A (en)
BE (1) BE829386A (en)
DE (1) DE2521900A1 (en)
ES (1) ES437893A1 (en)
FR (1) FR2272441B1 (en)
GB (1) GB1448041A (en)
IE (1) IE41472B1 (en)
IN (1) IN141971B (en)
NL (1) NL7506005A (en)
ZA (1) ZA752215B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2423820A1 (en) * 1978-03-20 1979-11-16 Bendix Corp AUTONOMOUS INPUT / OUTPUT PROCESSOR FOR DIGITAL SYSTEMS
DE19837101C2 (en) * 1998-08-17 2000-11-23 Philips Corp Intellectual Pty Programmable 1-bit data processing arrangement
DE10163206B4 (en) * 2001-12-21 2004-03-11 Schneider Automation Gmbh Method for operating a programmable logic controller

Also Published As

Publication number Publication date
IE41472B1 (en) 1980-01-16
AU8105175A (en) 1976-11-18
ZA752215B (en) 1976-03-31
FR2272441B1 (en) 1980-08-01
JPS5124844A (en) 1976-02-28
IE41472L (en) 1975-11-23
IN141971B (en) 1977-05-14
BE829386A (en) 1975-11-24
ES437893A1 (en) 1977-01-01
NL7506005A (en) 1975-11-25
FR2272441A1 (en) 1975-12-19
GB1448041A (en) 1976-09-02

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8139 Disposal/non-payment of the annual fee