DE202015006764U1 - Wafer carrier with a configuration with 31 pockets - Google Patents
Wafer carrier with a configuration with 31 pockets Download PDFInfo
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- DE202015006764U1 DE202015006764U1 DE202015006764.6U DE202015006764U DE202015006764U1 DE 202015006764 U1 DE202015006764 U1 DE 202015006764U1 DE 202015006764 U DE202015006764 U DE 202015006764U DE 202015006764 U1 DE202015006764 U1 DE 202015006764U1
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- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 11
- 229910044991 metal oxide Inorganic materials 0.000 claims 1
- 150000004706 metal oxides Chemical class 0.000 claims 1
- 238000007740 vapor deposition Methods 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 description 129
- 239000007789 gas Substances 0.000 description 41
- 238000000034 method Methods 0.000 description 28
- 238000009826 distribution Methods 0.000 description 18
- 238000006243 chemical reaction Methods 0.000 description 17
- 239000000463 material Substances 0.000 description 11
- 238000010438 heat treatment Methods 0.000 description 10
- 239000010410 layer Substances 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 8
- 230000007246 mechanism Effects 0.000 description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 6
- 239000000758 substrate Substances 0.000 description 6
- 238000012546 transfer Methods 0.000 description 6
- 239000000969 carrier Substances 0.000 description 5
- 239000012159 carrier gas Substances 0.000 description 5
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 4
- 229910002804 graphite Inorganic materials 0.000 description 4
- 239000010439 graphite Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 229910002601 GaN Inorganic materials 0.000 description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 150000002902 organometallic compounds Chemical class 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 3
- 229910010271 silicon carbide Inorganic materials 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- 239000002826 coolant Substances 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- BUHVIAUBTBOHAG-FOYDDCNASA-N (2r,3r,4s,5r)-2-[6-[[2-(3,5-dimethoxyphenyl)-2-(2-methylphenyl)ethyl]amino]purin-9-yl]-5-(hydroxymethyl)oxolane-3,4-diol Chemical compound COC1=CC(OC)=CC(C(CNC=2C=3N=CN(C=3N=CN=2)[C@H]2[C@@H]([C@H](O)[C@@H](CO)O2)O)C=2C(=CC=CC=2)C)=C1 BUHVIAUBTBOHAG-FOYDDCNASA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- NWAIGJYBQQYSPW-UHFFFAOYSA-N azanylidyneindigane Chemical compound [In]#N NWAIGJYBQQYSPW-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 229910021478 group 5 element Inorganic materials 0.000 description 1
- 210000002837 heart atrium Anatomy 0.000 description 1
- 239000003779 heat-resistant material Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 230000000116 mitigating effect Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 238000010944 pre-mature reactiony Methods 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Images
Classifications
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
- C23C16/4582—Rigid and flat substrates, e.g. plates or discs
- C23C16/4583—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
- C23C16/4584—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally the substrate being rotated
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68764—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating caroussel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68771—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by supporting more than one semiconductor substrate
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
Waferträger, der für den Gebrauch mit einer Vorrichtung zur chemischen Gasphasenabscheidung ausgelegt ist, wobei der Waferträger umfasst: einen Körper, der eine obere Fläche und eine untere Fläche, die einander gegenüber angeordnet sind, aufweist, eine Mehrzahl von Taschen, die in der oberen Fläche des Waferträgers definiert sind, wobei die Verbesserung umfasst, dass die Mehrzahl von Taschen aus insgesamt einunddreißig Taschen bestehen, wobei jede der Taschen entlang eines von drei Kreisen angeordnet ist, wobei jeder der Kreise miteinander und mit einem durch einen Umfang der oberen Fläche gebildeten kreisförmigen Umriss konzentrisch ist.A wafer carrier adapted for use with a chemical vapor deposition apparatus, the wafer carrier comprising: a body having a top surface and a bottom surface opposing each other, a plurality of pockets disposed in the top surface of the wafer carrier, the improvement comprising that the plurality of pockets consist of a total of thirty-one pockets, each of the pockets being arranged along one of three circles, each of the circles being interconnected and having a circular outline formed by a perimeter of the top surface is concentric.
Description
TECHNISCHES GEBIETTECHNICAL AREA
Die Erfindung betrifft im Allgemeinen eine Halbleiterfertigungstechnologie und insbesondere eine Bearbeitung mithilfe einer chemischen Gasphasenabscheidung (CVD) und eine zugehörige Vorrichtung zum Halten von Halbleiterwafern während der Bearbeitung.The invention relates generally to semiconductor fabrication technology, and more particularly to chemical vapor deposition (CVD) machining and associated apparatus for holding semiconductor wafers during processing.
HINTERGRUNDBACKGROUND
Bei der Fertigung von Leuchtdioden (LEDs) und anderen Hochleistungsbauelementen, wie z. B. Laserdioden, optischen Detektoren und Feldeffekttransistoren, wird typischerweise ein chemischer Gasphasenabscheidungsprozess (CVD-Prozess) verwendet, um eine Dünnschichtstapelstruktur unter Verwendung von Materialien, wie z. B. Galliumnitrid, über einem Saphir- oder Siliziumsubstrat aufzuwachsen. Ein CVD-Werkzeug umfasst eine Prozesskammer, die eine abgedichtete Umgebung bildet, die es ermöglicht, dass eingeleitete Gase auf dem Substrat (typischerweise in Form von Wafern) reagieren, um die Dünnschichtlagen aufzuwachsen. Zu Beispielen von gegenwärtigen Produktlinien derartiger Herstellungsgeräte gehören TurboDisc®- und EPIK-Familien der MOCVD-Systeme (Systeme zur metallorganischen chemischen Gasphasenabscheidung), die von Veeco Instruments Inc. aus Plainview, New York hergestellt werden.In the manufacture of light-emitting diodes (LEDs) and other high-performance components, such. As laser diodes, optical detectors and field effect transistors, typically a chemical vapor deposition (CVD) process is used to form a thin film stack structure using materials such. Gallium nitride, over a sapphire or silicon substrate. A CVD tool includes a process chamber that forms a sealed environment that allows injected gases to react on the substrate (typically in the form of wafers) to grow the thin film layers. Examples of current product lines such production equipment include Turbo Disc ® - and EPIK families of MOCVD systems (systems for metal organic chemical vapor deposition), manufactured by Veeco Instruments Inc. of Plainview, New York.
Mehrere Prozessparameter, wie z. B. Temperatur, Druck und Gasdurchflussrate, werden gesteuert, um ein gewünschtes Kristallwachstum zu erzielen. Verschiedene Lagen werden unter Verwendung verschiedener Materialien und Prozessparameter aufgewachsen. Zum Beispiel werden Bauelemente, die aus Verbindungshalbleitern, wie z. B. III-V-Halbleitern, ausgebildet werden, typischerweise gebildet, indem aufeinanderfolgende Schichten des Verbindungshalbleiters unter Verwendung einer MOCVD aufgewachsen werden. In diesem Prozess werden die Wafer einer Kombination von Gasen ausgesetzt, die typischerweise eine metallorganische Verbindung als eine Quelle eines Gruppe-III-Metalls umfasst und ebenfalls eine Quelle eines Gruppe-V-Elements umfasst, die über die Oberfläche des Wafers fließen, während der Wafer auf einer erhöhten Temperatur gehalten wird. Im Allgemeinen werden die metallorganische Verbindung und die Gruppe-V-Quelle mit einem Trägergas kombiniert, das sich nicht nennenswert an der Reaktion beteiligt, wie zum Beispiel Stickstoff. Ein Beispiel eines III-V-Halbleiters bildet Galliumnitrid, das mithilfe einer Reaktion einer Organo-Gallium-Verbindung und Ammoniaks auf einem Substrat, das einen geeigneten Gitterabstand aufweist, wie z. B. ein Saphir-Wafer, gebildet werden kann. Der Wafer wird während einer Abscheidung von Galliumnitrid und verwandter Verbindungen in der Regel bei einer Temperatur in der Größenordnung von 1000 bis 1100°C gehalten.Several process parameters, such as Temperature, pressure and gas flow rate are controlled to achieve desired crystal growth. Different layers are grown using different materials and process parameters. For example, devices made of compound semiconductors, such as. For example, III-V semiconductors may be formed, typically grown by growing successive layers of the compound semiconductor using a MOCVD. In this process, the wafers are exposed to a combination of gases, typically comprising an organometallic compound as a source of a Group III metal and also comprising a source of a Group V element, which flow over the surface of the wafer while the wafer is maintained at an elevated temperature. In general, the organometallic compound and the group V source are combined with a carrier gas that does not significantly participate in the reaction, such as nitrogen. An example of a III-V semiconductor is gallium nitride, which is prepared by reacting an organo-gallium compound and ammonia on a substrate that has a suitable lattice spacing, such as a lattice spacing. As a sapphire wafer can be formed. The wafer is typically held at a temperature of the order of 1000 to 1100 ° C during deposition of gallium nitride and related compounds.
In einem MOCVD-Prozess, bei dem das Wachstum von Kristallen durch eine chemische Reaktion auf der Oberfläche des Substrats erfolgt, müssen die Prozessparameter besonders sorgfältig gesteuert werden, um sicherzustellen, dass die chemische Reaktion unter den erforderlichen Bedingungen stattfindet. Selbst kleine Abwandlungen der Prozessbedingungen können die Qualität der Bauelemente und die Herstellungsausbeute negativ beeinflussen. Wenn zum Beispiel eine Gallium- und Indiumnitridschicht abgeschieden wird, führen Abwandlungen der Waferoberflächentemperatur zu Abwandlungen der Zusammensetzung und der Bandlücke der abgeschiedenen Schicht. Da Indium einen verhältnismäßig hohen Dampfdruck aufweist, weist die abgeschiedene Schicht einen niedrigeren Anteil an Indium und eine größere Bandlücke in jenen Bereichen des Wafers auf, in denen die Oberflächentemperatur höher ist. Wenn die abgeschiedene Schicht eine aktive, lichtemittierende Schicht einer LED-Struktur ist, schwankt die Emissionswellenlänge der aus dem Wafer ausgebildeten LEDs ebenfalls in einem inakzeptablen Ausmaß.In a MOCVD process, where the growth of crystals occurs through a chemical reaction on the surface of the substrate, the process parameters must be particularly carefully controlled to ensure that the chemical reaction takes place under the required conditions. Even small variations in process conditions can adversely affect the quality of the devices and the manufacturing yield. For example, when a gallium and indium nitride layer is deposited, variations in the wafer surface temperature lead to variations in the composition and band gap of the deposited layer. Since indium has a relatively high vapor pressure, the deposited layer has a lower content of indium and a larger band gap in those regions of the wafer where the surface temperature is higher. When the deposited layer is an active light emitting layer of an LED structure, the emission wavelength of the LEDs formed from the wafer also fluctuates to an unacceptable extent.
In einer MOCVD-Prozesskammer werden Halbleiterwafer, auf denen Lagen aus Dünnschichten aufgewachsen werden sollen, auf schnell rotierende Drehtische, die als Waferträger bezeichnet werden, gelegt, um ein gleichmäßiges Aussetzen ihrer Oberflächen der Atmosphäre innerhalb der Reaktionskammer zum Abscheiden der Halbleitermaterialien bereitzustellen. Die Drehzahl liegt in der Größenordnung von 1000 rpm. Die Waferträger werden typischerweise aus einem gut wärmeleitenden Material, wie z. B. Graphit, gefertigt, und werden häufig mit einer Schutzschicht aus einem Material. wie z. B. Siliziumkarbid, beschichtet. Jeder Waferträger weist einen Satz kreisförmige Vertiefungen, oder Taschen, in seiner oberen Fläche auf, in denen einzelne Wafer angeordnet werden. Typischerweise werden die Wafer in einem zu der unteren Fläche jeder der Taschen beabstandeten Verhältnis gestützt, um den Gasfluss um die Ränder des Wafers zu ermöglichen. Einige Beispiele für eine einschlägige Technologie sind in der US-Patentanmeldung Veröffentlichungs-Nr. 2012/0040097,
Der Waferträger wird auf einer Spindel innerhalb der Reaktionskammer derart gestützt, dass die obere Fläche des Waferträgers, die die exponierten Oberflächen der Wafer aufweist, nach oben zu einer Gasverteilungsvorrichtung hin weist. Während die Spindel gedreht wird, wird das Gas abwärts auf die obere Fläche des Waferträgers gerichtet und fließt über die obere Fläche zum Umfangsrand des Waferträgers hin. Das gebrauchte Gas wird durch Öffnungen, die unter dem Waferträger angeordnet sind, aus der Reaktionskammer abgezogen. Der Waferträger wird mithilfe von Heizelementen, typischerweise elektrischen Widerstandsheizelementen, die unter der unteren Fläche des Waferträgers angeordnet sind, auf der gewünschten erhöhten Temperatur gehalten. Diese Heizelemente werden auf einer Temperatur oberhalb der gewünschten Temperatur der Waferoberflächen gehalten, während die Gasverteilungsvorrichtung typischerweise auf einer Temperatur weit unter der gewünschten Reaktionstemperatur gehalten wird, so dass eine vorzeitige Reaktion der Gase verhindert wird. Daher wird Wärme von den Heizelementen zur unteren Fläche des Waferträgers übertragen und fließt aufwärts durch den Waferträger zu den einzelnen Wafern.The wafer carrier is supported on a spindle within the reaction chamber such that the upper surface of the wafer carrier, which has the exposed surfaces of the wafer, upwards to a gas distribution device points out. As the spindle is rotated, the gas is directed downwardly onto the top surface of the wafer carrier and flows over the top surface toward the peripheral edge of the wafer carrier. The used gas is withdrawn from the reaction chamber through openings located under the wafer carrier. The wafer carrier is maintained at the desired elevated temperature by means of heating elements, typically electrical resistance heating elements, disposed below the bottom surface of the wafer carrier. These heating elements are maintained at a temperature above the desired temperature of the wafer surfaces, while typically maintaining the gas distribution device at a temperature well below the desired reaction temperature so as to prevent premature reaction of the gases. Therefore, heat is transferred from the heating elements to the lower surface of the wafer carrier and flows upwardly through the wafer carrier to the individual wafers.
Der Gasfluss über den Wafern variiert je nach der radialen Position jedes Wafers, wobei die an äußersten Positionen angeordneten Wafer aufgrund ihrer schnelleren Geschwindigkeit während der Drehung höheren Flussraten ausgesetzt werden. Sogar auf jedem einzelnen Wafer können Ungleichmäßigkeiten der Temperatur vorliegen, d. h. kalte Stellen und heiße Stellen. Eine der Variablen, die das Ausbilden von Temperatur-Ungleichmäßigkeiten beeinflussen, ist die Form der Taschen in dem Waferträger. Im Allgemeinen bilden Taschenformen eine kreisförmige Form in der Oberfläche des Waferträgers. Wenn sich der Waferträger dreht, werden die Wafer an ihrem äußersten Rand (d. h. dem am weitesten von der Rotationsachse entfernten Rand) einer erheblichen Zentripetalkraft ausgesetzt, wodurch veranlasst wird, dass der Wafer gegen die Innenwand der jeweiligen Tasche in dem Waferträger drückt. Bei dieser Bedingung besteht ein enger Kontakt zwischen diesen äußeren Rändern der Wafer und dem Taschenrand. Die erhöhte Wärmeleitung zu diesen äußersten Abschnitten der Wafer führt zu einer größeren Temperatur-Ungleichmäßigkeit, was das vorstehend beschriebene Problem weiter verstärkt. Anstrengungen wurden unternommen, um die Temperatur-Ungleichmäßigkeiten zu minimieren, indem der Spalt zwischen dem Waferrand und der Innenwand der Tasche vergrößert wird, einschließlich eines Entwurfs eines Wafers, der an einem Abschnitt des Randes flach ist (d. h. eines „flachen” Wafers). Dieser flache Abschnitt des Wafers erzeugt einen Spalt und verringert die Kontaktpunkte mit der Innenwand der Tasche, wodurch Temperatur-Ungleichmäßigkeiten abgemildert werden. Andere Faktoren, die die Wärmegleichmäßigkeit in den durch den Waferträger gehaltenen Wafern beeinflussen, umfassen die Wärmeübertragungs- und -emissionseigenschaft des Waferträgers in Verbindung mit dem Layout der Wafertaschen.The gas flow across the wafers varies with the radial position of each wafer, with the wafers located at extreme positions being exposed to higher flow rates due to their faster velocity during rotation. Even on each individual wafer, temperature unevenness may be present, i. H. cold spots and hot spots. One of the variables that affects the formation of temperature imbalances is the shape of the pockets in the wafer carrier. In general, pocket shapes form a circular shape in the surface of the wafer carrier. As the wafer carrier rotates, the wafers are exposed to significant centripetal force at their outermost edge (i.e., the edge furthest from the axis of rotation), thereby causing the wafer to press against the inner wall of the respective pocket in the wafer carrier. In this condition, there is close contact between these outer edges of the wafers and the pocket edge. The increased heat conduction to these outermost portions of the wafers results in greater temperature unevenness, further aggravating the problem described above. Efforts have been made to minimize temperature imbalances by increasing the gap between the wafer edge and the inner wall of the pocket, including a design of a wafer that is flat at a portion of the edge (i.e., a "flat" wafer). This flat portion of the wafer creates a gap and reduces the contact points with the inner wall of the pocket, thereby mitigating temperature inequalities. Other factors that affect heat uniformity in the wafers held by the wafer carrier include the heat transfer and emissivity of the wafer carrier in conjunction with the layout of the wafer pockets.
Mit Blick auf die Temperatur-Gleichmäßigkeitsanforderungen besteht eine andere wünschenswerte Eigenschaft von Waferträgern darin, den Durchsatz des CVD-Prozesses zu erhöhen. Die Rolle des Waferträgers beim Steigern des Prozessdurchsatzes besteht darin, eine größere Anzahl von einzelnen Wafern zu halten. Ein Bereitstellen eines Waferträger-Layouts mit mehreren Wafern wirkt sich auf das Wärmemodell aus. Zum Beispiel befinden sich die Abschnitte des Waferträgers in der Nähe der Ränder aufgrund von Strahlungswärmeverlust von den Waferträgerrändern tendenziell auf einer niedrigeren Temperatur als andere Abschnitte.In view of temperature uniformity requirements, another desirable property of wafer carriers is to increase the throughput of the CVD process. The role of the wafer carrier in increasing process throughput is to hold a larger number of individual wafers. Providing a wafer carrier layout with multiple wafers affects the heat model. For example, the portions of the wafer carrier near the edges tend to be at a lower temperature than other portions due to radiant heat loss from the wafer carrier edges.
Demzufolge wird eine praktische Lösung für Waferträger benötigt, bei der die Temperaturgleichmäßigkeit und mechanische Beanspruchungen in Layouts mit hoher Dichte angegangen werden.Accordingly, a practical solution for wafer carriers is needed in which the temperature uniformity and mechanical stresses in high density layouts are addressed.
KURZE DARSTELLUNGSHORT PRESENTATION
Ein Waferträger umfasst eine neue Anordnung von Taschen. Die hier beschriebenen Anordnungen ermöglichen eine Wärmeübertragung sowie eine hohe Packungsdichte von Taschen zum Aufwachsen von kreisförmigen Wafern.A wafer carrier includes a new array of pockets. The arrangements described herein enable heat transfer as well as a high packing density of pockets for growing circular wafers.
KURZE BESCHREIBUNG DER ZEICHNUNGENBRIEF DESCRIPTION OF THE DRAWINGS
Die Erfindung kann unter Berücksichtigung der nachstehenden ausführlicher Beschreibung verschiedener Ausführungsformen der Erfindung in Verbindung mit den begleitenden Zeichnungen vollständiger verstanden werden. Es zeigen:The invention may be more fully understood in consideration of the following detailed description of various embodiments of the invention taken in conjunction with the accompanying drawings. Show it:
AUSFÜHRLICHE BESCHREIBUNGDETAILED DESCRIPTION
Die Gasverteilungsvorrichtung
Eine Spindel
Ein Heizelement
Die Vorrichtung umfasst außerdem mehrere Waferträger. In dem in
In Betrieb ist ein Wafer
In einem typischen MOCVD-Prozess wird ein mit Wafern bestückter Waferträger
Die Heizelemente
Wärme wird von der oberen Fläche
In der dargestellten Ausführungsform umfasst das System eine Anzahl von Merkmalen, die derart ausgelegt sind, dass sie die Gleichmäßigkeit der Erwärmung der Flächen jedes Wafers
Die in
Die untere Fläche
In Ausführungsformen kann der Waferträger
Die Ausführungsformen sollen veranschaulichend und nicht einschränkend sein. Zusätzliche Ausführungsformen liegen innerhalb des Umfangs der Ansprüche. Obwohl Aspekte der vorliegenden Erfindung unter Bezugnahme auf bestimmte Ausführungsformen beschrieben wurden, wird ein Fachmann außerdem erkennen, dass Änderungen der Form und der Einzelheiten vorgenommen werden können, ohne von dem in den Ansprüchen definierten Umfang der Erfindung abzuweichen.The embodiments are intended to be illustrative and not restrictive. Additional embodiments are within the scope of the claims. Although aspects of the present invention have been described with reference to particular embodiments, there is Those skilled in the art will recognize that changes may be made in form and detail without departing from the scope of the invention as defined in the claims.
ZITATE ENTHALTEN IN DER BESCHREIBUNG QUOTES INCLUDE IN THE DESCRIPTION
Diese Liste der vom Anmelder aufgeführten Dokumente wurde automatisiert erzeugt und ist ausschließlich zur besseren Information des Lesers aufgenommen. Die Liste ist nicht Bestandteil der deutschen Patent- bzw. Gebrauchsmusteranmeldung. Das DPMA übernimmt keinerlei Haftung für etwaige Fehler oder Auslassungen.This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.
Zitierte PatentliteraturCited patent literature
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- US 8021487 [0005] US 8021487 [0005]
- US 6902623 [0005] US 6902623 [0005]
- US 6506252 [0005] US 6506252 [0005]
- US 6492625 [0005] US 6492625 [0005]
- US 7276124 [0021] US 7276124 [0021]
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KR20160003441U (en) | 2016-10-06 |
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