DE19922257A1 - Process for building in slits in silicon wafers comprises producing hole structures longitudinal to the slits by pore etching, and connecting the hole structures to the slits by chemical etching - Google Patents
Process for building in slits in silicon wafers comprises producing hole structures longitudinal to the slits by pore etching, and connecting the hole structures to the slits by chemical etchingInfo
- Publication number
- DE19922257A1 DE19922257A1 DE1999122257 DE19922257A DE19922257A1 DE 19922257 A1 DE19922257 A1 DE 19922257A1 DE 1999122257 DE1999122257 DE 1999122257 DE 19922257 A DE19922257 A DE 19922257A DE 19922257 A1 DE19922257 A1 DE 19922257A1
- Authority
- DE
- Germany
- Prior art keywords
- etching
- slits
- hole structures
- pore
- slots
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/06—Silicon
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/08—Etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
- H01L21/30608—Anisotropic liquid etching
Abstract
Description
Die Erfindung bezieht sich auf ein Verfahren zum Einbringen von Schlitzen in Siliziumscheiben durch Ätzung.The invention relates to a method for introduction of slots in silicon wafers by etching.
Das Einbringen von Schlitzen durch eine maskierte Ätzung be reitet bei der Anwendung auf Siliziumscheiben - im Gegensatz zur Ätzung einer Vielzahl anderer Materialien - erhebliche Schwierigkeiten. Durch eine maskierte alkalische Ätzung von <110<Scheiben können Schlitze in 211-Richtung erzeugt werden. Diese Beschränkung auf die Anwendbarkeit von <110<Scheiben macht dieses Ätzverfahren natürlich nur äußerst beschränkt anwendbar.The insertion of slots by a masked etching be rides when used on silicon wafers - in contrast for etching a variety of other materials - significant Trouble. With a masked alkaline etching of <110 <slices can be created in the 211 direction. This limitation to the applicability of <110 <disks naturally makes this etching process extremely limited applicable.
Durch Plasmaätzen können zwar Schlitze in Siliziumscheiben beliebiger Orientierung geätzt werden, doch ist bei diesem Plasmaätzen das Aspektverhältnis auf etwa 1/30 beschränkt. Ätztiefen in der Größenordnung der Scheibendicke erfordern extrem lange Ätzzeiten.Plasma etching can make slots in silicon wafers orientation can be etched, but with this one Plasma etching limits the aspect ratio to about 1/30. Require etching depths in the order of the thickness of the pane extremely long etching times.
Der Erfindung liegt daher die Aufgabe zugrunde, ein Verfahren zum Einbringen von Schlitzen in Siliziumscheiben zu schaffen, das es ermöglicht, Schlitze beliebiger Ausrichtung und hoher Apsektverhältnisse einfach und rasch einzubringen, ohne die Gefahr einer starken konischen Aufätzung.The invention is therefore based on the object of a method to create slots in silicon wafers, which allows slots of any orientation and high Aspect ratios can be introduced quickly and easily without the Risk of severe conical etching.
Zur Lösung dieser Aufgabe ist erfindungsgemäß vorgesehen, dass zunächst in einem ersten Arbeitsgang längs der Schlitze eng benachbarte Lochstrukturen durch eine Porenätzung erzeugt werden und dass anschließend die Lochstrukturen durch eine chemische Ätzung zu Schlitzen verbunden werden.To achieve this object, the invention provides that initially in a first step along the slots closely adjacent hole structures created by pore etching and that then the hole structures by a chemical etching can be connected to slots.
Dieses erfindungsgemäße zweistufige Verfahren, bei dem die Lochstrukturen bevorzugt durch eine elektrochemische Porenät zung erzeugt werden, nutzt zunächst den Vorteil der Porenät zung, die auf <100<Scheiben (Standardmaterial der Halbleiter fertigung) durchgeführt wird. Durch Anwendung einer zusätzli chen chemischen Ätzung, vorzugsweise einer langsamen chemi schen Ätzung, können die Lochstrukturen zu Schlitzen verbun den werden, wobei die Art der langsamen chemischen Ätzung ausschlaggebend dafür ist, ob echte Schlitze mit im wesentli chen zur Oberfläche der Scheiben senkrechten Schlitzseiten wänden entstehen oder ob eine starke konische Aufätzung er folgt.This two-step process according to the invention, in which the Hole structures preferably through an electrochemical pore structure generation, first takes advantage of the pore tongue on <100 <wafers (standard material of semiconductors manufacturing) is carried out. By using an additional Chen chemical etching, preferably a slow chemical etching, the hole structures can combine to form slits the being, the type of slow chemical etching the decisive factor here is whether real slots have essentially surfaces perpendicular to the surface of the panes walls or whether there is a strong conical etching follows.
Umfangreiche der vorliegenden Erfindung zugrundeliegende Ver suche haben dabei ergeben, dass bei Verwendung einer alkali schen Ätze beispielsweise einer 2%igen KOH-Ätze bei Raumtem peratur über ca. 100 Stunden eine chemische Nachätzung der durch die Porenätzung erzeugten Lochstrukturen erfolgt, die über die Porentiefe hinreichend isotrop ist, um eine konische Aufätzung der Schlitze zu vermeiden. Andere Ätzen, z. B. kon zentrierte, alkalische Lösungen, HF/HNO3 Gemische oder höhere Temperaturen führen immer zu einer nachteiligen konischen Aufätzung der Strukturen.Extensive tests on which the present invention is based have shown that when using an alkali etch, for example a 2% KOH etch at room temperature for about 100 hours, chemical etching of the hole structures produced by the pore etching takes place, which is sufficient over the pore depth is isotropic in order to avoid a conical etching of the slots. Other etching, e.g. B. concentrated, alkaline solutions, HF / HNO 3 mixtures or higher temperatures always lead to a disadvantageous conical etching of the structures.
Weitere Vorteile, Merkmale und Einzelheiten der Erfindung er geben sich aus der nachfolgenden Beschreibung zweier Ausfüh rungsbeispiele sowie anhand der Zeichnung. Dabei zeigen:Further advantages, features and details of the invention he give two executions from the following description Example and based on the drawing. Show:
Fig. 1 eine Aufsicht auf eine Siliziumscheibe mit durch Porenätzung eingebrachten Lochstrukturen, Fig. 1 is a plan view of a silicon wafer having introduced through pore etching hole structures,
Fig. 2 eine Aufsicht auf eine Siliziumscheibe nach dem Verbinden der Lochstrukturen durch eine nachfolgen de langsame chemische Ätzung, Fig. 2 is a plan view of a silicon wafer after the bonding of the hole structures through a chemical follow de slow etching,
Fig. 3 eine Aufsicht auf eine Scheibe mit Lochstrukturen für kreuzförmige Schlitze, und Fig. 3 is a plan view of a disc with hole structures for cross-shaped slots, and
Fig. 4 eine Aufsicht auf die Scheibe nach Fig. 3 nach der Aufätzung der Lochstrukturen. Fig. 4 is a plan view of the disc of FIG. 3 after the hole structures are etched.
Die Fig. 1 zeigt die Geometrie zur Herstellung der Lochstruk turen, die in einem ersten Arbeitsgang bevorzugt durch eine elektrochemische Porenätzung erzeugt werden. Dabei ist sowohl die Dimension der Struktur als auch die relative Orientierung in Bezug auf die kristallographischen Achsen des Siliziums angegeben. Fig. 1 shows the geometry for the production of the Loch structures, which are preferably generated in a first operation by an electrochemical pore etching. Both the dimension of the structure and the relative orientation in relation to the crystallographic axes of the silicon are given.
Die Fig. 2 zeigt die aufgeätzte Struktur, wie sie durch eine Ätzung mit 2% KOH + Propanol über 96 Stunden erzielt wurde. Die Ätzrate betrug dabei ca. 40 nm/h. Fig. 2 shows the etched structure as was obtained by etching with KOH + 2% propanol over 96 hours. The etching rate was approximately 40 nm / h.
Die Fig. 3 und 4 zeigen die Geometrie zur Herstellung von kreuzförmigen Schlitzstrukturen, wie sie mit den bisherigen Ätzverfahren - mit Ausnahme des nur sehr langsamen und auch nur ein begrenztes Aspektverhältnis ermöglichenden Plasmaät zens - überhaupt nicht erzielt werden konnten. Auch in diesem Fall sind im Makroporenraster, also der durch Porenätzung er zeugten Lochstruktur gemäß Fig. 3 und wiederum die Dimensio nen der Struktur sowie die relative Orientierung im Bezug auf die kristallographischen Achsen des Siliziums angegeben. Figs. 3 and 4 show the geometry for the preparation of cross-shaped slot structures, as with the previous etching processes - the very slow except, and only a limited aspect ratio permitting Plasmaät zen - at all could not be obtained. In this case, too, the macro-pore grid, that is to say the hole structure produced by pore etching according to FIG. 3, and again the dimensions of the structure and the relative orientation with respect to the crystallographic axes of the silicon are indicated.
Claims (5)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE1999122257 DE19922257A1 (en) | 1999-05-14 | 1999-05-14 | Process for building in slits in silicon wafers comprises producing hole structures longitudinal to the slits by pore etching, and connecting the hole structures to the slits by chemical etching |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE1999122257 DE19922257A1 (en) | 1999-05-14 | 1999-05-14 | Process for building in slits in silicon wafers comprises producing hole structures longitudinal to the slits by pore etching, and connecting the hole structures to the slits by chemical etching |
Publications (1)
Publication Number | Publication Date |
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DE19922257A1 true DE19922257A1 (en) | 2000-11-16 |
Family
ID=7908073
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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DE1999122257 Ceased DE19922257A1 (en) | 1999-05-14 | 1999-05-14 | Process for building in slits in silicon wafers comprises producing hole structures longitudinal to the slits by pore etching, and connecting the hole structures to the slits by chemical etching |
Country Status (1)
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DE (1) | DE19922257A1 (en) |
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007083155A1 (en) * | 2006-01-23 | 2007-07-26 | Nexeon Ltd | A method of fabricating fibres composed of silicon or a silicon-based material and their use in lithium rechargeable batteries |
US8642211B2 (en) | 2007-07-17 | 2014-02-04 | Nexeon Limited | Electrode including silicon-comprising fibres and electrochemical cells including the same |
US8772174B2 (en) | 2010-04-09 | 2014-07-08 | Nexeon Ltd. | Method of fabricating structured particles composed of silicon or silicon-based material and their use in lithium rechargeable batteries |
US8870975B2 (en) | 2007-07-17 | 2014-10-28 | Nexeon Ltd. | Method of fabricating structured particles composed of silicon or a silicon-based material and their use in lithium rechargeable batteries |
US8932759B2 (en) | 2008-10-10 | 2015-01-13 | Nexeon Ltd. | Method of fabricating structured particles composed of silicon or a silicon-based material |
US8945774B2 (en) | 2010-06-07 | 2015-02-03 | Nexeon Ltd. | Additive for lithium ion rechageable battery cells |
US8962183B2 (en) | 2009-05-07 | 2015-02-24 | Nexeon Limited | Method of making silicon anode material for rechargeable cells |
US9012079B2 (en) | 2007-07-17 | 2015-04-21 | Nexeon Ltd | Electrode comprising structured silicon-based material |
US9184438B2 (en) | 2008-10-10 | 2015-11-10 | Nexeon Ltd. | Method of fabricating structured particles composed of silicon or a silicon-based material and their use in lithium rechargeable batteries |
US9252426B2 (en) | 2007-05-11 | 2016-02-02 | Nexeon Limited | Silicon anode for a rechargeable battery |
US9608272B2 (en) | 2009-05-11 | 2017-03-28 | Nexeon Limited | Composition for a secondary battery cell |
US9647263B2 (en) | 2010-09-03 | 2017-05-09 | Nexeon Limited | Electroactive material |
US9853292B2 (en) | 2009-05-11 | 2017-12-26 | Nexeon Limited | Electrode composition for a secondary battery cell |
US9871248B2 (en) | 2010-09-03 | 2018-01-16 | Nexeon Limited | Porous electroactive material |
CN114643428A (en) * | 2020-12-17 | 2022-06-21 | 钛昇科技股份有限公司 | Method for forming through hole in substrate |
Citations (3)
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DE1112368B (en) * | 1957-11-07 | 1961-08-03 | Philips Nv | Process for producing a perforated cutting plate for a dry shaver by etching |
DE1216649B (en) * | 1961-03-30 | 1966-05-12 | Philips Nv | Process for the production of a plate with funnel-shaped cavities or perforations by etching |
DE3526951A1 (en) * | 1985-07-27 | 1987-01-29 | Battelle Institut E V | Shearing blade for razors and method for the production thereof |
-
1999
- 1999-05-14 DE DE1999122257 patent/DE19922257A1/en not_active Ceased
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1112368B (en) * | 1957-11-07 | 1961-08-03 | Philips Nv | Process for producing a perforated cutting plate for a dry shaver by etching |
DE1216649B (en) * | 1961-03-30 | 1966-05-12 | Philips Nv | Process for the production of a plate with funnel-shaped cavities or perforations by etching |
DE3526951A1 (en) * | 1985-07-27 | 1987-01-29 | Battelle Institut E V | Shearing blade for razors and method for the production thereof |
Cited By (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8597831B2 (en) | 2006-01-23 | 2013-12-03 | Nexeon Ltd. | Method of fabricating fibres composed of silicon or a silicon-based material and their use in lithium rechargeable batteries |
EP2472653A3 (en) * | 2006-01-23 | 2014-11-26 | Nexeon Limited | Electrode structure comprising intersecting silicon-containing fibres for lithium rechargeable batteries |
WO2007083155A1 (en) * | 2006-01-23 | 2007-07-26 | Nexeon Ltd | A method of fabricating fibres composed of silicon or a silicon-based material and their use in lithium rechargeable batteries |
US9583762B2 (en) | 2006-01-23 | 2017-02-28 | Nexeon Limited | Method of fabricating fibres composed of silicon or a silicon-based material and their use in lithium rechargeable batteries |
US9252426B2 (en) | 2007-05-11 | 2016-02-02 | Nexeon Limited | Silicon anode for a rechargeable battery |
US9871249B2 (en) | 2007-05-11 | 2018-01-16 | Nexeon Limited | Silicon anode for a rechargeable battery |
US8642211B2 (en) | 2007-07-17 | 2014-02-04 | Nexeon Limited | Electrode including silicon-comprising fibres and electrochemical cells including the same |
US9871244B2 (en) | 2007-07-17 | 2018-01-16 | Nexeon Limited | Method of fabricating structured particles composed of silicon or a silicon-based material and their use in lithium rechargeable batteries |
US8870975B2 (en) | 2007-07-17 | 2014-10-28 | Nexeon Ltd. | Method of fabricating structured particles composed of silicon or a silicon-based material and their use in lithium rechargeable batteries |
US8940437B2 (en) | 2007-07-17 | 2015-01-27 | Nexeon Limited | Method of fabricating structured particles composed of silicon or a silicon-based material and their use in lithium rechargeable batteries |
US9012079B2 (en) | 2007-07-17 | 2015-04-21 | Nexeon Ltd | Electrode comprising structured silicon-based material |
US8932759B2 (en) | 2008-10-10 | 2015-01-13 | Nexeon Ltd. | Method of fabricating structured particles composed of silicon or a silicon-based material |
US9184438B2 (en) | 2008-10-10 | 2015-11-10 | Nexeon Ltd. | Method of fabricating structured particles composed of silicon or a silicon-based material and their use in lithium rechargeable batteries |
US8962183B2 (en) | 2009-05-07 | 2015-02-24 | Nexeon Limited | Method of making silicon anode material for rechargeable cells |
US9553304B2 (en) | 2009-05-07 | 2017-01-24 | Nexeon Limited | Method of making silicon anode material for rechargeable cells |
US9853292B2 (en) | 2009-05-11 | 2017-12-26 | Nexeon Limited | Electrode composition for a secondary battery cell |
US9608272B2 (en) | 2009-05-11 | 2017-03-28 | Nexeon Limited | Composition for a secondary battery cell |
US10050275B2 (en) | 2009-05-11 | 2018-08-14 | Nexeon Limited | Binder for lithium ion rechargeable battery cells |
US8772174B2 (en) | 2010-04-09 | 2014-07-08 | Nexeon Ltd. | Method of fabricating structured particles composed of silicon or silicon-based material and their use in lithium rechargeable batteries |
US9368836B2 (en) | 2010-06-07 | 2016-06-14 | Nexeon Ltd. | Additive for lithium ion rechargeable battery cells |
US8945774B2 (en) | 2010-06-07 | 2015-02-03 | Nexeon Ltd. | Additive for lithium ion rechageable battery cells |
US9647263B2 (en) | 2010-09-03 | 2017-05-09 | Nexeon Limited | Electroactive material |
US9871248B2 (en) | 2010-09-03 | 2018-01-16 | Nexeon Limited | Porous electroactive material |
US9947920B2 (en) | 2010-09-03 | 2018-04-17 | Nexeon Limited | Electroactive material |
CN114643428A (en) * | 2020-12-17 | 2022-06-21 | 钛昇科技股份有限公司 | Method for forming through hole in substrate |
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