DE19681425T1 - Schaltung und Verfahren zum Regeln einer Spannung - Google Patents

Schaltung und Verfahren zum Regeln einer Spannung

Info

Publication number
DE19681425T1
DE19681425T1 DE19681425T DE19681425T DE19681425T1 DE 19681425 T1 DE19681425 T1 DE 19681425T1 DE 19681425 T DE19681425 T DE 19681425T DE 19681425 T DE19681425 T DE 19681425T DE 19681425 T1 DE19681425 T1 DE 19681425T1
Authority
DE
Germany
Prior art keywords
regulating
voltage
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19681425T
Other languages
English (en)
Other versions
DE19681425B3 (de
Inventor
Stephen L Casper
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of DE19681425T1 publication Critical patent/DE19681425T1/de
Application granted granted Critical
Publication of DE19681425B3 publication Critical patent/DE19681425B3/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/12—Regulating voltage or current wherein the variable actually regulated by the final control device is ac
    • G05F1/40—Regulating voltage or current wherein the variable actually regulated by the final control device is ac using discharge tubes or semiconductor devices as final control devices
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/462—Regulating voltage or current wherein the variable actually regulated by the final control device is dc as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic
    • G05F1/465—Internal voltage generators for integrated circuits, e.g. step down generators
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Dram (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Dc-Dc Converters (AREA)
  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Manipulation Of Pulses (AREA)
  • Measurement Of Current Or Voltage (AREA)
DE19681425T 1995-06-07 1996-06-06 Schaltung und Verfahren zum Regeln einer Spannung Expired - Fee Related DE19681425B3 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/485,093 US5644215A (en) 1995-06-07 1995-06-07 Circuit and method for regulating a voltage
US08/485,093 1995-06-07
PCT/US1996/009941 WO1996041247A1 (en) 1995-06-07 1996-06-06 Circuit and method for regulating a voltage

Publications (2)

Publication Number Publication Date
DE19681425T1 true DE19681425T1 (de) 1998-07-02
DE19681425B3 DE19681425B3 (de) 2012-08-02

Family

ID=23926885

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19681425T Expired - Fee Related DE19681425B3 (de) 1995-06-07 1996-06-06 Schaltung und Verfahren zum Regeln einer Spannung

Country Status (7)

Country Link
US (2) US5644215A (de)
JP (1) JP3425956B2 (de)
KR (1) KR100401392B1 (de)
AU (1) AU6270496A (de)
DE (1) DE19681425B3 (de)
GB (1) GB2315886B (de)
WO (1) WO1996041247A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6115307A (en) 1997-05-19 2000-09-05 Micron Technology, Inc. Method and structure for rapid enablement
US5923156A (en) * 1997-08-15 1999-07-13 Micron Technology, Inc. N-channel voltage regulator
US6054847A (en) * 1998-09-09 2000-04-25 International Business Machines Corp. Method and apparatus to automatically select operating voltages for a device
JP2000155617A (ja) * 1998-11-19 2000-06-06 Mitsubishi Electric Corp 内部電圧発生回路
FR2801678B1 (fr) * 1999-11-30 2002-02-01 St Microelectronics Sa Dispositif de detection d'une haute tension
US6285243B1 (en) 2000-02-23 2001-09-04 Micron Technology, Inc. High-voltage charge pump circuit
US6495994B1 (en) * 2001-08-27 2002-12-17 Micron Technology, Inc. Regulator circuit for independent adjustment of pumps in multiple modes of operation
GB2381882B (en) * 2001-11-09 2005-11-09 Micron Technology Inc Voltage clamp circuit
DE10327285A1 (de) * 2003-06-17 2005-01-13 Infineon Technologies Ag Schaltungsanordnung
US6937026B2 (en) * 2003-09-11 2005-08-30 Lockheed Martin Corporation High voltage interface module
US6992534B2 (en) * 2003-10-14 2006-01-31 Micron Technology, Inc. Circuits and methods of temperature compensation for refresh oscillator
US9831764B2 (en) 2014-11-20 2017-11-28 Stmicroelectronics International N.V. Scalable protection voltage generator
CN107231325B (zh) * 2016-03-25 2021-03-30 快捷半导体(苏州)有限公司 信号接收电路及方法、信号检测电路

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57199335A (en) * 1981-06-02 1982-12-07 Toshiba Corp Generating circuit for substrate bias
US4581546A (en) * 1983-11-02 1986-04-08 Inmos Corporation CMOS substrate bias generator having only P channel transistors in the charge pump
JPS6159688A (ja) * 1984-08-31 1986-03-27 Hitachi Ltd 半導体集積回路装置
US4689651A (en) * 1985-07-29 1987-08-25 Motorola, Inc. Low voltage clamp
JPS63308794A (ja) * 1987-06-10 1988-12-16 Mitsubishi Electric Corp 基板バイアス回路
US4947058A (en) * 1988-06-03 1990-08-07 Fairchild Semiconductor Corporation TTL current sinking circuit with transient performance enhancement during output transition from high to low
US4972104A (en) * 1988-06-03 1990-11-20 Fairchild Semiconductor Corporation TTL totem pole anti-simultaneous conduction circuit
US4975798A (en) * 1989-09-05 1990-12-04 Motorola Inc. Voltage-clamped integrated circuit
US5039877A (en) * 1990-08-30 1991-08-13 Micron Technology, Inc. Low current substrate bias generator
JP3253726B2 (ja) * 1993-02-26 2002-02-04 株式会社東芝 半導体記憶装置の基板バイアス発生回路および基板バイアスレベルの制御方法

Also Published As

Publication number Publication date
JPH11507452A (ja) 1999-06-29
GB2315886A (en) 1998-02-11
KR100401392B1 (ko) 2003-12-24
DE19681425B3 (de) 2012-08-02
US5644215A (en) 1997-07-01
GB2315886B (en) 1999-05-12
US5831419A (en) 1998-11-03
GB9725961D0 (en) 1998-02-04
JP3425956B2 (ja) 2003-07-14
KR19990022525A (ko) 1999-03-25
AU6270496A (en) 1996-12-30
WO1996041247A1 (en) 1996-12-19

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
R016 Response to examination communication
R016 Response to examination communication
R016 Response to examination communication
R018 Grant decision by examination section/examining division
R020 Patent grant now final

Effective date: 20121103

R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee