DE1044285B - Semiconductor arrangement with at least three electrodes that act as in the vacuum amplifier tube - Google Patents

Semiconductor arrangement with at least three electrodes that act as in the vacuum amplifier tube

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Publication number
DE1044285B
DE1044285B DES36380A DES0036380A DE1044285B DE 1044285 B DE1044285 B DE 1044285B DE S36380 A DES36380 A DE S36380A DE S0036380 A DES0036380 A DE S0036380A DE 1044285 B DE1044285 B DE 1044285B
Authority
DE
Germany
Prior art keywords
semiconductor
potential wall
electrodes
arrangement according
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DES36380A
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German (de)
Inventor
Dr Walter Heywang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to DES36380A priority Critical patent/DE1044285B/en
Publication of DE1044285B publication Critical patent/DE1044285B/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/479—Application of electric currents or fields, e.g. for electroforming
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/207—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds further characterised by the doping material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/88—Tunnel-effect diodes

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)

Description

Halbleiteranordnung mit mindestens drei wie bei der Vakuumverstärkerröhre wirkenden Elektroden Inder Patentanmeldung S 32766 VIII c/21 g ist eine Halbleiteranordnung mit mindestens drei wie bei der Vakuumverstärkerröhre als Anode, Kathode und Steuergitter wirkenden Elektroden, die an zwei flächenförmigen Grenzschichten mit entgegengesetzten Sperrrichtungen und einem zwischen diesen befindlichen Halbleitermittelteil geringer Dicke liegen, innerhalb dessen auf Grund der an die Elektroden gelegten Spannungen im Wege des Anodenstromes ein Potentialwall erzeugt ist, und bei der eine derart geringe Dicke des Halbleitermittelteils von weniger als etwa 10 p, und durch eine solche Ab- bzw. Zunahme der Donatoren- b.zw. Akzeptorendichte innerhalb desselben von einer Elektrode bis zur gegenüberliegenden verwendet ist, daß der Potentialwall von einem wesentlichen Teil der den Anodenstrom bildenden Ladungsträger oder von praktisch allen diesen Ladungsträgern durch den Tunneleffekt, gegebenenfalls unter Mitwirkung thermischer Energie, überwunden werden kann.Semiconductor arrangement with at least three as in the case of the vacuum amplifier tube acting electrodes In the patent application S 32766 VIII c / 21 g is a semiconductor device with at least three as the anode, cathode and control grid, as in the case of the vacuum amplifier tube acting electrodes, which are at two planar boundary layers with opposite Blocking directions and a semiconductor center part located between them less Thickness lie within which due to the voltages applied to the electrodes in the way of the anode current, a potential wall is generated, and one such small thickness of the semiconductor center portion of less than about 10 p, and by a such decrease or increase in donors or Acceptor density within it from one electrode to the opposite is used that the potential wall of a substantial part of the charge carriers forming the anode current or of practically all of these charge carriers through the tunnel effect, possibly under Contribution of thermal energy, can be overcome.

Eine besonders zweckmäßige Ausführungsform gemäß einem Ausführungsbeispiel besteht darin, daß ein Halbleiterkristall, beispielsweise aus Germanium, drei Zonen unterschiedlicher Leitfähigkeit aufweist, wobei zwei Zonen beispielsweise mit n-Leitfähigkeit eine zwischen beiden Zonen verlaufende, mittlere Zone von beispielsweise p-Leitfähigkeit begrenzen. Der zu verstärkende Strom fließt zwischen zwei Elektroden 2 und 4, die an die Leitfähigkeitsbereiche angelegt sind und als Kathode und Anode dienen, während die Steuerung der Anordnung durch eine als Gitter wirkende Steuerelektrode 3 bewirkt wird, die an der mittleren Leitfähigkeitszone p liegt. Die Anordnung hat den Vorteil, daß sie in Analogie zu den bekannten Elektronenröhrenanordnungen arbeitet.A particularly expedient embodiment according to an exemplary embodiment consists in the fact that a semiconductor crystal, for example of germanium, has three zones having different conductivity, with two zones, for example, with n-conductivity a middle zone of, for example, p-conductivity, running between the two zones limit. The current to be amplified flows between two electrodes 2 and 4, the are applied to the conductivity areas and serve as cathode and anode while the control of the arrangement is effected by a control electrode 3 acting as a grid which lies at the middle conductivity zone p. The arrangement has the advantage that it works in analogy to the known electron tube assemblies.

Erfindungsgemäß ist vorgesehen, daß das Halbleitermaterial, die Betriebstemperatur des Halbleitermaterials und die geometrische Dicke des den Potentialwall auf Grund seiner Raumladungen erzeugenden Bereiches aufeinander so abgestimmt sind, daß die Steuerwirkung des Potentialwalls ein Optimum erreicht und dabei die Temperatur so gewählt ist, daß iin Falle der thermischen Überwindung die Dicke des Potentialwalls in bzw. unterhalb der Größenordnung der Diffusionslänge der Ladungsträger liegt.According to the invention it is provided that the semiconductor material, the operating temperature of the semiconductor material and the geometric thickness of the potential wall due to its space charge generating area are coordinated so that the Control effect of the potential wall reaches an optimum and thereby the temperature so it is chosen that in the case of thermal overcoming the thickness of the potential wall is in or below the order of magnitude of the diffusion length of the charge carriers.

Gemäß einer besonderen Ausbildung des Erfindungsgedankens kann auch eine der Leitfähigkeitszone ein Intrinsic-Bereich sein, dergestalt, daß beispielsweise die mittlere Zone ein Intrinsic-Bereich und die beiden äußeren Zonen n- oder p-Bereiche sind. Schließlich sind noch weitere Kombinationen von Bereichen unterschiedlicher Dotierung möglich, wodurch sich in Abhängigkeit von der Konzentration der Akzeptoren bzw. Donatoren an den Übergängen gewünschte Potentialverhältnisse erzielen lassen. Bei Verwendung von Intrinsic-Bereichen kommt man unter Umständen mit verhältnismäßig niedrigen Temperaturen aus. Es ist sogar unter Umständen möglich, bei Wahl geeigneter Materialien und entsprechender Anordnung der Zonen verschiedener Leitfähigkeit zu einem Optimum der Wirkungsweise der Halbleiteranordnung zu gelangen. Es läßt sich auch durch geeignete Dotierung ein gewünschter Temperaturgang der Kenngrößen erzielen. Mindestens die mittlere Zone der Halbleiteranordnung besitzt gemäß einer weiteren Ausbildung des Erfindungsgedankens eine auf das verwendete Halbleitermaterial abgestimmte Dicke, welche von der Größenordnung der durch das Halbleitermaterial bedingten Diffusionslänge der Ladungsträger ist.According to a special embodiment of the concept of the invention can also one of the conductivity zones can be an intrinsic area, such that, for example the middle zone an intrinsic area and the two outer zones n or p areas are. Finally, other combinations of areas are different Doping possible, which depends on the concentration of the acceptors or donors can achieve desired potential ratios at the transitions. When using intrinsic areas, you may come across with proportionate low temperatures. It is even possible under certain circumstances, if a suitable choice is made Materials and appropriate arrangement of the zones of different conductivity too to achieve an optimum of the mode of operation of the semiconductor arrangement. It can be also achieve a desired temperature response of the parameters through suitable doping. At least the middle zone of the semiconductor arrangement has a further one Formation of the inventive concept tailored to the semiconductor material used Thickness, which is of the order of magnitude of the diffusion length caused by the semiconductor material the load carrier is.

Silizium ist beispielsweise ein Halbleitermaterial, bei dem zweckmäßig eine erhöhte Betriebstemperatur angewandt wird. Bei Germanium ergibt sich der Vorteil, daß die Betriebstemperatur nur wenig über Zimmertemperatur zu liegen braucht.For example, silicon is a semiconductor material in which it is expedient an increased operating temperature is applied. With germanium there is the advantage that the operating temperature only needs to be slightly above room temperature.

Besonders zweckmäßig ist die Verwendung von Materialien mit hoher Ladungsträgerbeweglichkeit, wie sie vorzugsweise Halbleiterstoffe besitzen, welche aus Elementen der III. und V. oder II. und VI. Gruppe des Periodischen Systems bestehen. Auch solche Halbleiter, welche im Flußspat- oder Antiflußspatgitter kristallisieren, sind von Vorteil.The use of materials with a high Charge carrier mobility, as they preferably have semiconductor materials, which from elements of III. and V. or II. and VI. Group of the Periodic Table. Also those semiconductors which crystallize in the fluorspar or anti-fluorspar lattice, are beneficial.

Claims (6)

PATENTANSPRÜCHE: 1. Halbleiteranordnung mit mindestens drei wie bei der Vakuumverstärkerröhre als Anode, Kathode und Steuergitter wirkenden Elektroden, die an zwei flächenförmigen Grenzschichten mit entgegengesetzten Sperrichtungen und einem zwischen diesen befindlichen Halbleitermittelteil geringer Dicke liegen, innerhalb dessen auf Grund der an die Elektroden gelegten 'Spannungen im Wege des Anodenstromes ein Potentialwall erzeugt ist, und bei der eine derart geringe Dicke des Halbleitermittelteiles von weniger als etwa 10#t und- durch eine solche Ab- bzw. Zunahme der Donatoren-bzw. Akzeptorendichte innerhalb desselben von einer Elektrode bis zur gegenüberliegenden verwendet ist, daß der Potentialwall von einem wesentlichen Teil der den Anodenstrom bildenden Ladungsträger oder von praktisch allen diesen Ladungsträgern durch den Tunneleffekt, gegebenenfalls unter Mitwirkung thermischer Energie, überwunden werden kann, nach Patentanmeldung S 32766 VIII c%21 g, dadurch gekennzeichnet, daß das Halbleitermaterial, die Betriebstemperatur des Halbleitermaterials und die geometrische Dicke des den Potentialwall auf Grund seiner Raumladungen erzeugenden Bereiches aufeinander so abgestimmt sind, daß die Steuerwirkung des Potentialwalls ein Optimum erreicht und dabei die Temperatur so gewählt ist, daß im Falle der thermischen Überwindung däe Dicke des Potentialwalls in bzw. unterhalb der Größenordnung der Diffusionslänge der Ladungsträger liegt. PATENT CLAIMS: 1. Semiconductor arrangement with at least three as in the vacuum amplifier tube as electrodes acting as anode, cathode and control grid, the on two planar boundary layers with opposite one another Blocking directions and a semiconductor center part located between them less Thickness lie within which due to the 'voltages applied to the electrodes in the way of the anode current, a potential wall is generated, and one such small thickness of the semiconductor center part of less than about 10 # t and by one such decrease or increase in donors or. Acceptor density within it from one electrode to the opposite is used that the potential wall of a substantial part of the charge carriers forming the anode current or of practically all of these charge carriers through the tunnel effect, possibly under Contribution of thermal energy, can be overcome, according to patent application S 32766 VIII c% 21 g, characterized in that the semiconductor material, the operating temperature of the semiconductor material and the geometric thickness of the potential wall due to its space charge generating area are coordinated so that the Control effect of the potential wall reaches an optimum and thereby the temperature so it is chosen that in the case of thermal overcoming the thickness of the potential wall is in or below the order of magnitude of the diffusion length of the charge carriers. 2. Halbleiteranordnung nach Anspruch 1, dadurch _ gekennzeichnet, daß mindestens eine der Leitfähigkeitszanen ein Intrinsic-Bereich ist. 2. Semiconductor arrangement according to claim 1, characterized in that at least one of the conductivity zans is an intrinsic area. 3. - HaIhI"eiteranordnung nach einem der Ansprüche 1 und 2, dadurch gekennzeichnet, daß der Halbleiter aus Silizium, vorzugsweise aus einem Silizium-Einkristall, besteht und daß eine erhöhte Betriebstemperatur angewandt bzw. zugelassen ist. 3. - HaIhI "pus arrangement according to one of claims 1 and 2, characterized in that the semiconductor from Silicon, preferably from a silicon single crystal, and that an increased Operating temperature is used or approved. 4. Halbleiteranordnung nach einem der Ansprüche 1 und 2, dadurch gekennzeichnet, daß der Halbleiter aus Germanium, vorzugsweise aus einem Germanium-Einkristall, besteht und daß die Betriebstemperatur bei Zimmertemperatur oder dicht darüber liegt. 4. Semiconductor arrangement according to one of claims 1 and 2, characterized in that the semiconductor made of germanium, preferably of a germanium single crystal, and that the operating temperature at room temperature or just above it. 5. Halbleiteranordnung nach einem der Ansprüche 1 und 2, dadurch gekennzeichnet, daß der Halbleiter aus Verbindungen von Elementen der III. und V. öder II. und VI. Gruppe des Periodischen Systems besteht. 5. Semiconductor arrangement according to one of claims 1 and 2, characterized in that the semiconductor consists of compounds of elements of III. and V. or II. and VI. Group of the Periodic Table. 6. HwlbJeiteranordnung nach wenigstens einem der Ansprüche 1 bis 5, dadurch gekennzeichnet, daß die Dotierungskonzentration so gewählt ist, daß geeignete Potentialverhältnisse im Steuerbereich und dessen Umgebung erzielt werden.6. HwlbJeiterordnung according to at least one of claims 1 to 5, characterized in that that the doping concentration is chosen so that suitable potential ratios in the tax area and its surroundings.
DES36380A 1953-11-17 1953-11-17 Semiconductor arrangement with at least three electrodes that act as in the vacuum amplifier tube Pending DE1044285B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DES36380A DE1044285B (en) 1953-11-17 1953-11-17 Semiconductor arrangement with at least three electrodes that act as in the vacuum amplifier tube

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DES36380A DE1044285B (en) 1953-11-17 1953-11-17 Semiconductor arrangement with at least three electrodes that act as in the vacuum amplifier tube

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DE1044285B true DE1044285B (en) 1958-11-20

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1154879B (en) * 1959-12-17 1963-09-26 Western Electric Co Method for generating a negative resistance in a semiconductor component
DE1180849B (en) * 1959-12-30 1964-11-05 Ibm Semiconductor component with a sequence of zones of alternately opposite conductivity types in the semiconductor body and method for producing such a semiconductor component
DE1209208B (en) * 1960-11-21 1966-01-20 Ibm Semiconductor component with degenerately doped semiconductor body and very thin pn transition area and method for producing this semiconductor component, in particular tunnel diode or Esaki diode

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1154879B (en) * 1959-12-17 1963-09-26 Western Electric Co Method for generating a negative resistance in a semiconductor component
DE1180849B (en) * 1959-12-30 1964-11-05 Ibm Semiconductor component with a sequence of zones of alternately opposite conductivity types in the semiconductor body and method for producing such a semiconductor component
DE1209208B (en) * 1960-11-21 1966-01-20 Ibm Semiconductor component with degenerately doped semiconductor body and very thin pn transition area and method for producing this semiconductor component, in particular tunnel diode or Esaki diode

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