DE102015103667A1 - Power semiconductor module with improved bond connection structure - Google Patents
Power semiconductor module with improved bond connection structure Download PDFInfo
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- DE102015103667A1 DE102015103667A1 DE102015103667.3A DE102015103667A DE102015103667A1 DE 102015103667 A1 DE102015103667 A1 DE 102015103667A1 DE 102015103667 A DE102015103667 A DE 102015103667A DE 102015103667 A1 DE102015103667 A1 DE 102015103667A1
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- power semiconductor
- bond
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Abstract
Die Erfindung betrifft ein Leistungshalbleitermodul (10) aufweisend: wenigstens ein Substrat (3, 4); wenigstens einen auf dem Substrat (3, 4) angeordneten Leistungshalbleiter (1, 2), der auf seiner dem Substrat abgewandten Seite eine Anschlussfläche (11, 21) aufweist; eine auf dem Substrat (3, 4) neben dem Leistungshalbleiter (1, 2) angeordnete, gegebenenfalls segmentierte Lastpotenzialfläche (13a, 13b, 23); mehrere Bondverbindungen (15, 16, 25, 26) zur parallelen elektrisch leitenden Verbindung der Anschlussfläche (11, 21) mit der Lastpotenzialfläche (13a, 13b, 23), wobei jede Bondverbindung (15, 16, 25, 26) wenigstens einen ersten Bondfuß (31) auf der Lastpotenzialfläche (13a, 13b, 23) und mehrere zweite Bondfüße (32) auf der Anschlussfläche (11, 21) aufweist und wobei jede Bondverbindung (15, 16, 25, 26) auf der Anschlussfläche (11, 21) wenigstens ein Ende aufweist, wobei die mehreren Bondverbindungen (15, 16, 25, 26) in wenigstens zwei Gruppen (15 bzw. 16; 25 bzw. 26) aus mehreren Bondverbindungen gleicher Anzahl von Bondfüßen arrangiert sind und die zweiten Bondfüße (32) jeder Bondverbindung einer Gruppe ausschließlich in einem durch eine Teilfläche der Anschlussfläche definierten Segment oder Bereich (12a bzw. 12b; 22a bzw. 22b) der Anschlussfläche (11, 21) angeordnet sind und die Gruppen sich dahingehend unterscheiden, dass deren erste Bondfüße (31) entweder auf einem anderen Segment (13a bzw. 13b) der Lastpotenzialfläche oder in einem unterschiedlichen, bevorzugt aber innerhalb jeder Gruppe übereinstimmenden, Abstand (a1 bzw. a2) zum Leistungshalbleiter (2) auf der Lastpotenzialfläche (23) angeordnet sind.The invention relates to a power semiconductor module (10) comprising: at least one substrate (3, 4); at least one power semiconductor (1, 2) arranged on the substrate (3, 4), which has a connection surface (11, 21) on its side facing away from the substrate; an optionally segmented load potential area (13a, 13b, 23) arranged on the substrate (3, 4) next to the power semiconductor (1, 2); a plurality of bond connections (15, 16, 25, 26) for the parallel electrically conductive connection of the connection surface (11, 21) to the load potential surface (13a, 13b, 23), each bond connection (15, 16, 25, 26) comprising at least one first bonding foot (31) on the load potential surface (13a, 13b, 23) and a plurality of second bonding feet (32) on the connection surface (11, 21) and wherein each bond connection (15, 16, 25, 26) on the connection surface (11, 21) at least one end, wherein the plurality of bonds (15, 16, 25, 26) are arranged in at least two groups (15, 16, 25, 26, respectively) of a plurality of bonds of the same number of bond feet, and the second bond legs (32) each Bonding a group exclusively in a defined by a partial surface of the pad segment or area (12a or 12b, 22a and 22b) of the pad (11, 21) are arranged and the groups differ in that their first bond feet (31) either on egg In another segment (13a or 13b) of the load potential area or in a different, but preferably within each group matching distance (a1 or a2) to the power semiconductor (2) on the load potential surface (23) are arranged.
Description
Die vorliegende Erfindung betrifft ein Leistungshalbleitermodul. Leistungshalbleitermodule sind Halbleiterbaugruppen, die in Leistungselektronik-schaltungen zum Einsatz kommen. Leistungshalbleitermodule kommen üblicherweise in Fahrzeug- und Industrieanwendungen zum Einsatz, wie in Invertern und Gleichrichtern. Die Halbleiterkomponenten, die in den Leistungshalbleitermodulen enthalten sind, sind üblicherweise IGBT(Insulated Gate Bipolar Transistor)-Halbleiterchips oder MOSFET(Metalloxidhalbleiter-Feldeffekttransistor)-Halbleiterchips. Die IGBT- und MOSFET-Halbleiterchips weisen variierende Nennspannungen und -leistungen auf. Einige Leistungshalbleitermodule weisen zum Überspannungsschutz auch zusätzliche Halbleiterdioden (d. h. Freilaufdioden) im Halbleiterpaket auf.The present invention relates to a power semiconductor module. Power semiconductor modules are semiconductor devices that are used in power electronics circuits. Power semiconductor modules are commonly used in automotive and industrial applications, such as in inverters and rectifiers. The semiconductor components included in the power semiconductor modules are usually IGBT (Insulated Gate Bipolar Transistor) semiconductor chips or MOSFET (Metal Oxide Semiconductor Field Effect Transistor) semiconductor chips. The IGBT and MOSFET semiconductor chips have varying nominal voltages and powers. Some power semiconductor modules also have additional semiconductor diodes (i.e., freewheeling diodes) in the semiconductor package for overvoltage protection.
Für höhere Leistungsanwendungen weist ein Leistungshalbleitermodul üblicherweise einen oder mehrere Leistungshalbleiterbauelemente, im Folgenden auch kurz Leistungshalbleiter genannt, auf einem einzelnen Substrat auf. Das Substrat weist üblicherweise wenigstens ein isolierendes Keramiksubstrat, wie Al2O3, AlN, Si3N4 oder ein anderes geeignetes Material auf, um das Leistungshalbleitermodul elektrisch zu isolieren. Das Substrat ist üblicherweise auf einer metallischen Grundplatte aufgebracht, die als das Substrat stabilisierender Träger der mechanischen Befestigung und thermischen Kopplung des Moduls an einen Kühlkörper dient. Mindestens eine Oberseite des Keramiksubstrates ist entweder mit reinem oder plattiertem Cu, Al oder einem anderen geeigneten Material metallbeschichtet, um einerseits den darauf angeordneten und regelmäßig verlöteten Leistungshalbleiter zu kontaktieren und andererseits elektrische Potenzialflächen, insbesondere Lastpotenzialflächen, bereitzustellen. Diese Potenzialflächen dienen einerseits der Stromzu- oder abfuhr über sogenannte Bondverbindungen zum Leistungshalbleiter andererseits der mechanischen Befestigung und elektrischen Verbindung mit Anschlussteilen, die der Stromzu- oder abfuhr zu oder aus dem Modul insbesondere aus dessen Gehäuse dienen, um beispielsweise letztere außerhalb des Gehäuses mit externen Leitern zu verbinden, beispielsweise mittels Verschraubung. Die für die Potenzialflächen vorgesehene Metallschicht wird üblicherweise mit Hilfe eines direkten Kupfer-Bonding-Verfahrens (DCB), eines direkten Aluminium-Bonding-Verfahrens (DAB) oder eines aktiven Metallhartlötverfahrens (AMB) an das Keramiksubstrat gebondet.For higher power applications, a power semiconductor module usually has one or more power semiconductor components, also referred to below as power semiconductors, on a single substrate. The substrate typically includes at least one insulating ceramic substrate, such as Al 2 O 3 , AlN, Si 3 N 4, or other suitable material to electrically isolate the power semiconductor module. The substrate is usually applied to a metallic base plate serving as a substrate stabilizing support for mechanical attachment and thermal coupling of the module to a heat sink. At least one top surface of the ceramic substrate is metal coated with either pure or plated Cu, Al, or other suitable material to contact the power semiconductor disposed thereon and soldered thereto on a regular basis, and to provide electrical potential areas, particularly load potential areas. On the one hand, these potential surfaces serve to supply or remove electricity via so-called bond connections to the power semiconductor, on the other hand, mechanical fastening and electrical connection with connection parts, which supply or remove power to or from the module, in particular from its housing, for example to the latter outside the housing with external conductors to connect, for example by means of screwing. The metal layer provided for the potential areas is usually bonded to the ceramic substrate by means of direct copper bonding (DCB), direct aluminum bonding (DAB) or active metal brazing (AMB) techniques.
Zu elektrischen Verbindung der Potenzialflächen mit der wenigstens einen, dem Substrat abgewandten Anschlussfläche des betreffenden Leistungshalbleiters sind regelmäßig Bondverbindungen in Form von Bonddrähten, auch Drahtbondverbindung genannt, oder Bondbändern auch Bandbondverbindung genannt, vorgesehen, die den elektrisch leitenden Kontakt zwischen der Potenzialfläche und der Anschlussfläche des Halbleiters herstellen. Im Bereich der Leistungselektronik kommen reine (99,99 % Al-Anteil und höher) Aluminium- und Kupfer Materialien zur Anwendung für die Bondverbindung. Die verschiedenen Verfahrensvarianten zur Herstellung der Verbindung zwischen der Bondverbindung und der Anschlussfläche einerseits und der Bondverbindung und der Potenzialfläche andererseits sind das Thermokompressionsbonden (kurz: TC-Bonden), das Thermosonic-Ball-Wedge-Bonden (TS-Bonden) und das Ultraschall-Wedge-Wedge-Bonden (US-Bonden). Der dabei jeweils hergestellte Berührbereich zwischen der Bondverbindung und der Anschlussfläche einerseits und der Bondverbindung und der Anschlusspotenzialfläche andererseits wird als Bondfuß bezeichnet.For electrical connection of the potential surfaces with the at least one, the substrate remote terminal surface of the respective power semiconductor are regularly bonds in the form of bonding wires, also called wire bond, or bonding tapes also called band bond, provided, the electrically conductive contact between the potential surface and the pad of the semiconductor produce. In the field of power electronics, pure (99.99% Al content and higher) aluminum and copper materials are used for the bond connection. The different process variants for the production of the connection between the bond connection and the connection surface on the one hand and the bond connection and the potential surface on the other hand are the thermocompression bonding (in short: TC bonding), the thermosonic ball wedge bonding (TS bonding) and the ultrasonic wedge -Wedge bonding (US bonding). The contact area produced in each case between the bond connection and the connection area on the one hand and the bond connection and the connection potential area on the other hand is referred to as bond foot.
Die Anforderungen und damit die Leistungsfähigkeit derartiger Leistungshalbleitermodule sowie der zu deren Aufbau notwendigen Leistungshalbleiterbauelemente sind in den letzten Jahren stetig gestiegen. Es stieg beispielhaft die Stromstärke pro Fläche der Halbleiterbauelemente. Weiterhin werden aus wirtschaftlichen Notwendigkeiten heraus die Halbleiterbauelemente immer näher an Ihrer Leistungsgrenze betrieben.The requirements and thus the performance of such power semiconductor modules and the power semiconductor components necessary for their construction have increased steadily in recent years. By way of example, the current intensity per area of the semiconductor components has increased. Furthermore, for economic reasons, the semiconductor devices are operating ever closer to their power limit.
Entscheidende externe Faktoren für die Leistungsfähigkeit von Leistungshalbleitermodulen bzw. Leistungshalbleiterbauelementen sind die Wärmeabfuhr sowie die Stromzu- und -abführung. Stand der Technik in der Stromzu- und -abführung von Leistungshalbleiterbauelementen sind Bondverbindungen in verschiedenen Ausgestaltungen, beispielhaft als Drahtbondverbindung oder als Bandbondverbindung. Bei Leistungshalbleitern mit hohen Stromlasten werden Dickdrähte mit Durchmessern zwischen 100 µm und 500 µm oder Dickdraht-Bändchen verwendet. Reicht deren Querschnitt nicht aus, sind regelmäßig mehrere parallele Bondverbindungen vorgesehen. Gegenstand der vorliegenden Erfindung ist die Leistungsfähigkeit derartiger Bondverbindungen.Decisive external factors for the performance of power semiconductor modules or power semiconductor components are the heat dissipation and the power supply and removal. State of the art in the power supply and removal of power semiconductor components are bond connections in various configurations, for example as a wire bond connection or as a band bond connection. Power semiconductors with high current loads use thick wires with diameters between 100 μm and 500 μm or thick-wire ribbons. If their cross-section is insufficient, several parallel bond connections are regularly provided. The present invention is the performance of such bonds.
Drahtbondverbindung für Leistungshalbleiterbauelemente sind beispielhaft aus der
Nach dem Stand der Technik werden Leistungshalbleiterbauelemente nicht nur mittels einzelner nebeneinander angeordneter Bonddrähte zur Stromzuführung kontaktiert, sondern häufig mit zwei oder mehreren in Richtung der Bonddrähte wenigstens abschnittsweise übereinander liegenden Bonddrähten. Die einzelnen Bonddrähte kontaktieren häufig auch zur Verbesserung der Stromverteilung auf dem Leistungshalbleiterbauelement dessen Anschlussfläche mittels mehrerer Bondfüße.According to the prior art, power semiconductor components are contacted not only by means of individual juxtaposed bonding wires for power supply, but often with two or more in the direction of the bonding wires at least partially superposed bonding wires. The individual bonding wires frequently also contact the connection surface thereof by means of a plurality of bonding feet in order to improve the current distribution on the power semiconductor component.
Simulationen zeigen, dass bei einer Anordnung der Bonddrähte zwischen einer Lastanschlusspotenzialfläche und einem Leistungshalbleiterbauelement nach dem Stand der Technik der Strom inhomogen über die Anschlussfläche in das Leistungshalbleiterbauelement eingespeist wird und somit dieses nicht in seiner gesamten Fläche gleichmäßig zur Stromführung belastet wird.Simulations show that in an arrangement of the bonding wires between a load terminal potential surface and a power semiconductor device according to the prior art, the current is fed inhomogeneously via the pad in the power semiconductor device and thus this is not burdened evenly in its entire surface for power management.
Die
Nachteilig an dieser Ausgestaltung einer Drahtbondverbindung ist, dass hierbei eine genügend große Anschlussfläche des Leistungshalbleiterbauelements zur Verfügung stehen muss, um derartig komplexe Topologien sinnvoll einsetzen zu können.A disadvantage of this embodiment of a wire bond is that in this case a sufficiently large pad of the power semiconductor device must be available in order to use such complex topologies meaningful.
Speziell bei Leistungshalbleitermodulen mit Dioden und Thyristoren sind Stoßstrombelastungen dieser Leistungshalbleiterbauelement besonders zu beachten. Diese Stoßströme übersteigen in einem kurzen Zeitraum in der Größenordnung von Zehntelsekunden die Dauerbelastung des Leistungshalbleiterbauelements um ein Vielfaches. Hierbei erweisen sich für den Dauerbetrieb ausgelegte Ausgestaltungen von Bondverbindungen nicht unbedingt als vorteilhaft.Particularly in the case of power semiconductor modules with diodes and thyristors, surge current loads of this power semiconductor component are to be considered in particular. These surge currents exceed the continuous load of the power semiconductor component by a multiple in the order of tenths of a second in a short period of time. In this case, designs of bond connections designed for continuous operation are not necessarily advantageous.
Der vorliegenden Erfindung liegt die Aufgabe zugrunde, eine Bondverbindung für Leistungshalbleitermodule vorzustellen, wobei die maximale Stromtragfähigkeit der Bondverbindung in ihrer Gesamtheit, speziell bei Stoßstrombelastung, verbessert ist, insbesondere die Stromverteilung und damit die Wärmeverteilung über die einzelnen Bondverbindungen ausgeglichener ist. Diese Aufgabe wird erfindungsgemäß durch ein Leistungshalbleitermodul mit den Merkmalen nach Anspruch 1 gelöst. Weitere, besonders vorteilhafte Ausgestaltungen der Erfindung offenbaren die Unteransprüche. Es ist darauf hinzuweisen, dass die in den Patentansprüchen einzeln aufgeführten Merkmale in beliebiger, technisch sinnvoller Weise miteinander kombiniert werden können und weitere Ausgestaltungen der Erfindung aufzeigen. Die Beschreibung charakterisiert und spezifiziert die Erfindung insbesondere im Zusammenhang mit den Figuren zusätzlich.The present invention has for its object to present a bond for power semiconductor modules, the maximum current carrying capacity of the bond in its entirety, especially at surge load, is improved, in particular the current distribution and thus the heat distribution over the individual bonds is balanced. This object is achieved by a power semiconductor module having the features of
Das erfindungsgemäße Leistungshalbleitermodul weist ein Substrat, bevorzugt elektrisch isolierendes Substrat auf. Beispielsweise handelt es sich um ein Keramiksubstrat, wie Al2O3, AlN, Si3N4. Das Substrat ist bevorzugt auf einer metallischen Grundplatte angeordnet, wobei die Grundplatte zur Anordnung und gegebenenfalls Befestigung an einem Kühlkörper ausgebildet ist. The power semiconductor module according to the invention has a substrate, preferably an electrically insulating substrate. For example, it is a ceramic substrate such as Al 2 O 3 , AlN, Si 3 N 4 . The substrate is preferably arranged on a metallic base plate, wherein the base plate is designed for arrangement and optionally attachment to a heat sink.
Erfindungsgemäß ist ferner wenigstens ein Leistungshalbleiter vorgesehen. Die hier betrachteten Leistungshalbleiter sind beispielhaft ungesteuerter Bauelemente wie Leistungsdioden, oder auch gesteuerte Bauelemente wie Leistungsthyristoren oder Leistungstransistoren, wie ein Bipolartransistor. Diese gesteuerten Bauelemente weisen zu ihrer Ansteuerung mindestens eine weitere im Allgemeinen durch eine auf ihrer ersten Hauptfläche vorgesehenen Metallisierung bereitgestellte weitere Anschlussfläche auf, die elektrisch von der Laststrom leitenden getrennt ist und nach dem Stand der Technik ebenfalls mittels einer Bondverbindung mit einer Steuerpotenzialfläche des Substrats verbunden ist. Diese Bondverbindung zwischen dem oder den Steueranschlüssen ist nicht Gegenstand der Erfindung. According to the invention, at least one power semiconductor is further provided. The power semiconductors considered here are examples of uncontrolled components such as power diodes, or controlled components such as power thyristors or power transistors, such as a bipolar transistor. These controlled components have to drive them at least one further connection surface provided in general by a metallization provided on its first main surface, which is electrically isolated from the load current conducting and, according to the prior art, is likewise connected to a control potential surface of the substrate by means of a bond connection , This bond between the control or the control terminals is not the subject of the invention.
Erfindungsgemäß weist der Leistungshalbleiter auf seiner dem Substrat abgewandten Seite eine Anschlussfläche auf. Die Anschlussfläche kann als durchgehende Metallisierung ausgebildet oder auch segmentiert sein, wie es beispielsweise bei den Emitter-Anschlussflächen eines IGBT der Fall sein kann. According to the invention, the power semiconductor has a connection surface on its side facing away from the substrate. The pad can be formed as a continuous metallization or segmented, as may be the case for example in the emitter pads of an IGBT.
Erfindungsgemäß ist ferner eine auf dem Substrat neben dem Leistungshalbleiter angeordnete, gegebenenfalls segmentierte Lastpotenzialfläche vorgesehen. According to the invention, an optionally segmented load potential area arranged on the substrate next to the power semiconductor is furthermore provided.
Erfindungsgemäß sind ferner mehrere Bondverbindungen zur parallelen elektrisch leitenden Verbindung der Anschlussfläche mit der Lastpotenzialfläche vorgesehen. Erfindungsgemäß weist jede der mehreren Bondverbindungen wenigstens einen Bondfuß erster Art, kurz ersten Bondfuß, auf, wobei der erste Bondfuß dadurch gekennzeichnet ist, dass der auf der wenigstens einen Lastpotenzialfläche angeordnet ist. Ferner weist jede der mehreren Bondverbindungen erfindungsgemäß mehrere zweite Bondfüße auf, wobei diese auf der Anschlussfläche des Leistungshalbleiters angeordnet sind. Erfindungsgemäß weist jede Bondverbindung auf der Anschlussfläche wenigstens ein Ende auf, bevorzugt ist ein Ende auf der Lastpotenzialfläche und ein Ende auf der Anschlussfläche vorgesehen, noch bevorzugter endet die Bondverbindung an ihren Enden jeweils mittels eines Bondfußes. Furthermore, according to the invention, a plurality of bond connections to the parallel electrically conductive connection of the connection area with the load potential area are provided. According to the invention, each of the plurality of bonding connections has at least one first type of bonding foot, in short the first bonding foot, wherein the first bonding foot is characterized in that that is arranged on the at least one load potential surface. Furthermore, according to the invention, each of the plurality of bonding connections has a plurality of second bonding feet, wherein these are arranged on the connection surface of the power semiconductor. According to the invention, each bonding connection has at least one end on the connection surface, preferably one end is provided on the load potential surface and one end is provided on the connection surface, more preferably the bond connection ends at its ends in each case by means of a bonding foot.
Erfindungsgemäß sind die mehreren Bondverbindungen in wenigstens zwei Gruppen aus mehreren Bondverbindungen gleicher Anzahl von Bondfüßen arrangiert. Erfindungsgemäß sind die zweiten Bondfüße jeder Bondverbindung einer Gruppe ausschließlich in einem durch eine Teilfläche der Anschlussfläche definierten Segment oder Bereich der Anschlussfläche angeordnet. Anders ausgedrückt ist erfindungsgemäß keine räumlich überschneidende Anordnung der zweiten Bondfüße der Gruppen vorgesehen. Bevorzugt sind pro Gruppe 15 bis 50 Bondverbindungen, noch bevorzugter 16 bis 30 Bondverbindungen, vorgesehen.According to the invention, the plurality of bond connections are arranged in at least two groups of a plurality of bond connections of the same number of bond feet. According to the invention, the second bond feet of each bond connection of a group are arranged exclusively in a segment or area of the connection area defined by a partial area of the connection area. In other words, according to the invention no spatially overlapping arrangement of the second bond feet of the groups is provided. Preferably, 15 to 50 bonds, more preferably 16 to 30 bonds, are provided per group.
Erfindungsgemäß unterscheiden sich die Gruppen dahingehend, dass deren ersten Bondfüße entweder auf einem anderen Segment der Lastpotenzialfläche oder in einem unterschiedlichen, bevorzugt aber innerhalb jeder Gruppe übereinstimmenden, Abstand zum Leistungshalbleiter auf der Lastpotenzialfläche angeordnet sind. Neben den erfindungsgemäß den Gruppen zugehörigen Bondverbindungen können weitere Bondverbindungen vorgesehen sein. Diese sind beispielsweise vorgesehen, um die Steuerpotenzialflächen mit den zugehörigen Steueranschlussflächen des gesteuerten Leistungshalbleiters elektrisch zu verbinden. According to the invention, the groups differ in that their first bond feet are arranged either on another segment of the load potential area or in a different, but preferably within each group, matching distance to the power semiconductor on the load potential area. In addition to the bonding compounds belonging to the groups according to the invention, further bonding connections can be provided. These are provided, for example, to electrically connect the control potential surfaces with the associated control pads of the controlled power semiconductor.
Der Grundgedanke der Erfindung liegt darin, die Stromdichte auf die den Laststrom leitende Anschlussfläche des Leistungshalbleiters im Vergleich zum Stand der Technik homogener auszuführen. Es hat sich gezeigt, dass durch die erfindungsgemäße Ausführungsform, bei der die Stromzu- bzw. abfuhr pro Gruppe auf einen Bereich der Anschlussfläche des Leistungshalbleiters beschränkt ist, eine besonders gleichmäßige Laststromverteilung und damit Verteilung des ohmschen Wärmeverluste über die Bondverbindungen erreicht wird. The basic idea of the invention is to make the current density more homogeneous on the connection pad of the power semiconductor which conducts the load current in comparison to the prior art. It has been shown that a particularly uniform load current distribution and thus distribution of the ohmic heat losses via the bonding connections is achieved by the embodiment according to the invention, in which the current supply or discharge per group is limited to a region of the pad of the power semiconductor.
Die erfindungsgemäß weitergebildete Bondverbindung von einer Lastpotenzialfläche zu einer Kontaktfläche, bzw. Metallisierung des Leistungshalbleiterbauelement weist eine Mehrzahl von einzelnen Bonddrähten, oder auch Bondbändern, auf, die ihrerseits eine Mehrzahl von zweiten Bondfüßen auf der Metallisierung des Leistungshalbleiterbauelements aufweisen. Diese zweiten Bondfüße können beliebig angeordnet sein. Bevorzugt ist eine regelmäßige Anordnung der zweiten Füße. Beispielsweise ist die Anordnung schachbrettartig, wobei die zweiten Bondfüße hier nur auf Feldern gleicher "Farbe" also von Reihe zu Reihe versetzt angeordnet sind. Bevorzugt ist eine Anordnung in parallelen gleichen Reihen, wobei die Abstände zwischen den nächstbenachbarten zweiten Füßen in den beiden Richtungen beibehalten werden.The inventively developed bond from a load potential surface to a contact surface, or metallization of the power semiconductor device has a plurality of individual bonding wires, or bonding tapes, which in turn have a plurality of second bonding feet on the metallization of the power semiconductor device. These second bond feet can be arranged arbitrarily. Preferred is a regular arrangement of the second feet. For example, the arrangement is checkerboard-like, whereby the second bond feet are arranged here only on fields of the same "color" from row to row. Preferred is an arrangement in parallel, equal rows, maintaining the distances between the next adjacent second feet in the two directions.
Die Bondverbindungen sind bevorzugt zwischen den Bondfüßen bogenförmig ausgebildet, um die Bondfüße bei einer temperaturbedingten Ausdehnung der Bondverbindung mechanisch so wenig wie möglich auf Zug und/oder Druck zu belasten. The bond connections are preferably arc-shaped between the bonding feet in order to mechanically stress the bond feet as little as possible on tension and / or pressure given a temperature-induced expansion of the bond connection.
Gemäß einer bevorzugten Ausführungsform unterscheiden sich die Bondverbindungen einer Gruppe in der Länge nicht. Noch bevorzugter weisen die Bondverbindungen der Gruppen alle die gleiche Länge auf.According to a preferred embodiment, the bond connections of a group do not differ in length. More preferably, the bond compounds of the groups all have the same length.
Gemäß einer bevorzugten Ausführungsform weist das Material der den Gruppen zugehörigen Bondverbindungen Aluminium oder Kupfer auf. Beispielsweise ist die Bondverbindung aus hochreinem Aluminium oder hochreinem Kupfer, mit einem Reinheitsgrad von 99,99 % oder besser. Alternativ können die Bondverbindungen beispielsweise aus einer Aluminium- oder Kupferlegierung bestehen, wobei als Legierungszusatz beispielsweise Magnesium, Silizium, Silber oder ähnliche, beispielsweise die thermischen oder die elektrisch leitenden Eigenschaften bzw. die mechanischen Eigenschaften der Bondverbindungen verbessernde, Zusätze, vorgesehen sind. Bevorzugt handelt es sich bei den Bondverbindungen um Bonddrähte. Beispielsweise weisen die Bonddrähte einen runden Querschnitt auf. Bevorzugt liegt der Querschnittdurchmesser im Bereich von 100 µm bis 800 µm, bevorzugter im Bereich von 125 µm bis 500 µm, wie 300 µm.According to a preferred embodiment, the material of the bonds associated with the groups aluminum or copper. For example, the bond is made of high purity aluminum or high purity copper, with a purity of 99.99% or better. Alternatively, the bonds may consist, for example, of an aluminum or copper alloy, with additives such as magnesium, silicon, silver or the like, for example the thermal or the electrically conductive properties or the mechanical properties of the bonding compounds, additives being provided as alloying addition. The bonding connections are preferably bonding wires. For example, the bonding wires have a round cross-section. Preferably, the cross-sectional diameter is in the range of 100 microns to 800 microns, more preferably in the range of 125 microns to 500 microns, such as 300 microns.
Gemäß einer bevorzugten Ausführungsform ist vorgesehen, dass die Bondverbindungen einer Gruppe jeweils einen dritten Bondfuß aufweisen, der im Verlauf der Bondverbindung zwischen dem ersten und den zweiten Bondfüßen und auf einer zur Lastpotenzialfläche isoliert angeordneten Metallisierung des Substrats angeordnet ist. Eine isolierte Anordnung im Sinne der Erfindung bezieht sich auf die Metallisierung an sich und steht damit nicht im Widerspruch zu der durch die Bondverbindung hergestellten elektrischen Verbindung. Anders ausgedrückt, ist bei dieser Ausgestaltung die Metallisierung ausschließlich über wenigstens eine Bondverbindung mit der Lastpotenzialfläche elektrisch verbunden. Aufgrund der sich durch den zusätzlichen Bondfuß ergebenden zusätzlichen Bogenführung ergibt sich eine Verlängerung der betreffenden Bondverbindungen. Dies schafft die Möglichkeit, die unterschiedlichen Gruppen bezüglich der Länge ihrer Bondverbindungen einander anzugleichen. Dabei sorgt der zusätzliche Bondfuß für eine zusätzliche mechanische Stabilisierung der Bondverbindung, ohne dabei aufgrund der Anordnung auf der isolierten Metallisierung die Stromverteilung im Sinne des Grundgedankens der Erfindung negativ zu beeinflussen. Bevorzugt sind die dritten Bondfüße der Gruppe auf einer gemeinsamen Metallisierung des Substrats angeordnet, durch die Verbindung mit dem Substrat ergibt sich unter anderem eine vorteilhafte Kühlung. Beispielsweise sind sie entlang einer gedachten, parallel und beabstandet zu einer Kante des Leistungshalbleiters verlaufenden Linie angeordnet. According to a preferred embodiment, it is provided that the bond connections of a group each have a third bond foot, which is arranged in the course of the bonding connection between the first and the second bond feet and on a isolated to the load potential surface metallization of the substrate. An insulated arrangement in the sense of the invention relates to the metallization per se and is thus not inconsistent with the electrical connection produced by the bond connection. In other words, in this embodiment, the metallization is electrically connected to the load potential area exclusively via at least one bonding connection. Due to the additional bond guidance resulting from the additional bond foot, there is an extension of the relevant bond connections. This creates the possibility that different groups with respect to the length of their bonds to one another. In this case, the additional bonding foot provides additional mechanical stabilization of the bond connection, without negatively influencing the current distribution in the sense of the basic idea of the invention due to the arrangement on the isolated metallization. The third bond feet of the group are preferably arranged on a common metallization of the substrate, as a result of the connection with the substrate, among other things, an advantageous cooling. For example, they are arranged along an imaginary line running parallel to and spaced from one edge of the power semiconductor.
Bevorzugt weist die Lastpotenzialfläche zwei Segmente auf, die diametral gegenüberliegend neben dem Leistungshalbleiter angeordnet sind. Der Begriff „Segmente“ im Sinne der Erfindung meint Bereiche, die elektrisch isoliert zueinander angeordnet sind. Beispielsweise handelt es sich um Metallisierungen, deren elektrische Isolierung sich aus der Anordnung auf dem Substrat ergibt, eine sonstige elektrische Verbindung aber nicht ausgeschlossen ist. Eine elektrisch leitende Verbindung ist beispielsweise in einer Ausgestaltung über das Lastanschlussteil hergestellt, dass damit die Funktion der gemeinsamen Laststromab- bzw. -zufuhr von bzw. zu den Segmenten bewirkt. Beispielsweise sind die Segmente parallel beabstandet zu den gegenüberliegenden Kanten des Leistungshalbleiters angeordnet. Das Lastanschlussteil, das der elektrischen und mechanischen Verbindung mit externen Leiterenden und gegebenenfalls der Herausführung der elektrischen Verbindung aus einem Gehäuse des Leistungshalbleitermoduls dient, ist beispielsweise als spiegelsymmetrisch ausgebildeter Bügel ausgebildet.Preferably, the load potential surface has two segments, which are arranged diametrically opposite to the power semiconductor. The term "segments" in the sense of the invention means regions which are arranged electrically isolated from one another. For example, it is metallization whose electrical insulation results from the arrangement on the substrate, but a different electrical connection is not excluded. An electrically conductive connection is made, for example, in one embodiment via the load connection part that thus causes the function of the common Laststromab- or supply from or to the segments. For example, the segments are arranged parallel spaced from the opposite edges of the power semiconductor. The load connection part, which serves the electrical and mechanical connection with external conductor ends and optionally the lead-out of the electrical connection from a housing of the power semiconductor module, is designed, for example, as a mirror-symmetrically designed bracket.
Bevorzugt umfasst das erfindungsgemäße Leistungshalbleitermodul folglich wenigstens ein Anschlussteil, das als symmetrischer Bügel ausgebildet ist und dessen Bügelenden in Berührkontakt, bevorzugt Lötkontakt, mit den zwei Segmenten der Lastpotenzialfläche steht. Beispielsweise ist der Bügel ein Metallformteil, bevorzugt ein Metallformteil aus Kupfer oder einer Kupferlegierung.The power semiconductor module according to the invention therefore preferably comprises at least one connection part which is designed as a symmetrical bracket and whose strap ends are in contact contact, preferably solder contact, with the two segments of the load potential surface. For example, the bracket is a metal molding, preferably a metal molding of copper or a copper alloy.
Gemäß einer bevorzugten Ausführungsform sind die Bondverbindungen der Gruppen so angeordnet, dass sich bezüglich deren Anordnung eine Spiegelsymmetrie ergibt. Dabei soll nicht ausgeschlossen sein, dass neben den, den erfindungsgemäßen Gruppen zugehörigen Bondverbindungen auch Bondverbindungen vorgesehen sein können, die nicht dieser Symmetrie unterliegen, wie beispielsweise solche, die der Verbindung der Steueranschlüsse des Leistungshalbleiters mit zugehörigen Steuerpotenzialflächen dienen. Beispielsweise ist bei der zuvor beschriebenen, zwei diametral gegenüberliegende Segmente aufweisenden Ausführungsform eine Achsensymmetrie der Anordnung der zweiten Bondfüße und der ersten Bondfüße zwischen den Gruppen bezüglich einer mittig zwischen und parallel zu den Kanten des Leistungshalbleiters verlaufenden Symmetrieachse vorgesehen. According to a preferred embodiment, the bond connections of the groups are arranged such that a mirror symmetry results with respect to their arrangement. In this case, it should not be ruled out that, in addition to the bonds belonging to the groups according to the invention, it is also possible to provide bonds which are not subject to this symmetry, for example those which serve to connect the control terminals of the power semiconductor to associated control potential areas. For example, in the embodiment described above, having two diametrically opposite segments, an axial symmetry of the arrangement of the second bond feet and the first bond feet between the groups is provided with respect to an axis of symmetry extending centrally between and parallel to the edges of the power semiconductor.
Gemäß einer bevorzugten Ausgestaltung unterscheiden sich wenigstens zwei Gruppen in der Anzahl der zweiten Bondfüße pro Bondverbindung. Beispielsweise weist eine Gruppe zwei zweite Bondfüße pro Bondverbindung auf, während eine andere Gruppe drei zweite Bondfüße pro Bondverbindung aufweist. According to a preferred embodiment, at least two groups differ in the number of second bond feet per bond connection. For example, one group has two second bond feet per bond connection, while another group has three second bond feet per bond connection.
Gemäß einer bevorzugten Ausgestaltung ist vorgesehen, dass die Gruppe mit dem größten durch die zugehörigen Bondverbindungen zu überbrückendem Abstand zwischen zugehöriger Lastpotenzialfläche bzw. zugehörigem Lastpotenzialflächensegment und zugehörigem Kontaktflächenbereich bzw. Kontaktflächensegment die geringste Anzahl von zweiten Bondfüßen pro Bondverbindung aufweist. According to a preferred embodiment, it is provided that the group with the largest distance to be bridged by the associated bond connections between the associated load potential area or associated load potential area segment and associated contact surface area or contact area segment has the lowest number of second bond feet per bond connection.
Gemäß einer bevorzugten Ausgestaltung weist der Leistungshalbleiter eine Mindestkantenlänge im Bereich von 8,0 mm bis 50,0 mm, bevorzugt im Bereich von 9,0 bis 25,0 mm, noch bevorzugter im Bereich von 10,0 mm bis 20,0 mm auf.According to a preferred embodiment, the power semiconductor has a minimum edge length in the range of 8.0 mm to 50.0 mm, preferably in the range of 9.0 to 25.0 mm, more preferably in the range of 10.0 mm to 20.0 mm ,
Bevorzugt umfasst das Leistungshalbleitermodul ferner ein Gehäuse, beispielsweise ein Gehäuse aus Kunststoff, bevorzugt aus einem faserverstärkten Kunststoff, wie einem faserverstärkten Thermoplast. Bevorzugt ist das Gehäuse als Stülpgehäuse ausgebildet.Preferably, the power semiconductor module further comprises a housing, for example a housing made of plastic, preferably made of a fiber-reinforced plastic, such as a fiber-reinforced thermoplastic. Preferably, the housing is designed as Stülpgehäuse.
Gemäß einer bevorzugten Ausgestaltung umfasst das erfindungsgemäße Leistungshalbleitermodul genau zwei Leistungshalbleiter oder eine Anzahl von Leistungshalbleitern, die dem Vielfachen von zwei entspricht. Beispielsweise ist eine der Anzahl der Leistungshalbleiter entsprechende Anzahl von Substraten vorgesehen. Dabei sind die mit den Bondverbindungen verbundenen zwei Segmente der Lastpotenzialfläche des ersten Leistungshalbleiters benachbart zu zwei diametral gegenüberliegenden Kanten des ersten Leistungshalbleiters angeordnet und die mit den Bondverbindungen des zweiten Leistungshalbleiters verbundene, genau eine Lastpotenzialfläche des zweiten Leistungshalbleiters zwischen dem ersten und zweiten Leistungshalbleiter benachbart zu einer Kante des zweiten Leistungshalbleiters und einer der verbleibenden Kanten des ersten Leistungshalbleiters angeordnet. In einer Ausführungsform ist die Lastpotenzialfläche des zweiten Leistungshalbleiters durch eine Metallisierung des Substrat gebildet, die gleichzeitig in Berührkontakt mit dem ersten Leistungshalbleiter steht und/oder eine dem zweiten Leistungshalbleiter zugehörige weitere Lastpotenzialfläche ausbildet. Dadurch kann eine platzsparende Anordnung der Leistungshalbleiter samt zugehöriger Lastpotenzialflächen bei gleichzeitig gleichmäßiger Stromverteilung erreicht werden. Insbesondere ist so eine symmetrische Anordnung der Lastpotenzialflächen bzw. deren Segmente ermöglicht. Dies hat den Vorteil, dass die zur weiteren Verbindung mit externen Leitern, die beispielsweise außerhalb eines zum erfindungsgemäßen Leistungshalbleitermoduls gehörigen Gehäuses angeordnet sind, regelmäßig verwendeten Anschlussteile ebenfalls symmetrisch ausgelegt werden können, beispielsweise in Bügelform. Dies sorgt nicht nur für eine besonders gleichmäßige Stromverteilung sondern auch für eine vereinfachte Herstellung des erfindungsgemäßen Moduls.According to a preferred embodiment, the power semiconductor module according to the invention comprises exactly two power semiconductors or a number of power semiconductors which corresponds to the multiple of two. For example, a number of substrates corresponding to the number of power semiconductors is provided. In this case, the two segments of the load potential area of the first power semiconductor connected to the bond connections are arranged adjacent to two diametrically opposite edges of the first power semiconductor and the one power potential area of the second power semiconductor connected to the bond connections of the second power semiconductor is adjacent to one edge of the second power semiconductor and one of the remaining edges of the first power semiconductor. In one embodiment, the load potential area of the second power semiconductor is formed by a metallization of the substrate, which is simultaneously in touch contact with the first power semiconductor and / or forms a further load potential area associated with the second power semiconductor. Thereby For example, a space-saving arrangement of the power semiconductors together with associated load potential areas can be achieved while at the same time providing uniform power distribution. In particular, a symmetrical arrangement of the load potential areas or their segments is thus made possible. This has the advantage that the connecting parts which are regularly used for further connection to external conductors, which are arranged, for example, outside a housing belonging to the power semiconductor module according to the invention, can also be designed symmetrically, for example in bow form. This not only ensures a particularly uniform current distribution but also for a simplified production of the module according to the invention.
Die Leistungshalbleiter sind aus der Gruppe, umfassend Bipolartransistor, Thyristor, Diode ausgewählt. Bevorzugt handelt es sich bei genau zwei Leistungshalbleitern um eine Paarung unterschiedlicher Leistungshalbleiter. The power semiconductors are selected from the group comprising bipolar transistor, thyristor, diode. Exactly two power semiconductors are preferably a pairing of different power semiconductors.
Die Erfindung betrifft ferner eine Anordnung aus einem Kühlkörper und einem Leistungshalbleitermodul in einer der zuvor beschriebenen Ausführungsformen und mit den entsprechenden zuvor erwähnten technischen Vorzügen.The invention further relates to an arrangement of a heat sink and a power semiconductor module in one of the previously described embodiments and with the corresponding aforementioned technical advantages.
Die Erfindung wird anhand der nachfolgenden Figuren näher erläutert. Die Figuren sind dabei nur beispielhaft zu verstehen und stellen lediglich eine bevorzugte Ausführungsvariante dar. Es zeigen:The invention will be explained in more detail with reference to the following figures. The figures are to be understood only as an example and represent only a preferred embodiment. It shows:
Die
Das Leistungshalbleitermodul
Die Segmente
Die erfindungsgemäße Ausgestaltung betrifft auch den zweiten Leistungshalbleiter
Das in den
Die erfindungsgemäße Ausgestaltung betrifft auch den zweiten Leistungshalbleiter
Die Bondverbindungen der zwei Gruppen unterscheiden sich dahingehend ferner, dass deren erste Bondfüße
Anhand der
ZITATE ENTHALTEN IN DER BESCHREIBUNG QUOTES INCLUDE IN THE DESCRIPTION
Diese Liste der vom Anmelder aufgeführten Dokumente wurde automatisiert erzeugt und ist ausschließlich zur besseren Information des Lesers aufgenommen. Die Liste ist nicht Bestandteil der deutschen Patent- bzw. Gebrauchsmusteranmeldung. Das DPMA übernimmt keinerlei Haftung für etwaige Fehler oder Auslassungen.This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.
Zitierte PatentliteraturCited patent literature
- DE 19549011 A1 [0006] DE 19549011 A1 [0006]
- DE 10204157 A1 [0009] DE 10204157 A1 [0009]
Claims (15)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102015103667.3A DE102015103667A1 (en) | 2015-03-12 | 2015-03-12 | Power semiconductor module with improved bond connection structure |
EP16708666.9A EP3268989A1 (en) | 2015-03-12 | 2016-03-08 | Power semiconductor module with improved bonding connection structure |
CN201680009758.9A CN107210281B (en) | 2015-03-12 | 2016-03-08 | Power semiconductor module with improved bonding connection structure |
JP2017548171A JP6479207B2 (en) | 2015-03-12 | 2016-03-08 | Power semiconductor module with improved bonding connection structure |
PCT/EP2016/054894 WO2016142372A1 (en) | 2015-03-12 | 2016-03-08 | Power semiconductor module with improved bonding connection structure |
RU2017124848A RU2676190C1 (en) | 2015-03-12 | 2016-03-08 | Power semiconductor module with improved structure of contact connectors for welding |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102015103667.3A DE102015103667A1 (en) | 2015-03-12 | 2015-03-12 | Power semiconductor module with improved bond connection structure |
Publications (1)
Publication Number | Publication Date |
---|---|
DE102015103667A1 true DE102015103667A1 (en) | 2016-09-15 |
Family
ID=55486674
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE102015103667.3A Pending DE102015103667A1 (en) | 2015-03-12 | 2015-03-12 | Power semiconductor module with improved bond connection structure |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP3268989A1 (en) |
JP (1) | JP6479207B2 (en) |
CN (1) | CN107210281B (en) |
DE (1) | DE102015103667A1 (en) |
RU (1) | RU2676190C1 (en) |
WO (1) | WO2016142372A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116130469A (en) * | 2023-04-19 | 2023-05-16 | 烟台台芯电子科技有限公司 | Power semiconductor device |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0878619A (en) * | 1994-09-07 | 1996-03-22 | Hitachi Ltd | Semiconductor device for electric power |
DE19549011A1 (en) | 1995-12-28 | 1997-07-03 | Eupec Gmbh & Co Kg | Power semiconductor module with parallel IGBT chips |
DE10204157A1 (en) | 2002-02-01 | 2003-08-28 | Semikron Elektronik Gmbh | Wire bonding connection arrangement for power semiconducting components has variable separation of individual bonding wires and of individual groups in connections with a number of sub-groups |
DE102005039940B4 (en) * | 2005-08-24 | 2009-07-02 | Semikron Elektronik Gmbh & Co. Kg | Power semiconductor module with bond connection of the power semiconductor components |
DE102010001668A1 (en) * | 2009-02-09 | 2010-11-25 | Infineon Technologies Ag | Power transistor module with integrated busbar |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6054765A (en) * | 1998-04-27 | 2000-04-25 | Delco Electronics Corporation | Parallel dual switch module |
JP2000323647A (en) * | 1999-05-12 | 2000-11-24 | Toshiba Corp | Module semiconductor device and manufacture thereof |
DE10011633A1 (en) * | 2000-03-10 | 2001-09-20 | Eupec Gmbh & Co Kg | Arrangement for connecting power semiconductor chips in modules |
JP3701228B2 (en) * | 2001-11-01 | 2005-09-28 | 三菱電機株式会社 | Semiconductor device |
DE10204200A1 (en) * | 2002-02-01 | 2003-08-21 | Conti Temic Microelectronic | power module |
JP2006066704A (en) * | 2004-08-27 | 2006-03-09 | Toyota Motor Corp | Semiconductor device |
JP5291864B2 (en) * | 2006-02-21 | 2013-09-18 | ルネサスエレクトロニクス株式会社 | Manufacturing method of semiconductor device for DC / DC converter and semiconductor device for DC / DC converter |
JP5707302B2 (en) * | 2011-11-02 | 2015-04-30 | 株式会社 日立パワーデバイス | Power semiconductor module |
JP5991045B2 (en) * | 2012-06-28 | 2016-09-14 | 住友電気工業株式会社 | Semiconductor device |
EP2802007A1 (en) * | 2013-05-08 | 2014-11-12 | ABB Technology AG | Power semiconductor module |
-
2015
- 2015-03-12 DE DE102015103667.3A patent/DE102015103667A1/en active Pending
-
2016
- 2016-03-08 WO PCT/EP2016/054894 patent/WO2016142372A1/en active Application Filing
- 2016-03-08 EP EP16708666.9A patent/EP3268989A1/en active Pending
- 2016-03-08 CN CN201680009758.9A patent/CN107210281B/en active Active
- 2016-03-08 JP JP2017548171A patent/JP6479207B2/en active Active
- 2016-03-08 RU RU2017124848A patent/RU2676190C1/en active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0878619A (en) * | 1994-09-07 | 1996-03-22 | Hitachi Ltd | Semiconductor device for electric power |
DE19549011A1 (en) | 1995-12-28 | 1997-07-03 | Eupec Gmbh & Co Kg | Power semiconductor module with parallel IGBT chips |
DE10204157A1 (en) | 2002-02-01 | 2003-08-28 | Semikron Elektronik Gmbh | Wire bonding connection arrangement for power semiconducting components has variable separation of individual bonding wires and of individual groups in connections with a number of sub-groups |
DE102005039940B4 (en) * | 2005-08-24 | 2009-07-02 | Semikron Elektronik Gmbh & Co. Kg | Power semiconductor module with bond connection of the power semiconductor components |
DE102010001668A1 (en) * | 2009-02-09 | 2010-11-25 | Infineon Technologies Ag | Power transistor module with integrated busbar |
Also Published As
Publication number | Publication date |
---|---|
RU2676190C1 (en) | 2018-12-26 |
JP6479207B2 (en) | 2019-03-06 |
WO2016142372A1 (en) | 2016-09-15 |
CN107210281B (en) | 2020-01-31 |
CN107210281A (en) | 2017-09-26 |
JP2018508126A (en) | 2018-03-22 |
EP3268989A1 (en) | 2018-01-17 |
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