DE102012207470B3 - Method for manufacturing semiconductor module arrangement i.e. converter, involves cooling body such that recess is reduced and composite is developed between semiconductor module and body, where sides exhibit surface of preset size - Google Patents
Method for manufacturing semiconductor module arrangement i.e. converter, involves cooling body such that recess is reduced and composite is developed between semiconductor module and body, where sides exhibit surface of preset size Download PDFInfo
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- DE102012207470B3 DE102012207470B3 DE201210207470 DE102012207470A DE102012207470B3 DE 102012207470 B3 DE102012207470 B3 DE 102012207470B3 DE 201210207470 DE201210207470 DE 201210207470 DE 102012207470 A DE102012207470 A DE 102012207470A DE 102012207470 B3 DE102012207470 B3 DE 102012207470B3
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- semiconductor module
- contact surface
- heat sink
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- recess
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/11—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/117—Stacked arrangements of devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
- H01L2224/8382—Diffusion bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8384—Sintering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1301—Thyristor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
Wenn Halbleitermodule bei hoher Leistung betrieben werden, ist es erforderlich, die auftretende Verlustwärme effizient abzuleiten, um eine Überhitzung des Moduls zu vermeiden.When semiconductor modules are operated at high power, it is necessary to dissipate the heat loss efficiently, in order to avoid overheating of the module.
Aus
Die
Aus der
Die Aufgabe der vorliegenden Erfindung besteht darin, eine Halbleitermodulanordnung mit einem Halbleitermodul bereit zu stellen, die sich auf einfache Weise herstellen lässt und die eine effiziente Kühlung des Halbleitermoduls ermöglicht.The object of the present invention is to provide a semiconductor module arrangement with a semiconductor module which can be produced in a simple manner and which enables efficient cooling of the semiconductor module.
Diese Aufgabe wird durch ein Verfahren zur Herstellung einer Halbleitermodulanordnung gemäß Patentanspruch 1 gelöst. Ausgestaltungen und Weiterbildungen der Erfindung sind Gegenstand von Unteransprüchen.This object is achieved by a method for producing a semiconductor module arrangement according to
Die vorliegende Erfindung sieht vor, ein Halbleitermodul in eine Aussparung eines Kühlkörpers einzusetzen und dadurch das Halbleitermodul von wenigstens zwei Seiten zu kühlen. Das Halbleitermodul besitzt ein Gehäuse, sowie eine erste Seite und eine der ersten Seite entgegengesetzte zweite Seite, die jeweils eine Fläche von wenigstens 4 cm2 aufweisen. Die erste Seite und die zweite Seite bilden einander entgegengesetzte Außenseiten des Halbleitermoduls. Der Kühlkörper weist eine Aussparung auf, die durch eine erste Wärmekontaktfläche und durch eine zweite Wärmekontaktfläche des Kühlkörpers begrenzt ist. Die Aussparung dient zur Aufnahme des Halbleitermoduls. Sie ist so dimensioniert, dass sie bei gleicher Temperatur von Kühlkörper und Modul immer ein Untermaß besitzt, so dass das Halbleitermodul nicht in die Aussparung eingesetzt werden kann. Durch Erhitzen des Kühlkörpers wird die Aussparung vergrößert, so dass das Halbleitermodul in die vergrößerte Aussparung einsetzbar ist. Das Einsetzen des Halbleitermoduls in die vergrößerte Aussparung erfolgt so, dass die erste Seite der ersten Wärmekontaktfläche und die zweite Seite der zweiten Wärmekontaktfläche zugewandt ist. Nach dem Einsetzen wird der Kühlkörper – bei eingesetztem Halbleitermodul – abgekühlt, so dass sich die Aussparung wieder verkleinert und ein Verbund zwischen dem Halbleitermodul und dem Kühlkörper entsteht.The present invention provides for inserting a semiconductor module into a recess of a heat sink and thereby cooling the semiconductor module from at least two sides. The semiconductor module has a housing, as well as a first side and a second side opposite the first side, each having an area of at least 4 cm 2 . The first side and the second side form opposite outer sides of the semiconductor module. The heat sink has a recess which is delimited by a first heat contact surface and by a second heat contact surface of the heat sink. The recess serves to receive the semiconductor module. It is dimensioned so that it always has an undersize at the same temperature of the heat sink and module, so that the semiconductor module can not be inserted into the recess. By heating the heat sink, the recess is enlarged, so that the semiconductor module can be inserted into the enlarged recess. The insertion of the semiconductor module into the enlarged recess takes place such that the first side of the first heat contact surface and the second side of the second heat contact surface faces. After insertion, the heat sink is cooled - when the semiconductor module is used - so that the recess is again reduced in size and a bond is formed between the semiconductor module and the heat sink.
Durch das Abkühlen entsteht ein sehr guter thermischer Kontakt sowohl zwischen der ersten Seite und der ersten Wärmekontaktfläche als auch zwischen der zweiten Seite und der zweiten Wärmekontaktfläche. Das bedeutet, dass die Entwärmung des Halbleitermoduls sehr effizient über die erste und zweite Seite erfolgt. Daher ist es für eine besonders gute Wärmeableitung gemäß einer Option der Erfindung vorteilhaft, wenn die erste Seite und die zweite Seite durch die beiden flächenmäßig größten Seiten des Halbleitermoduls gebildet sind.Cooling produces a very good thermal contact both between the first side and the first heat contact surface and between the second side and the second heat contact surface. This means that the cooling of the semiconductor module takes place very efficiently over the first and second side. Therefore, for particularly good heat dissipation according to an option of the invention, it is advantageous if the first side and the second side are formed by the two largest sides of the semiconductor module in terms of area.
Die Erfindung wird nachfolgend anhand von Ausführungsbeispielen der Erfindung unter Bezugnahme auf die beigefügten Figuren näher erläutert. Es zeigen:The invention will be explained in more detail below with reference to embodiments of the invention with reference to the accompanying figures. Show it:
Als Materialien zur Herstellung des Formteils
Weiterhin weist der Kühlkörper
Diese beiden Seiten
Das in
Bei dem in
Bei dem Substrat
Im Fall eines isolierenden Substrates
Um den oder die Halbleiterchips
Bei Raumtemperatur besitzt das Halbleitermodul
Nach dem Abkühlen entsteht zwischen dem Kühlkörper
Um bei derart hohen Drücken zu vermeiden, dass beispielsweise ein Verbindungsmittel
Da es mit dem erläuterten Verfahren schwierig ist, eine Wärmeleitpaste gleichmäßig verteilt zwischen die erste Seite
Optional kann es jedoch vorgesehen sein, den Kühlkörper
Optional kann eine duktile Ausgleichsschicht
Die Dicke d29 einer derartigen Ausgleichsschicht
Da die Verbiegbarkeit des Kühlkörpers
Anstelle oder ergänzend zu einer Vorkrümmung der ersten und/oder zweiten Wärmekontaktfläche
Gemäß einem weiteren, in
Bei den vorangehend gezeigten Halbleitermodulen werden die erste Seite
Alternativ dazu kann, wie in
Auf entsprechende Weise kann optional auch die Oberfläche der ersten Seite
Wie beispielhaft anhand von
Wie anhand von
Bei einem jeden der Halbleitermodule
Die Halbleitermodule
Claims (13)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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DE201210207470 DE102012207470B3 (en) | 2012-05-04 | 2012-05-04 | Method for manufacturing semiconductor module arrangement i.e. converter, involves cooling body such that recess is reduced and composite is developed between semiconductor module and body, where sides exhibit surface of preset size |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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DE201210207470 DE102012207470B3 (en) | 2012-05-04 | 2012-05-04 | Method for manufacturing semiconductor module arrangement i.e. converter, involves cooling body such that recess is reduced and composite is developed between semiconductor module and body, where sides exhibit surface of preset size |
Publications (1)
Publication Number | Publication Date |
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DE102012207470B3 true DE102012207470B3 (en) | 2013-10-10 |
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DE201210207470 Active DE102012207470B3 (en) | 2012-05-04 | 2012-05-04 | Method for manufacturing semiconductor module arrangement i.e. converter, involves cooling body such that recess is reduced and composite is developed between semiconductor module and body, where sides exhibit surface of preset size |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102015115133B3 (en) * | 2015-09-09 | 2016-11-03 | Infineon Technologies Ag | Method for connecting a heat sink with at least one circuit carrier by shrinking |
CN107248506A (en) * | 2017-05-29 | 2017-10-13 | 苏州固特斯电子科技有限公司 | A kind of cassette pipe radiator structure |
DE102016223889A1 (en) * | 2016-12-01 | 2018-06-07 | Zf Friedrichshafen Ag | Stackable electronics module, inverter and automotive powertrain |
WO2019037904A1 (en) * | 2017-08-21 | 2019-02-28 | Zf Friedrichshafen Ag | Power module with cooling plates |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1035782B (en) * | 1956-07-04 | 1958-08-07 | Philips Patentverwaltung | Method for fastening semiconductor arrangements on a carrier with good thermal conductivity |
DE10132455A1 (en) * | 2001-07-04 | 2003-01-30 | Bosch Gmbh Robert | Electrical arrangement and procedure |
DE102004041417A1 (en) * | 2004-08-26 | 2006-03-02 | eupec Europäische Gesellschaft für Leistungshalbleiter mbH | Electrical arrangement for microelectronics has component insulated from substrate by dielectric layer on conductive substrate |
DE102009040835A1 (en) * | 2009-09-09 | 2011-03-10 | Jenoptik Laserdiode Gmbh | A method of thermally contacting opposing electrical terminals of a semiconductor device array |
-
2012
- 2012-05-04 DE DE201210207470 patent/DE102012207470B3/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1035782B (en) * | 1956-07-04 | 1958-08-07 | Philips Patentverwaltung | Method for fastening semiconductor arrangements on a carrier with good thermal conductivity |
DE10132455A1 (en) * | 2001-07-04 | 2003-01-30 | Bosch Gmbh Robert | Electrical arrangement and procedure |
DE102004041417A1 (en) * | 2004-08-26 | 2006-03-02 | eupec Europäische Gesellschaft für Leistungshalbleiter mbH | Electrical arrangement for microelectronics has component insulated from substrate by dielectric layer on conductive substrate |
DE102009040835A1 (en) * | 2009-09-09 | 2011-03-10 | Jenoptik Laserdiode Gmbh | A method of thermally contacting opposing electrical terminals of a semiconductor device array |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102015115133B3 (en) * | 2015-09-09 | 2016-11-03 | Infineon Technologies Ag | Method for connecting a heat sink with at least one circuit carrier by shrinking |
DE102016223889A1 (en) * | 2016-12-01 | 2018-06-07 | Zf Friedrichshafen Ag | Stackable electronics module, inverter and automotive powertrain |
CN107248506A (en) * | 2017-05-29 | 2017-10-13 | 苏州固特斯电子科技有限公司 | A kind of cassette pipe radiator structure |
WO2019037904A1 (en) * | 2017-08-21 | 2019-02-28 | Zf Friedrichshafen Ag | Power module with cooling plates |
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