CN2922118Y - Electrostatic chuck used for chip clamping - Google Patents

Electrostatic chuck used for chip clamping Download PDF

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Publication number
CN2922118Y
CN2922118Y CN 200620113049 CN200620113049U CN2922118Y CN 2922118 Y CN2922118 Y CN 2922118Y CN 200620113049 CN200620113049 CN 200620113049 CN 200620113049 U CN200620113049 U CN 200620113049U CN 2922118 Y CN2922118 Y CN 2922118Y
Authority
CN
China
Prior art keywords
sub
sucker
electrostatic chuck
electrode layer
pedestal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 200620113049
Other languages
Chinese (zh)
Inventor
彭立波
郭健辉
易文杰
许波涛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Zhongkexin Electronic Equipment Co Ltd
Original Assignee
Beijing Zhongkexin Electronic Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Zhongkexin Electronic Equipment Co Ltd filed Critical Beijing Zhongkexin Electronic Equipment Co Ltd
Priority to CN 200620113049 priority Critical patent/CN2922118Y/en
Application granted granted Critical
Publication of CN2922118Y publication Critical patent/CN2922118Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Jigs For Machine Tools (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

The utility model discloses an electrostatic chuck used for chip clamping, which comprises a base and sub-absorbing disks. The base has conduction through holes and the sub-absorbing disks are arranged on the base. Under the sub-absorbing disks are the conduction through holes of the base. The sub-absorbing disk comprises an insulation layer, an electrode layer and a thin insulation layer. The electrode layer is imbedded in a concave slot of the insulation layer and the thin insulation layer sticks to the electrode layer. The utility model realizes the absorption of chip electrostatic via the array of a plurality of sub-absorbing disks, which has reliable absorption and improved heat dissipation performance.

Description

A kind of electrostatic chuck that is used for wafer holder
Technical field
The utility model relates to a kind of electrostatic chuck, relates in particular to a kind of electrostatic chuck that is used for wafer holder.
Background technology
Electrostatic chuck is used widely in semiconductor equipments such as ion implantor at present, adopts the mode of Electrostatic Absorption that wafer is adsorbed.Because there be not the mechanical movement of mechanical chuck in clamping in Electrostatic Absorption, reduced because the various pollutions that wafer holder is brought, Electrostatic Absorption is that the wafer large tracts of land is evenly stressed in addition, it is a kind of flexible clamping, do not have rigid impact and collision in the mechanical grip, reduced the fragment rate of wafer holder.
Ion implantor is very high to the performance requirement of electrostatic chuck, if electrostatic chuck can not effectively be realized wafer holder, wafer will break away from electrostatic chuck, causes fragment and shutdown loss, and this will directly have influence on the reliability index of entire equipment processing of wafers.
Summary of the invention
At above-mentioned situation, the utility model provides a kind of novel electrostatic chuck that is used for wafer holder, by adopting how sub-sucker array way, realize chip static electricity absorption, and adsorption reliability, heat dispersion improves.
The utility model is achieved through the following technical solutions: a kind of electrostatic chuck that is used for wafer holder, comprise pedestal, and sub-sucker wherein has conductive through hole on the pedestal, and sub-sucker is installed on the pedestal, and there is the conductive through hole of pedestal sub-sucker below.
Described sub-sucker comprises insulating barrier, electrode layer, and thin dielectric layer, electrode layer are inlaid in the groove of insulating barrier, and thin dielectric layer is bonded on the electrode layer.
Described sub-sucker is 3, and each sub-sucker has 6 insulating barriers respectively, 6 cube electrode layers, 6 thin dielectric layers.
Main feature of the present utility model is:
1. adopt the multi-sucker structure, had 3 or a plurality of sub-sucker;
2. the direct contact wafer of seat surface between the sub-sucker improves radiating efficiency.
Description of drawings
Fig. 1 is a vertical view of the present utility model.
Fig. 2 is an A-A profile of the present utility model.
Fig. 3 is an exploded view of the present utility model.
Wherein:
The 1-pedestal
The 2-insulating barrier
The 3-electrode layer
The 4-thin dielectric layer
5-sucker
The 6-conductive through hole
Embodiment
Below in conjunction with the drawings and specific embodiments the utility model is described further, but not as to qualification of the present utility model.
As Fig. 1~shown in Figure 3, pedestal 1 is used to install the sub-sucker 5 of array, and sub-sucker 5 comprises insulating barrier 2, electrode layer 3, thin dielectric layer 4.Be useful on the groove that sub-sucker 5 is installed on the pedestal 1.Also has conductive through hole 6 on the pedestal 1.Pedestal 1 is the main body of electrostatic chuck, and the heat conduction to wafer cooling is finished in the installation of carrying insulating barrier 2, electrode layer 3 and thin dielectric layer 4 simultaneously, generally adopts easily processing, and the material of good heat conductivity is as aluminium etc.
Insulating barrier 2 has 18,5 six in each sub-sucker, and the bottom surface is fixed to pedestal 1, is useful on the groove of installing electrodes layer 3 above, and the conductive through hole 6 on the corresponding pedestal 1 is designed in the below of electrode layer 3.Insulating barrier 2 is finished the insulation between electrode layer 3 and the pedestal 1, requires the insulation property height, can adopt ceramic material.
Electrode layer 3 is electrodes of Electrostatic Absorption, is installed in the groove of insulating barrier 2, and its upper surface is concordant with the boss face of insulating barrier 2.Its upper surface is again by thin dielectric layer 4 and the insulation of wafer (not shown).Produce static during energising with the absorption silicon chip.General easy processing electric conducting material gets final product.
Thin dielectric layer 4 is bonded on the electrode layer 3, is between electrode layer 3 and the wafer (not shown), as insulation.Absorption affinity and electrostatic potential design that its thickness is required according to electrostatic chuck because thickness is restricted, require to have very high high pressure resistant insulation performance, are the critical materials of electrostatic chuck.Can adopt spraying insulating material or bonding high insulation film to realize.
The novel specific embodiment of the present invention elaborates content of the present utility model.For persons skilled in the art, any conspicuous change of under the prerequisite that does not deviate from the utility model spirit it being done all constitutes the infringement to the utility model patent, with corresponding legal responsibilities.

Claims (3)

1. electrostatic chuck that is used for wafer holder, it is characterized in that: comprise pedestal, sub-sucker wherein has conductive through hole on the pedestal, and sub-sucker is installed on the pedestal, and there is the conductive through hole of pedestal sub-sucker below.
2. the electrostatic chuck that is used for wafer holder according to claim 1 is characterized in that: sub-sucker comprises insulating barrier, electrode layer, and thin dielectric layer, electrode layer are inlaid in the groove of insulating barrier, and thin dielectric layer is bonded on the electrode layer.
3. the electrostatic chuck that is used for wafer holder according to claim 2 is characterized in that: described sub-sucker is 3, and each sub-sucker has 6 insulating barriers respectively, 6 cube electrode layers, 6 thin dielectric layers.
CN 200620113049 2006-04-24 2006-04-24 Electrostatic chuck used for chip clamping Expired - Fee Related CN2922118Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200620113049 CN2922118Y (en) 2006-04-24 2006-04-24 Electrostatic chuck used for chip clamping

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200620113049 CN2922118Y (en) 2006-04-24 2006-04-24 Electrostatic chuck used for chip clamping

Publications (1)

Publication Number Publication Date
CN2922118Y true CN2922118Y (en) 2007-07-11

Family

ID=38254591

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200620113049 Expired - Fee Related CN2922118Y (en) 2006-04-24 2006-04-24 Electrostatic chuck used for chip clamping

Country Status (1)

Country Link
CN (1) CN2922118Y (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103794539A (en) * 2013-09-12 2014-05-14 北京中科信电子装备有限公司 Process for electrostatic sucking plate processing
CN108476006A (en) * 2015-11-02 2018-08-31 部件再设计股份有限公司 The electrostatic chuck and its manufacturing method being clamped in being processed for high temperature semiconductors

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103794539A (en) * 2013-09-12 2014-05-14 北京中科信电子装备有限公司 Process for electrostatic sucking plate processing
CN108476006A (en) * 2015-11-02 2018-08-31 部件再设计股份有限公司 The electrostatic chuck and its manufacturing method being clamped in being processed for high temperature semiconductors
CN108476006B (en) * 2015-11-02 2022-04-15 沃特洛电气制造公司 Electrostatic chuck for clamping in high temperature semiconductor processing and method of manufacturing the same

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee