CN2838185Y - Processing unit for improving video image sharpness point-by-point - Google Patents
Processing unit for improving video image sharpness point-by-point Download PDFInfo
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- CN2838185Y CN2838185Y CN 200520045742 CN200520045742U CN2838185Y CN 2838185 Y CN2838185 Y CN 2838185Y CN 200520045742 CN200520045742 CN 200520045742 CN 200520045742 U CN200520045742 U CN 200520045742U CN 2838185 Y CN2838185 Y CN 2838185Y
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Abstract
The utility model provides a processing device for improving video image clearness in a point-by-point type. The utility model comprises a luminance input circuit, a high-frequency and low-frequency decomposing circuit, a high-frequency component identifying processing module, a high-frequency and low-frequency merging circuit and a luminance output circuit which are orderly connected by circuits, wherein the high-frequency component identifying processing module comprises a noise removing circuit, a high-frequency reinforcing circuit and a K-value calculating circuit which are connected by circuits. The high frequency component is identified and classified into small-amplitude high-frequency noises, discontinuous noise points, details and large edges, and corresponding treatment is carried out to obtain the new high frequency component. The processing device for improving video image clearness in a point-by-point type provided by the utility model has the advantages of simplicity and easy operation, and can inhibit possible noises and process the reinforcing degree of the details and the edges in a point-by-point mode. The utility model increases the contour and the details of an image, and is soft.
Description
Technical field
The utility model relates to the processing unit that a kind of pointwise improves video image clarity, specifically, relates to a kind of television equipment that is applied to, and can improve the device of image definition according to the local characteristics pointwise of vision signal.
Background technology
What is called promotes clearness and can be described as sharpening, and purpose is to make fuzzy image become more clear.Why fuzzy video image is, because lost high fdrequency component in signals transmission, from the frequency spectrum angle analysis, image blurring essence is that its high fdrequency component is attenuated, thereby can come picture rich in detail by high-pass filtering exactly.The basic thought that promotes clearness is exactly the radio-frequency component that reasonably improves image.Enhancing definition algorithm commonly used generally has two kinds, and the differential method and high-pass filtering method are respectively the Processing Algorithm of spatial domain and frequency domain.The spatial domain method is more representational to be had, Laplce's algorithm, and the SOBEL algorithm, methods such as unsharp masking, frequency domain is representational small wave converting method.These methods can both effectively improve the definition of image, but individual common characteristic is arranged, and have also amplified noise in the time of enhancing, also occur tangible white edge sometimes.
Application number provides a kind of method and apparatus that strengthens image definition for 03110774.5 Chinese patent, it is copied into two groups with one group of image, one group is carried out ladder/edge and strengthens, one group is carried out structure and strengthens, be combined into the image that definition improves with two groups by certain way then, this method need be extracted the above video image of two width of cloth, detects dynamic and non-dynamic area then, obtain multiple series of images combination, the computing more complicated of getting up; Application number is that 01800628 Chinese patent has proposed a kind of circuit and method that is applied to the enhancing image of television equipment, it has improved the higher shortcoming of executory cost in the prior art, under the situation that does not reduce quality of output signals, reduced cost, remove low pass filter, and provide at least one adjustment unit to adjust high frequency enhancing degree; The common feature of these technical schemes is realization complexity, has ignored The noise, and does not have according to the characteristics processing of the interior pixel of neighborhood on every side with carrying out pointwise.
The utility model content
The purpose of this utility model is to provide a kind of pointwise to improve the processing unit of video image clarity, and it can suppress possible noise, and the enhancing degree at details and edge is handled in pointwise, when making picture strengthen profile and details, and softer exquisiteness.
For achieving the above object, the pointwise that the utility model provides improves the processing unit of video image clarity, and it comprises:
One brightness input circuit, its input inputted video image, and calculate the luminance graph of this video image, i.e. the monochrome information of all pixels, and output;
One low-and high-frequency decomposition circuit, its input connects the output of described brightness input circuit, and image brightness picture is carried out low-and high-frequency decompose, and difference output image high fdrequency component and image low frequency component;
One high fdrequency component recognition processing module, it comprises the squelch circuit that connects by circuit, treble boosting circuit and K value computing circuit; High fdrequency component is discerned, be categorized as small size high-frequency noise, discontinuous noise spot, details and big edge four big classes, and handle accordingly, obtain new high fdrequency component;
The input of described squelch circuit connects the output of described low-and high-frequency decomposition circuit, receives the image high fdrequency component of its output; This squelch circuit identifies small size high-frequency noise and discontinuous noise spot, and carries out denoising, exports high fdrequency component after the denoising more respectively to K value computing circuit and treble boosting circuit;
The input of described K value computing circuit connects the output of described squelch circuit, according to the different classified calculating pointwise reinforcing coefficient K values of high fdrequency component, and exports the K value tremendously high frequency intensifier circuit that this calculates;
Described treble boosting circuit multiplies each other the high fdrequency component and the pointwise reinforcing coefficient K value corresponding with it of input, obtains the high fdrequency component after this pixel strengthens;
One low-and high-frequency merges circuit, and its input connects the output of described treble boosting circuit, the output of low-and high-frequency decomposition circuit and the output of brightness input circuit; The enhancing high fdrequency component and the addition of image low frequency component of input are merged the image brightness picture after being enhanced;
One brightness output circuit, its input connect the output that described low-and high-frequency merges circuit, the image brightness picture after strengthening changed back and the identical form of importing of video image, and output.
Advantage of the present utility model is can pointwise ground analyzing and processing according to the content of video image, is at first distinguishing the character of pending pixel according to high fdrequency component, to belong to noise, still belongs to details; little edge; big edge, super large edge? then according to different attribute, handle to some extent; as belong to noise; then remove, as belong to details or edge, then carry out enhancing in various degree.The device that the utility model provides can suppress noise, strengthens the expressive ability of image detail, controls crossing of big edge and strengthens, and add white edge control.Video pictures after said apparatus strengthens, more clear, softer, there is not the appearance of white edge.
Description of drawings
The pointwise that Fig. 1 provides for the utility model improves the circuit structure diagram of the processing unit of video image clarity.
The pointwise that Fig. 2 provides for the utility model improves the structure chart of squelch circuit of the processing unit of video image clarity.
The pointwise that Fig. 3 provides for the utility model improves the K value computing circuit structure figure of the processing unit of video image clarity.
The pointwise that Fig. 4 provides for the utility model improves the first computing circuit structure figure in the K value computing circuit of processing unit of video image clarity.
The pointwise that Fig. 5 provides for the utility model improves the second computing circuit structure figure in the K value computing circuit of processing unit of video image clarity.
The pointwise that Fig. 6 provides for the utility model improves the 3rd computing circuit structure figure in the K value computing circuit of processing unit of video image clarity.
The pointwise that Fig. 7 provides for the utility model improves the 4th computing circuit structure figure in the K value computing circuit of processing unit of video image clarity.
The low-and high-frequency that the pointwise that Fig. 8 provides for the utility model improves the processing unit of video image clarity merges circuit structure diagram.
Embodiment
Following according to Fig. 1～Fig. 8, specify a better embodiment of the present utility model.
As shown in Figure 1, the pointwise that provides for the utility model improves the circuit structure diagram of the processing unit of video image clarity, and it comprises:
One brightness input circuit 1, its input inputted video image, and calculate this video image luminance graph f (i, j), i.e. the monochrome information of all pixels, and output;
One low-and high-frequency decomposition circuit 2, its input connects the output of described brightness input circuit 1, and (i j) carries out low-and high-frequency and decomposes, and difference output image high fdrequency component f to image brightness picture f
H(i is j) with image low frequency component f
L(i, j);
One high fdrequency component recognition processing module, it comprises the squelch circuit 31 that connects by circuit, K value computing circuit 32 and treble boosting circuit 33; High fdrequency component is discerned, be categorized as small size high-frequency noise, discontinuous noise spot, details and big edge four big classes, and handle accordingly, obtain new high fdrequency component;
The input of described squelch circuit 31 connects the output of described low-and high-frequency decomposition circuit 2, receives the image high fdrequency component of its output; This squelch circuit 31 identifies small size high-frequency noise and discontinuous noise spot, and carries out denoising, exports high fdrequency component after the denoising more respectively to K value computing circuit 32 and treble boosting circuit 33;
The input of described K value computing circuit 32 connects the output of described squelch circuit 31, according to the different classified calculating pointwise reinforcing coefficient K values of high fdrequency component, and exports the K value tremendously high frequency intensifier circuit that this calculates;
Described treble boosting circuit 33 multiplies each other the corresponding pointwise reinforcing coefficient K value of the output output of the high fdrequency component of squelch circuit 31 outputs output and K value computing circuit 32, obtains the high fdrequency component after this pixel enhancing;
One low-and high-frequency merges circuit 4, and its input connects output and the output of low-and high-frequency decomposition circuit 2 and the output of brightness input circuit 1 of described treble boosting circuit 33; The enhancing high fdrequency component and the addition of image low frequency component of input are merged the image brightness picture after being enhanced;
One brightness output circuit 5, its input connect the output that described low-and high-frequency merges circuit 4, the image brightness picture after strengthening changed back and the identical form of importing of video image, and output.
(i j) can be Y in the YUV model to the image brightness f that described brightness input circuit 1 calculates, or the V in the HSV model, or the I in the HIS model, or the brightness derived of other rational brightness-formula.
Described low-and high-frequency decomposition circuit 2 comprises low-frequency filter and the subtracter that circuit connects, and uses low-frequency filter to leach image low frequency component f
L(i, j), and by subtracter with image brightness picture f (i, j) and low frequency component f
L(i j) subtracts each other, and obtains image high fdrequency component f
H(i, j), i.e. f
H(i, j)=f (i, j)-f
L(i, j).
Described low-and high-frequency decomposition circuit 2 also can comprise high frequency filter and the subtracter that circuit connects, and uses high frequency filter to leach image high fdrequency component f
H(i, j), and by subtracter with image brightness picture f (i, j) and high fdrequency component f
H(i j) subtracts each other, and obtains image low frequency component f
L(i, j), i.e. f
L(i, j)=f
L(i, j)-f
H(i, j).
As shown in Figure 2, described squelch circuit 31 comprises small size high-frequency noise identification treatment circuit and non-boundary point Noise Identification treatment circuit;
Described small size high-frequency noise identification treatment circuit is gone into the output that end connects low-and high-frequency decomposition circuit 2, it is to being that the high fdrequency component of all pixels in the statistical mask of N*N at center judges that one by one this comparator 311a sets in advance threshold value T with the current pixel point
1, and whether the high fdrequency component of judging current pixel point is less than T
1If,, then discerning current pixel point is small size high-frequency noise, and is input to and puts among the 0 circuit 311b, puts 0 circuit 311b to f
H(i j) puts 0 and handles, that is: f
H(i, j)=0, if|f
H(i, j) |≤T
1If not, then continue to be input to non-boundary point Noise Identification treatment circuit.
Described non-boundary point Noise Identification treatment circuit comprises counter 312d, comparator 312a, comparator 312b, comparator 312c and initial value output circuit 312e; Described counter 312d stores n=0 in advance, after it receives the triggering signal of comparator 311a, the value of n is added 1; The output of described counter 312d connects the input of comparator 312a and comparator 312b, and this comparator 312a preestablishes threshold value T
n, with T
nCompare with the input value n of comparator 312a, if T
n〉=n then is input among the comparator 312b, otherwise is input to initial value output circuit 312e; Described comparator 312b preestablishes threshold value N, and the input value n of N and this comparator 312b is compared, if N≤n is input among the comparator 312c, puts among the 0 circuit 311b otherwise be input to; The input of described comparator 312c connects the output of low-and high-frequency decomposition circuit 2, and it is to being that the high fdrequency component of all pixels in the statistical mask of N*N at center judges that one by one this comparator 312c preestablishes threshold value T with the current pixel point
3, be that the high fdrequency component of the point on the diagonal of N * N template at center all surpasses T if meet with the current pixel
3, then be input among the initial value output circuit 312e, keep original f
H(i, j) constant, otherwise the identification current pixel point is non-noise at the boundary, then is input to and puts in the 0 circuit 311b, to f
H(i j) puts 0 and handles; Available following formulate:
if(n(i，j)≥N&(|f
H(i，j)|＞T
3&|f
H(i-1，j)|＞T
3&|f
H(i+1，j)|＞T
3)|
(|f
H(i，j)|＞T
3&|f
H(i-1，j-1)|＞T
3&|f
H(i+1，j+1)|＞T
3)|
(|f
H(i，j)|＞T
3&|f
H(i，j-1)|＞T
3&|f
H(i，j+1)|＞T
3)|
(|f
H(i，j)|＞T
3&|f
H(i+1，j-1)|＞T
3&|f
H(i-1，j+1)|＞T
3))
LineFlag＝1
else
LineFlag＝0
Wherein, T
nBe the threshold value that the boundary pixel of neighborhood is counted, optional usually (N * N+1)/2; T
3High frequency threshold value for single pixel line; N (i, j) for be the center with this some N * N to put the medium-high frequency component be not 0 pixel number.
As shown in Figure 3, described K value computing circuit 32 comprises 4 comparators, and 4 by add circuit, mlultiplying circuit, and the arithmetic processing circuit that subtraction circuit and division circuit combination realize, and put 0 circuit;
Described comparator 32a preestablishes threshold value T
1And T
2, as f
H(i, value j) meets T
1＜f
H(i, j)≤T
2, judge to obtain f
H(i j) belongs to image detail obscures district, then is input to the first calculation process module 321, otherwise is input to comparator 32b;
As shown in Figure 4, the described first calculation process module 321 is realized by the combinational circuit of multiplier, subtracter and divider; F by squelch circuit 31 outputs
H(i is j) with predefined k
1Be input among the multiplier 321a constant k
1With predefined several T
1Be input among the multiplier 321b, the output valve of multiplier 321a and multiplier 321b is input among the subtracter 321c, predefined several T
1And T
2Be input among the subtracter 321d, the output of the output of subtracter 321c and subtracter 321d is input among the divider 321e, and the k that obtains calculating (i, j), that is:
Work as T
1＜f
H(i, j)≤T
2, have
Described comparator 32b judges f
H(i, value j), as meet T
2＜f
H(i, j)≤T
3, judge to obtain f
H(i j) belongs to the image detail region, then is input to the second calculation process module 322, otherwise is input to comparator 32c;
As shown in Figure 5, the described second calculation process module 322 is realized by the combinational circuit of multiplier, subtracter, adder and divider; Predefined k
1With predefined k
3Be input among the subtracter 322a, by the f of squelch circuit 31 outputs
H(i, j) output with subtracter 322a is input among the multiplier 322b constant k
1With predefined several T
3Be input among the multiplier 322c, the output valve of multiplier 322b and multiplier 322c is input among the adder 322d, constant k
3With predefined several T
2Be input among the multiplier 322e, the output of the output of adder 322d and multiplier 322e is input among the subtracter 322f, predefined several T
3And T
2Be input among the subtracter 322g, the output of the output of subtracter 322f and subtracter 322g is input among the divider 322h, and the k that obtains calculating (i, j), that is:
Work as T
2＜f
H(i, j)≤T
3, have
Described comparator 32c judges f
H(i, value j), as meet T
3＜f
H(i, j)≤T
4, judge to obtain f
H(i j) belongs to the image detail marginal zone, then is input to the 3rd calculation process module 323, otherwise is input to comparator 32d;
As shown in Figure 6, described the 3rd calculation process module 323 is realized by the combinational circuit of multiplier, subtracter, adder and divider; Predefined k
2With predefined k
3Be input among the subtracter 323a, by the f of squelch circuit 31 outputs
H(i, j) output with subtracter 323a is input among the multiplier 323b constant k
3With predefined several T
4Be input among the multiplier 323c, the output valve of multiplier 323b and multiplier 323c is input among the adder 323d, constant k
2With predefined several T
3Be input among the multiplier 323e, the output valve of the output of adder 323d and multiplier 323e is input among the subtracter 323f, predefined several T
3And T
4Be input among the subtracter 323g, the output valve of the output valve of subtracter 323f and subtracter 323g is input among the divider 323h, and the k that obtains calculating (i, j), that is:
Work as T
3＜f
H(i, j)≤T
4, have
Described comparator 32d judges f
H(i, value j), as meet T
4＜f
H(i, j)≤T
5, judge to obtain f
H(i j) belongs to the big marginal zone of image, then is input to the 4th calculation process module 324, puts 0 circuit 325 otherwise be input to, and makes k=0;
As shown in Figure 7, described the 4th calculation process module 324 has the combinational circuit of multiplier, subtracter and divider to realize; The f of squelch circuit 31 outputs
H(i is j) with predefined k
2Be input among the multiplier 324a constant k
2With predefined several T
5Be input among the multiplier 324b, the output valve of multiplier 324a and multiplier 324b is input among the subtracter 324c, predefined several T
5And T
4Be input among the subtracter 324d, the output valve of the output valve of subtracter 324c and subtracter 324d is input among the divider 324e, and the k that obtains calculating (i, j), that is:
Work as T
4＜f
H(i, j)≤T
5, have
Above-mentioned, k
1, k
2, k
3Be the amplitude of k value, k
1Be the maximum gain in details obscures district, this gain should be less; k
2Be the gain that strengthens big edge, the dynamics that the big edge of control chart picture strengthens; k
3Be the gain that strengthens details, the dynamics that the control image detail strengthens.And T
1Be noise threshold; T
2Be the details threshold value, promptly greater than its details thought; T
3Be the little edge threshold of details, promptly less than its details thought, greater than its little edge of thinking; T
4Be edge threshold, promptly less than its little edge of thinking, greater than its big edge of thinking; T
5Be the super large edge threshold,, need not to strengthen greater than its super large thought edge.
Described treble boosting circuit 33 can be realized by multiplier, is input in the treble boosting circuit 33 by the pointwise reinforcing coefficient K value of K value computing circuit 32 outputs with by the high fdrequency component of the output of squelch circuit 31, calculates the high fdrequency component after the enhancing.
As shown in Figure 8, described low-and high-frequency merges circuit 4 and comprises the merging circuit, and white edge identification treatment circuit;
Described merging circuit can be realized that the low frequency component of high fdrequency component after the enhancing of multiplier 331 outputs and 2 outputs of low-and high-frequency decomposition circuit is input in the adder 411 by adder 411, and addition obtains and export signal f after the enhancing
Out(i, j), that is: f
Out(i, j)=f
L(i, j)+k (i, j) * f
H(i, j);
Described white edge identification treatment circuit comprises comparator 421, adder 422 and shift unit 423 and initial value holding circuit 424; The output of the output of brightness input circuit 1, squelch circuit 31 and a preset threshold value are input to 421 li of comparators, as do not meet the white edge Rule of judgment, be input in the initial value holding circuit 424, as meet the white edge Rule of judgment, trigger adder 422, the output and the default value W that are brightness input circuit 1 are input in the adder 422, and the output of adder 422 is input to 423 li of shift units, are output as the signal f after white edge is handled
Out(i, j):
Wherein W be in the brightness space relatively near peaked value, think greater than it we to belong to white edge that in the YcbCr space, W is the value between 200～235; And in the HSV space, W is the value between 220～255; If figure image intensifying degree is too high or intrinsic brightness is just very high, the white edge profile appears possibly, and visual sense feeling is bad, undesirable white edge, i.e. f occur in order to prevent image
Out(i, j)＞W, need replacement f
Out(i j) makes it to be unlikely to too white.
The utility model has the advantage of according to the content of video image analyzing and processing point by point, at first Distinguishing the character of pending pixel according to high fdrequency component, is to belong to noise, still belongs to details, little limit Edge, big edge, super large edge? according to different attribute, process to some extent then, as belong to Noise is then removed, as is belonged to details or edge, then carries out enhancing in various degree. The utility model is carried The device of confession can suppress noise, strengthens the expressive ability of image detail, and control crossing of big edge and strengthen, And adding white edge control. Video pictures after said apparatus strengthens, more clear, softer, not white The appearance on limit.
Claims (10)
1, a kind of pointwise improves the processing unit of video image clarity, and its brightness input circuit (1), low-and high-frequency decomposition circuit (2), high fdrequency component recognition processing module, low-and high-frequency that comprises circuit connection successively merges circuit (4) and brightness output circuit (5); Be characterised in that,
Described brightness input circuit (1) input inputted video image, and calculate the luminance graph of this video image, i.e. the monochrome information of all pixels, and output;
Described low-and high-frequency decomposition circuit (2) carries out low-and high-frequency to image brightness picture and decomposes, and difference output image high fdrequency component and image low frequency component;
Described high fdrequency component recognition processing module comprises the squelch circuit (31) that connects by circuit, treble boosting circuit (33) and K value computing circuit (32); It is discerned high fdrequency component, is categorized as small size high-frequency noise, discontinuous noise spot, and details and big edge four big classes, and handle accordingly, obtain new high fdrequency component;
The input of described squelch circuit (31) connects the output of described low-and high-frequency decomposition circuit (2), receives the image high fdrequency component of its output; This squelch circuit (31) identifies small size high-frequency noise and discontinuous noise spot, and carries out denoising, exports high fdrequency component after the denoising more respectively to K value computing circuit (32) and treble boosting circuit (33);
The input of described K value computing circuit (32) connects the output of described squelch circuit (31), according to the different classified calculating pointwise reinforcing coefficient K values of high fdrequency component, and exports the K value tremendously high frequency intensifier circuit that this calculates;
Described treble boosting circuit (33) multiplies each other the corresponding pointwise reinforcing coefficient K value of the output output of the high fdrequency component of squelch circuit (31) output output and K value computing circuit (32), obtains the high fdrequency component after this pixel enhancing;
The input of described low-and high-frequency merging circuit (4) connects output and the output of low-and high-frequency decomposition circuit (2) and the output of brightness input circuit (1) of described treble boosting circuit (33); The enhancing high fdrequency component and the addition of image low frequency component of input are merged the image brightness picture after being enhanced;
Image brightness picture after described brightness output circuit (5) will strengthen is changed back the identical form of video image with input, and output.
2, pointwise as claimed in claim 1 improves the processing unit of video image clarity, it is characterized in that, image brightness f (the i that described brightness input circuit (1) calculates, j) can be Y in the YUV model, or the V in the HSV model, or the I in the HIS model, or the brightness derived of other rational brightness-formula.
3, pointwise as claimed in claim 1 improves the processing unit of video image clarity, it is characterized in that, described low-and high-frequency decomposition circuit (2) comprises low-frequency filter and the subtracter that circuit connects, and uses low-frequency filter to leach image low frequency component f
L(i, j), and by subtracter with image brightness picture f (i, j) and low frequency component f
L(i j) subtracts each other, and obtains image high fdrequency component f
H(i, j), i.e. f
H(i, j)=f (i, j)-f
L(i, j).
4, pointwise as claimed in claim 1 improves the processing unit of video image clarity, it is characterized in that, described low-and high-frequency decomposition circuit (2) also can comprise high frequency filter and the subtracter that circuit connects, and uses high frequency filter to leach image high fdrequency component f
H(i, j), and by subtracter with image brightness picture f (i, j) and high fdrequency component f
H(i j) subtracts each other, and obtains image low frequency component f
L(i, j), i.e. f
L(i, j)=f (i, j)-f
H(i, j).
5, pointwise as claimed in claim 1 improves the processing unit of video image clarity, it is characterized in that, described squelch circuit (31) comprises small size high-frequency noise identification treatment circuit and non-boundary point Noise Identification treatment circuit;
Described small size high-frequency noise identification treatment circuit comprises the comparator (311a) that connects by circuit and puts 0 circuit (311b); The input of described comparator (311a) connects the output of low-and high-frequency decomposition circuit (2), it is to being that the high fdrequency component of all pixels in the statistical mask of N*N at center judges that one by one this comparator (311a) sets in advance threshold value T with the current pixel point
1, and whether the high fdrequency component of judging current pixel point is less than T
1If,, then discerning current pixel point is small size high-frequency noise, and is input to and puts in 0 circuit (311b), puts 0 circuit (311b) to f
H(i j) puts 0 and handles, that is: f
H(i, j)=0, if|f
H(i, j) |≤T
1If not, then continue to be input to non-boundary point Noise Identification treatment circuit;
Described non-boundary point Noise Identification treatment circuit comprises counter (312d), comparator (312a), comparator (312b), comparator (312c) and initial value output circuit (312e); Described counter (312d) is stored n=0 in advance, after it receives the triggering signal of comparator (311a), the value of n is added 1; The output of described counter (312d) connects the input of comparator (312a) and comparator (312b), and this comparator (312a) preestablishes threshold value T
n, with T
nCompare with the input value n of comparator (312a), if T
n〉=n then is input in the comparator (312b), otherwise is input to initial value output circuit (312e); Described comparator (312b) preestablishes threshold value N, and the input value n of N and this comparator (312b) is compared, if N≤n is input in the comparator (312c), puts in 0 circuit (311b) otherwise be input to; The input of described comparator (312c) connects the output of low-and high-frequency decomposition circuit (2), it is to being that the high fdrequency component of all pixels in the statistical mask of N*N at center judges that one by one this comparator (312c) preestablishes threshold value T with the current pixel point
3, be that the high fdrequency component of the point on the diagonal of N * N template at center all surpasses T if meet with the current pixel
3, then be input in the initial value output circuit (312e), keep original f
H(i, j) constant, otherwise the identification current pixel point is non-noise at the boundary, then is input to and puts 0 circuit (311b) lining, to f
H(i j) puts 0 and handles; Available following formulate:
if(n(i，j)≥N&(|f
H(i，j)|＞T
3&|f
H(i-1，j)|＞T
3&|f
H(i+1，j)|＞T
3)|
(|f
H(i，j)|＞T
3&|f
H(i-1，j-1)|＞T
3&|f
H(i+1，j+1)|＞T
3)|
(|f
H(i，j)|＞T
3&|f
H(i，j-1)|＞T
3&|f
H(i，j+1)|＞T
3)|
(|f
H(i，j)|＞T
3&|f
H(i+1，j-1)|＞T
3&|f
H(i-1，j+1)|＞T
3))
LineFlag＝1
else
LineFlag＝0
Wherein, T
nThe threshold value of counting for the boundary pixel of neighborhood; T
3High frequency threshold value for single pixel line; N (i, j) for be the center with this some N * N to put the medium-high frequency component be not 0 pixel number.
6, pointwise as claimed in claim 5 improves the processing unit of video image clarity, it is characterized in that described T
nOptional usually (N * N+1)/2.
7, pointwise as claimed in claim 1 improves the processing unit of video image clarity, it is characterized in that described K value computing circuit (32) comprises 4 comparators, 4 by add circuit, mlultiplying circuit, the arithmetic processing circuit that subtraction circuit and division circuit combination realize, and put 0 circuit;
Described comparator (32a) preestablishes threshold value T
1And T
2, as f
H(i, value j) meets T
1＜f
H(i, j)≤T
2, judge to obtain f
H(i j) belongs to image detail obscures district, then is input to the first calculation process module (321), otherwise is input to comparator (32b);
The described first calculation process module (321) is realized by the combinational circuit of multiplier, subtracter and divider; Calculate:
Described comparator (32b) is judged f
H(i, value j), as meet T
2＜f
H(i, j)≤T
3, judge to obtain f
H(i j) belongs to the image detail region, then is input to the second calculation process module (322), otherwise is input to comparator (32c);
The described second calculation process module (322) is realized by the combinational circuit of multiplier, subtracter, adder and divider; Calculate:
Described comparator (32c) is judged f
H(i, value j), as meet T
3＜f
H(i, j)≤T
4, judge to obtain f
H(i j) belongs to the image detail marginal zone, then is input to the 3rd calculation process module (323), otherwise is input to the 4th comparator (32d);
Described the 3rd calculation process module (323) is realized by the combinational circuit of multiplier, subtracter, adder and divider; Calculate:
Described comparator (32d) is judged f
H(i, value j), as meet T
4＜f
H(i, j)≤T
5, judge to obtain f
H(i j) belongs to the big marginal zone of image, then is input to the 4th calculation process module (324), puts 0 circuit (325) otherwise be input to, and makes k=0;
Described the 4th calculation process module (324) has the combinational circuit of multiplier, subtracter and divider to realize; Calculate:
Wherein, k
1, k
2, k
3Be the amplitude of k value, k
1It is the maximum gain in details obscures district; k
2Be the gain that strengthens big edge, the dynamics that the big edge of control chart picture strengthens; k
3Be the gain that strengthens details, the dynamics that the control image detail strengthens; And T
1Be noise threshold; T
2Be the details threshold value, promptly greater than its details thought; T
3Be the little edge threshold of details, promptly less than its details thought, greater than its little edge of thinking; T
4Be edge threshold, promptly less than its little edge of thinking, greater than its big edge of thinking; T
5Be the super large edge threshold, greater than its super large thought edge.
8, pointwise as claimed in claim 1 improves the processing unit of video image clarity, it is characterized in that, described treble boosting circuit (33) can be realized by multiplier, be input in the treble boosting circuit (33) by the pointwise reinforcing coefficient K value of K value computing circuit (32) output with by the high fdrequency component of the output of squelch circuit (31), calculate the high fdrequency component after the enhancing.
9, pointwise as claimed in claim 1 improves the processing unit of video image clarity, it is characterized in that, described low-and high-frequency merges circuit (4) and comprises the merging circuit, and white edge identification treatment circuit;
Described merging circuit can be realized that the low frequency component of high fdrequency component after the enhancing of multiplier (331) output and low-and high-frequency decomposition circuit (2) output is input in the adder (411) by adder (411), and addition obtains and export signal f after the enhancing
Out(i, j), that is: f
Out(i, j)=f
L(i, j)+k (i, j) * f
H(i, j);
Described white edge identification treatment circuit comprises comparator (421), adder (422) and shift unit (423) and initial value holding circuit (424); The output of the output of brightness input circuit (1), squelch circuit (31) and a preset threshold value are input to comparator (421) lining, as do not meet the white edge Rule of judgment, be input in the initial value holding circuit (424), as meet the white edge Rule of judgment, trigger adder (422), the output and the default value W that are brightness input circuit (1) are input in the adder (422), and the output of adder (422) is input to shift unit (423) lining, are output as the signal f after white edge is handled
Out(i, j):
10, pointwise as claimed in claim 9 improves the processing unit of video image clarity, it is characterized in that in the YcbCr space, W is the value between 200～235; And in the HSV space, W is the value between 220～255.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103533229A (en) * | 2012-07-05 | 2014-01-22 | 现代摩比斯株式会社 | Method and apparatus for recognizing lane |
| CN104094313A (en) * | 2012-02-01 | 2014-10-08 | 佳能株式会社 | Edge adaptive gain adjustment in image enhancement by frequency decomposition |
| CN109213183A (en) * | 2018-05-31 | 2019-01-15 | 上海大学 | Attacked by noise lower network vision reversible pendulum system stable control method |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104094313A (en) * | 2012-02-01 | 2014-10-08 | 佳能株式会社 | Edge adaptive gain adjustment in image enhancement by frequency decomposition |
| US9367901B2 (en) | 2012-02-01 | 2016-06-14 | Canon Kabushiki Kaisha | Image processing apparatus and image processing method to generate images based on adjusted gain coefficients |
| CN104094313B (en) * | 2012-02-01 | 2016-11-09 | 佳能株式会社 | Utilize frequency decomposition to the peripheral adjustment Gain tuning carrying out in image enhaucament |
| CN103533229A (en) * | 2012-07-05 | 2014-01-22 | 现代摩比斯株式会社 | Method and apparatus for recognizing lane |
| CN109213183A (en) * | 2018-05-31 | 2019-01-15 | 上海大学 | Attacked by noise lower network vision reversible pendulum system stable control method |
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