CN2757177Y - Liquid crystal display - Google Patents
Liquid crystal display Download PDFInfo
- Publication number
- CN2757177Y CN2757177Y CN 200420103132 CN200420103132U CN2757177Y CN 2757177 Y CN2757177 Y CN 2757177Y CN 200420103132 CN200420103132 CN 200420103132 CN 200420103132 U CN200420103132 U CN 200420103132U CN 2757177 Y CN2757177 Y CN 2757177Y
- Authority
- CN
- China
- Prior art keywords
- pixel electrode
- line
- lcd
- electrode
- concentric line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Landscapes
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
Abstract
The utility model discloses a liquid crystal display device which is provided with a basal plate which comprises an insulating substrate, a common line which is arranged on the insulating substrate, a common electrode which is connected to the common line, a pixel electrode and a dielectric layer which is arranged between the common line and the pixel electrode, wherein a plurality of convex blocks are arranged on the common line, and storage capacitance is formed by the convex blocks, the pixel electrode and the dielectric layer which is arranged between the convex blocks and the pixel electrode. The utility model also provides another liquid crystal display device which has a thin film transistor substrate, and the structure is similar to the liquid crystal display device. The thin film transistor substrate also comprises a gate line which is basically parallel to the common line. The liquid crystal display device of the utility model has the storage capacitance and can not increase load and power consumption of a driving circuit simultaneously.
Description
[technical field]
The utility model relates to a kind of LCD.
[background technology]
Adopt the LCD of active matrix array to generally comprise a plurality of pixel region and a plurality of thin film transistor (TFT) (Thin Film Transistor that are arranged on gate line and source electrode line infall that intersect to form mutually by gate line and source electrode line, TFT), wherein, each pixel has a pixel electrode, and this thin film transistor (TFT) is used to control the switch switching of this pixel electrode.
When a signal was loaded into thin film transistor (TFT), pixel region was activated, and signal of video signal is applied on this pixel electrode.For reaching high-quality display effect, be applied to voltage on the pixel electrode and must keep a certain normal value when next signal is received.Yet; usually can leak fast in order to the electric charge of keeping voltage on the pixel electrode; cause the voltage on the pixel electrode to reduce too early; thereby reduce the display effect of LCD, therefore each pixel of LCD uses a memory capacitance to keep the voltage of its pixel electrode to stablize constant in the given time usually.
March 29 calendar year 2001, disclosed TaiWan, China patent disclosed a kind of memory capacitance of prior art for No. 493101, as depicted in figs. 1 and 2.Fig. 1 is the pixel region planimetric map of an active-matrix substrate, and Fig. 2 is along the cut-open view of II-II line among Fig. 1.Wherein, this pixel region 1 comprises the data line 11 and the pixel electrode 13 of the gate line 12 of many horizontal expansions, many longitudinal extensions, and each pixel region 1 intersects to form with gate line 12 mutually by the data line 11 in a certain zone.
Wherein, gate line 12 is positioned at substrate 10 tops, and pixel region 1 comprises a plurality of storage electrodes 14, and these a plurality of storage electrodes 14 tops are coated with insulation course 17 and protective seam 18 successively, the part hollow out of corresponding stored electrode 14 on this protective seam 18 is exposed the insulation course 17 of counterpart; Pixel electrode 13 is positioned at insulation course 17 and protective seam 18 tops.A plurality of storage electrodes 14 are strip, are arranged in parallel successively, with insulation course 17 and the pixel electrode 13 common memory capacitance that form.
In this pixel region 1, a plurality of strip storage electrodes 14 are set on gate line 12, increase the total area of storage electrode 14, can increase the capacitance of memory capacitance, thereby can store more multi-charge, keep the voltage of pixel electrode constant in a long time, obtain high-quality display effect.But the load that a plurality of strip storage electrodes 14 can increase gate line 11 simultaneously is set on gate line 11.
[utility model content]
Can increase the defective of gate line load for overcoming the prior art LCD when increasing memory capacitance, the utility model provides a kind of LCD that has memory capacitance and can not increase load.
The utility model also provides another kind to have memory capacitance and can not increase the LCD of load.
The technical scheme that the utility model technical solution problem is adopted is: a kind of LCD is provided, the one substrate comprises a dielectric base, at the concentric line on this dielectric base, a public electrode that is connected with this concentric line, the dielectric layer of a pixel electrode and between this concentric line and this pixel electrode, wherein have a plurality of projections on this concentric line, these a plurality of projections and pixel electrode and the dielectric layer between the two form memory capacitance.
Another technical scheme that the utility model technical solution problem is adopted is: a kind of LCD is provided, its thin film transistor base plate comprises: a dielectric base, one gate line, one is arranged essentially parallel to the concentric line of this gate line, one intersects to form the data line of a pixel region mutually with this gate line and concentric line, one is positioned at the thin film transistor (TFT) of gate line and data line point of crossing, one public electrode that is positioned at pixel region and is connected with this concentric line, one pixel electrode that is connected with this thin film transistor (TFT), one dielectric layer between this concentric line and this pixel electrode wherein has these a plurality of projections of a plurality of projections and pixel electrode and the dielectric layer between the two and forms memory capacitance on this concentric line.
Compared with prior art, in this pixel region, be positioned on the concentric line owing to form a plurality of projections of memory capacitance, these a plurality of projections and pixel electrode and the dielectric layer between the two form memory capacitance jointly.But concentric line only provides reference voltage to public electrode usually, and this LCD has memory capacitance, and its display quality is improved, and can not increase the load and the power consumption of driving circuit simultaneously.
[description of drawings]
Fig. 1 is a kind of pixel region planimetric map of prior art LCD.
Fig. 2 is along the cut-open view of II-II line among Fig. 1.
Fig. 3 is the pixel region planimetric map of the utility model LCD.
Fig. 4 is the cut-open view of pixel region shown in Figure 3 along the IV-IV line.
[embodiment]
One pixel region of the utility model LCD as shown in Figure 3 and Figure 4, Fig. 3 is the planimetric map of a pixel region of the utility model liquid crystal display-display, Fig. 4 is along the cut-open view of IV-IV line among Fig. 3.
See also Fig. 3, this pixel region 3 comprises that the data line 31, of gate line 32, a longitudinal extension of a horizontal expansion is positioned at concentric line (CommonLine) 36 and pixel electrode 33 that this gate line 32 and the thin film transistor (TFT) 35, of the point of crossing of this data line 31 are arranged essentially parallel to this gate line 32, and adjacent two data lines 31 and two gate lines 32 intersect to form pixel region 3 mutually.
Wherein, this thin film transistor (TFT) 35 comprises grid 350, drain electrode 351 and source electrode 352.Gate line 32 is electrically connected with grid 350 and provides control signal to it, and data line 31 is electrically connected with the drain electrode 351 of thin film transistor (TFT) 35 and provide picture element signal to pixel electrode 33 by it, concentric line 36 is positioned at pixel region 3, provides one to drive the reference voltage of liquid crystal layer to the public electrode (Common Electrode) 360 that is connected with this concentric line 36; This public electrode 360 is overlapped with this pixel electrode 33, and the lap 330 of pixel electrode 33 and concentric line 36 is as the last storage electrode of memory capacitance 50.Wherein this concentric line 36 is provided with a plurality of projections that are separated from each other 34, and these a plurality of projections 34 are as the following storage electrode of this memory capacitance 50, respectively and lap 330 and the dielectric layer between the two (figure does not show) constitute a plurality of sub-memory capacitance jointly.These a plurality of sub-memory capacitance formation in parallel memory capacitance 50.
Please consult Fig. 4 together, grid 350, public electrode 360 and concentric line 36 all are arranged on the dielectric base 30, and wherein grid 350 is provided with at interval with public electrode 360, concentric line 36, and public electrode 360 is connected with concentric line 36; Its top is coated with gate insulating film 37, directly over grid 350 and concentric line 36, be disposed with active layers 39 and ohm articulamentum 41, on dielectric base 30, form a conductor layer with said modules, this conductor layer is after etch processes, the conductor layer of public electrode 360 tops is removed, thereby forms drain electrode 351, source electrode 352 and the pixel electrode 33 of thin film transistor (TFT) 35.Above drain electrode 351, source electrode 352, pixel electrode 33 and gate insulating film 37, a passivating film 38 is set.Wherein pixel electrode 33 is electrically connected with drain electrode 351, pixel electrode 33 is overlapped with concentric line 36, a plurality of projections 34 common memory capacitance 50 that form on pixel electrode 33 and gate insulating film 37 and the concentric line 36, wherein the overlapping part 330 of this pixel electrode 33 and concentric line 36 is as the last storage electrode of this memory capacitance 50, and gate insulating film 37 is used as the dielectric layer of this memory capacitance 50.
Compared with prior art, in this pixel region 3, be positioned on the concentric line 36 these a plurality of projections 34 and pixel electrode 33 and the gate insulating film 37 common memory capacitance 50 that form owing to form a plurality of storage electrodes (being a plurality of projections) 34 down of memory capacitance 50.But concentric line 36 only provides reference voltage to public electrode usually, adopts the LCD of this design, has memory capacitance 50, does not increase the load of gate line 32 simultaneously, thereby does not increase the load and the power consumption of driving circuit.
Wherein, these a plurality of projections 34 can be the rectangle projections, and promptly the strip projection also can be trapezoidal projection or triangular bump.On the lap 330 of pixel electrode 33 and concentric line 36 and these a plurality of projections 34, a plurality of holes can also be set, utilize the edge effect of these a plurality of holes further to increase the capacitance of memory capacitance 50.
This concentric line 36, grid 350 and public electrode 360 can be single layer structure, double-decker or three-decker.If this concentric line 36, grid 350 and public electrode 360 are single layer structure, can adopt conductive materials such as aluminium, chromium, Nb-Al alloy, molybdenum and tungsten alloy or molybdenum niobium alloy to make; If this concentric line 36, grid 350 and public electrode 360 are double-decker, its double-deck material can adopt following combination of materials: molybdenum/neodymium aluminium alloy or neodymium aluminium alloy/chromium; If this concentric line 36, grid 350 and public electrode 360 are three-decker, its material of three layers can adopt following combination of materials: titanium/aluminium/titanium or molybdenum/aluminium/molybdenum.In addition, aluminium can replace above-mentioned aluminium alloy, as neodymium aluminium alloy, Nb-Al alloy etc.
In addition, this pixel electrode 33 can adopt tin indium oxide (Indium Tin Oxide, ITO) or indium zinc oxide (Indium Zinc Oxide, IZO) etc. transparent conductive material is made, and can adopt silicon nitride, monox, phenylpropyl alcohol cyclobutane (Benzocyclobutene) or acryl dielectric materials such as (Acryl) to make as the gate insulating film 37 of dielectric layer.
Claims (8)
1. LCD, the one substrate comprises a dielectric base, at the concentric line on this dielectric base, a public electrode that is connected with this concentric line, the dielectric layer of a pixel electrode and between this concentric line and this pixel electrode, it is characterized in that: have a plurality of projections on this concentric line, these a plurality of projections and pixel electrode and the dielectric layer between the two form memory capacitance.
2. LCD as claimed in claim 1 is characterized in that: this projection is at least a in following three kinds of projections: rectangle projection, trapezoidal projection and triangular bump.
3. LCD as claimed in claim 1 is characterized in that: this projection is provided with a plurality of holes.
4. LCD as claimed in claim 1 is characterized in that: this pixel electrode is provided with a plurality of holes.
5. LCD, its thin film transistor base plate comprises: a dielectric base, one gate line, one is arranged essentially parallel to the concentric line of this gate line, one intersects to form the data line of a pixel region mutually with this gate line and concentric line, one is positioned at the thin film transistor (TFT) of gate line and data line point of crossing, one public electrode that is positioned at pixel region and is connected with this concentric line, one pixel electrode that is connected with this thin film transistor (TFT), one dielectric layer between this concentric line and this pixel electrode, it is characterized in that: have a plurality of projections on this concentric line, these a plurality of projections and pixel electrode and the dielectric layer between the two form memory capacitance.
6. LCD as claimed in claim 5 is characterized in that: this projection is at least a in following three kinds of projections: rectangle projection, trapezoidal projection and triangular bump.
7. LCD as claimed in claim 5 is characterized in that: this projection is provided with a plurality of holes.
8. LCD as claimed in claim 5 is characterized in that: this pixel electrode is provided with a plurality of holes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200420103132 CN2757177Y (en) | 2004-12-18 | 2004-12-18 | Liquid crystal display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200420103132 CN2757177Y (en) | 2004-12-18 | 2004-12-18 | Liquid crystal display |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2757177Y true CN2757177Y (en) | 2006-02-08 |
Family
ID=35965564
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200420103132 Expired - Lifetime CN2757177Y (en) | 2004-12-18 | 2004-12-18 | Liquid crystal display |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2757177Y (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100356261C (en) * | 2004-12-01 | 2007-12-19 | 鸿富锦精密工业（深圳）有限公司 | Liquid crystal display |
| WO2015135234A1 (en) * | 2014-03-10 | 2015-09-17 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
| WO2016141682A1 (en) * | 2015-03-12 | 2016-09-15 | 京东方科技集团股份有限公司 | Array substrate and display device |
-
2004
- 2004-12-18 CN CN 200420103132 patent/CN2757177Y/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100356261C (en) * | 2004-12-01 | 2007-12-19 | 鸿富锦精密工业（深圳）有限公司 | Liquid crystal display |
| WO2015135234A1 (en) * | 2014-03-10 | 2015-09-17 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
| WO2016141682A1 (en) * | 2015-03-12 | 2016-09-15 | 京东方科技集团股份有限公司 | Array substrate and display device |
| US9759972B2 (en) | 2015-03-12 | 2017-09-12 | Boe Technology Group Co., Ltd. | Array substrate and display device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101964324B (en) | Active matrix substrate and display device | |
| CN100432768C (en) | Single-gap transflective liquid crystal display panel and its optical characteristic improving method | |
| US8330886B2 (en) | Thin film transistor array substrate and repair method thereof | |
| CN102402087B (en) | Pixel structure, active element array substrate and flat display panel | |
| CN106483728B (en) | Dot structure, array substrate and display device | |
| US7894006B2 (en) | Liquid crystal display with m x 1 inversion drive | |
| CN202159214U (en) | Array substrate and liquid crystal display | |
| CN102629052B (en) | Liquid crystal display panel, driving method of liquid crystal display panel and liquid crystal display device | |
| JP2014056237A (en) | Array substrate, manufacturing method for the same, and display device | |
| CN205427404U (en) | Array substrate and display device | |
| CN103176317A (en) | Liquid crystal pixel electrode structure, array substrate and display device | |
| CN103185997A (en) | Pixel structure and thin film transistor array substrate | |
| TWI228627B (en) | In-plane switching liquid crystal display with high aperture ratio | |
| CN103163699A (en) | Capacitor for amorphous silicon grid drive circuit and liquid crystal display | |
| CN113851485A (en) | Thin film transistor, grid row driving circuit and array substrate | |
| CN201298129Y (en) | Multi-domain vertical alignment liquid crystal display panel | |
| CN1808251A (en) | Thin film transistor array panel for liquid crystal display and liquid crystal display | |
| CN2757177Y (en) | Liquid crystal display | |
| CN106556952B (en) | Dot structure | |
| KR20100008566A (en) | Liquid crystal display | |
| CN1318908C (en) | Thin film transistor array | |
| CN100356261C (en) | Liquid crystal display | |
| KR20070041934A (en) | Liquid crystal display | |
| US7362390B2 (en) | Liquid crystal display panel and thin film transistor array | |
| US11846857B2 (en) | Array substrate and display panel |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CX01 | Expiry of patent term |
Expiration termination date: 20141218 Granted publication date: 20060208 |