CN2626003Y - Sobel and Laplace edge enhancement circuit for digital image of display - Google Patents

Sobel and Laplace edge enhancement circuit for digital image of display Download PDF

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Publication number
CN2626003Y
CN2626003Y CN 03216707 CN03216707U CN2626003Y CN 2626003 Y CN2626003 Y CN 2626003Y CN 03216707 CN03216707 CN 03216707 CN 03216707 U CN03216707 U CN 03216707U CN 2626003 Y CN2626003 Y CN 2626003Y
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China
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signal
circuit
edge
sobel
line storage
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Expired - Fee Related
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CN 03216707
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Chinese (zh)
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丁勇
战嘉瑾
刘志恒
陈永强
何云鹏
缪建兵
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Hisense Group Co Ltd
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Hisense Group Co Ltd
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Abstract

A Sobel and Laplace edge enhancing circuit of display digital images pertains to the display technologies. The utility model at least includes a logical treatment circuit of r (7:0) (or g (7:0), b (7:0)), hde (row), vde (field) and pcik (clock) signals, a first in first out row memory 0, a first in first out row memory 1, a logical comparison circuit, an edge enhancing coefficient generating module and an edge enhancing treatment logical circuit. The first in first out row memory 0 and the first in first out row memory 1 are random access memories which write or read along with the rising of the clock signal and are controlled by a wr-en and rd-en signal. The edge enhancing coefficient generating module consists of a multi-channel converter with the input signal of factor (7:0) and the Sobel (12:2) and the output signal of enhance (10:0). The utility model enhances the details and the level sense of the images and has the simple circuit, fast calculating speed and low power consumption, which significantly improves the image quality. The utility model can be widely used in various displays of the televisions, computers and other devices.

Description

The Sobel of display digital picture and Laplace edge intensifier circuit
Technical field
The utility model belongs to the display technology field, more specifically to the improvement of the edge enhancement process circuit of display digital picture.
Background technology
Image Enhancement Circuit is meant by some information in the outstanding image of specific needs, weakens simultaneously or removes some unwanted information processing method.In the processing of digital picture, often need the details of abundant display image.This just needs to strengthen the part of edge of image and Gray Level Jump.So-called edge just is meant that image local brightness changes the most significant part.
Existing image border enhancement processing method is a lot, as methods such as Sobel operator, Roberts operator, Robinson operator, Canny operator, LOG operator and Laplace operators.The extraction to the edge that has in them is very coarse, and the circuit that has is very complicated and arithmetic speed is slow, power consumption is big, and what have is very responsive to noise jamming.
The purpose of this utility model, just be to overcome above-mentioned shortcoming and defect, provide a kind of extraction and improvement to the image border meticulousr, circuit structure is simple, fast operation, low in energy consumption, the Sobel of the display digital picture that the noise resistance interference performance is strong and Laplace edge intensifier circuit.
Summary of the invention
In order to achieve the above object, the utility model comprises input r[7:0 at least] (or g[7:0], b[7:0]), hde (OK), vde (field), the logic processing circuit of pcik (clock) signal, the first-in first-out line storage 0 that is connected with logic processing circuit, the first-in first-out line storage 1 that is connected with first-in first-out line storage 0, the logic comparator circuit that is connected with threshold signal (threshold) with first-in first-out line storage 1, the edge reinforcing coefficient generation module that is connected with factor (enhancing grade) [7:0] signal with logic comparator circuit and with edge reinforcing coefficient generation module, the edge enhancement process logical circuit that logic processing circuit is connected with logic comparator circuit.The output signal of this circuit is new[7:0], the view data after promptly the edge strengthens.R[7:0 wherein] (or g[7:0], b[7:0]) be input image data, factor[7:0] the edge reinforcing coefficient (suggestion is set to 1) that is provided with for the user, threshold[11:0] threshold value (suggestion is set to 60) that judges whether to carry out the edge enhancing that is provided with for the user.Hde, vde are respectively row, data enable (enable data) signal of input picture.Pcik is the clock input.
First-in first-out line storage 0 and first-in first-out line storage 1 are the fifo0 in[7:0 of input R, G, B signal], the fifo0 out[7:0 of output R, G, B signal], with wr-en and its random access memory of rd-en signal controlling at the rising edge of clock signal write or read.The rd-en signal is imported random access memory successively with after totalizer, the d type flip flop connection processing, and the wr-en signal is imported random access memory successively with after totalizer, the d type flip flop connection processing.The output terminal of random access memory is through d type flip flop output fifo0 out[7:0].First-in first-out line storage 0 and first-in first-out line storage 1 are used for two row view data of storage order input, and they are to utilize the coregenerator of the tool software ISE4 of Xilinx to produce and be embedded in the circuit.Its control signal wr-en and rd-en be by logic processing circuit by hde, vde being leading-one and handling and time-delay back and obtaining, control first-in first-out line storage 0 and first-in first-out line storage 1 respectively at the rising edge of clock signal write or read by them.Whether the threshold that logic comparator circuit will utilize Grad that the Sobel operator handles, calculates input picture R, G, B signal and user to set compares, determine whether edge of image, need to strengthen.
Edge reinforcing coefficient generation module is factor[7:0 by input signal] and Sobel[12:2], output signal is enhance[10:0] traffic pilot form.Be used for producing the different enhancing values that strengthen grade (factor).It can be controlled according to the factor value that the user is provided with and produce the image enhanced strength, produces corresponding enhancer enhance.Utilize the Laplace operator to be handled by edge enhancement process logical circuit at last, judgement is positive edge or marginal edge, determines the enhancing mode, strengthens accordingly.
The marked change of digital picture gray-scale value can be represented with gradient.This circuit adopts based on the Sobel operator of gradient method and Laplace operator joint operation and realizes the detection and the enhancing of image border.The Sobel operator is considered to best edge detection operator.Under the situation of not considering noise, the marginal information error that the Sobel operator is obtained is no more than 7 degree.
The utility model provide a kind of to the image border extraction and improve meticulous, circuit structure is simple, fast operation, low in energy consumption, the noise resistance interference performance is strong, picture quality be improved significantly the Sobel and the Laplace edge intensifier circuit of display digital picture.It can be widely used in the various displays of devices such as televisor, computer, watch-dog.
Description of drawings
The schematic diagram that Fig. 1 strengthens for the utility model edge.Illustrated Sobel operator and Laplace operator to unite the basic procedure of realizing that the image border strengthens.
Fig. 2 is circuit theory diagrams of the present utility model.Because R, G, B Signal Processing mode unanimity are example with the R Signal Processing only among the figure.
Fig. 3 is the circuit diagram of first-in first-out line storage 0 and first-in first-out line storage 1.
Fig. 4 is the circuit diagram of edge reinforcing coefficient generation module.
Embodiment
The Sobel of 1. 1 kinds of display digital pictures of embodiment and Laplace edge intensifier circuit, as shown in Figure 2.Which comprises at least input r[7:0] (or g[7:0], b[7:0]), hde (OK), vde (field), the logic processing circuit (1) of pcik (clock) signal, the first-in first-out line storage 0 (2) that is connected with logic processing circuit (1), the first-in first-out line storage 1 (3) that is connected with first-in first-out line storage 0 (2), the logic comparator circuit (4) that is connected with threshold signal (threshold) with first-in first-out line storage 1 (3) is with logic comparator circuit (4) and factor[7:0] the edge reinforcing coefficient generation module (5) that is connected of signal and with edge reinforcing coefficient generation module (5), the edge enhancement process logical circuit (6) that logic processing circuit (1) is connected with logic comparator circuit (4) constitutes.
Shown in Figure 3, first-in first-out line storage 0 (2) and first-in first-out line storage 1 (3) are the fifo0 in[7:0 of input R, G, B signal], the fifo0 out[7:0 of output R, G, B signal], with wr-en and its random access memory of rd-en signal controlling (7) at the rising edge of clock signal write or read.Its rd-en signal (9) is imported random access memory (7) successively with after totalizer (10), d type flip flop (11) connection processing.Wr-en signal (12) is imported random access memory (7) successively with after totalizer (13), d type flip flop (14) connection processing.The output terminal of random access memory (7) is through d type flip flop (15) output fifo0 out[7:0].
Shown in Figure 4, edge reinforcing coefficient generation module (5) is factor[7:0 by input signal] and Sobel[12:2], output signal is enhance[10:0] traffic pilot (8) form.
Fig. 1 shows its ultimate principle.F among the figure (x, y), (x y) is respectively input, output data to G, and enhn is the edge reinforcing coefficient.When Sobel (thinks during F (x, y))<Threshold (threshold value) not to be the edge, exports without handling directly; When Sobel (thinks the edge during F (x, y))>Threshold, obtains enhancer enhance.Obtain the mode that flex point judge to strengthen through Laplace again, when Laplace (F (x, y))>0, G (x, y)=F (x, y)+enhance, promptly the gradation of image value promotes; When Laplace (F (x, y))<0, G (x, y)=F (x, y)-enhance, promptly the gradation of image value weakens; When Laplace (F (x, y))=0, G (x, y)=F (x y), does not promptly carry out the edge enhancement process, directly output.
Embodiment 1 has strengthened the details and the stereovision of image, and circuit structure is simple, fast operation, low in energy consumption, and the noise resistance interference performance is strong, has significantly improved picture quality.It can be widely used in the various displays of devices such as televisor, computer, watch-dog.

Claims (2)

1. the Sobel of a display digital picture and Laplace edge intensifier circuit, one of which comprises at least input r[7:0] or g[7:0] or b[7:0], the capable signal of hde, the vde field signal, the logic processing circuit of pcik clock signal, the first-in first-out line storage 0 that is connected with logic processing circuit, the first-in first-out line storage 1 that is connected with first-in first-out line storage 0, the logic comparator circuit that is connected with threshold signal threshold with first-in first-out line storage 1, with logic comparator circuit and factor[7:0] the edge reinforcing coefficient generation module that is connected of signal and with edge reinforcing coefficient generation module, the edge enhancement process logical circuit that logic processing circuit is connected with logic comparator circuit, it is characterized in that said first-in first-out line storage 0 and first-in first-out line storage 1 are input R, G, the fifo0 in[7:0 of B signal], output R, G, the fifo0 out[7:0 of B signal], with wr-en and its random access memory of rd-en signal controlling at the rising edge of clock signal write or read, the rd-en signal successively with totalizer, import random access memory after the d type flip flop connection processing, the wr-en signal successively with totalizer, import random access memory after the d type flip flop connection processing, the output terminal of random access memory is through d type flip flop output fifo0 out[7:0].
2. according to the Sobel and the Laplace edge intensifier circuit of claim 1 or 2 described display digital pictures, it is characterized in that said edge reinforcing coefficient generation module is factor[7:0 by input signal] and Sobel[12:2], output signal is enhance[10:0] traffic pilot form.
CN 03216707 2003-04-22 2003-04-22 Sobel and Laplace edge enhancement circuit for digital image of display Expired - Fee Related CN2626003Y (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1293745C (en) * 2004-09-13 2007-01-03 西安交通大学 Video frequency image self adaption detail intensifying method for digital TV post processing technology
CN102609921A (en) * 2012-03-05 2012-07-25 天津天地伟业物联网技术有限公司 Image sharpening system and method based on laplace operator
WO2015014148A1 (en) * 2013-07-30 2015-02-05 Shenzhen Byd Auto R&D Company Limited Method and device for enhancing edge of image and digital camera

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1293745C (en) * 2004-09-13 2007-01-03 西安交通大学 Video frequency image self adaption detail intensifying method for digital TV post processing technology
CN102609921A (en) * 2012-03-05 2012-07-25 天津天地伟业物联网技术有限公司 Image sharpening system and method based on laplace operator
WO2015014148A1 (en) * 2013-07-30 2015-02-05 Shenzhen Byd Auto R&D Company Limited Method and device for enhancing edge of image and digital camera
US9836823B2 (en) 2013-07-30 2017-12-05 Byd Company Limited Method and device for enhancing edge of image and digital camera

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C14 Grant of patent or utility model
GR01 Patent grant
EE01 Entry into force of recordation of patent licensing contract

Assignee: Qingdao Hisense Xinxin Technology Co., Ltd.

Assignor: Hisense Group Co., Ltd.

Contract fulfillment period: 2008.10.12 to 2013.10.11

Contract record no.: 2008370000073

Denomination of utility model: Sobel and Laplace edge enhancement circuit for digital image of display

Granted publication date: 20040714

License type: Exclusive license

Record date: 20081030

LIC Patent licence contract for exploitation submitted for record

Free format text: EXCLUSIVE LICENSE; TIME LIMIT OF IMPLEMENTING CONTACT: 2008.10.12 TO 2013.10.11; CHANGE OF CONTRACT

Name of requester: QINGDAO HAIXIN XINXIN SCIENCE CO., LTD.

Effective date: 20081030

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20040714