CN2394819Y - Automatic detector for rail circuit - Google Patents

Automatic detector for rail circuit Download PDF

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Publication number
CN2394819Y
CN2394819Y CN 97249682 CN97249682U CN2394819Y CN 2394819 Y CN2394819 Y CN 2394819Y CN 97249682 CN97249682 CN 97249682 CN 97249682 U CN97249682 U CN 97249682U CN 2394819 Y CN2394819 Y CN 2394819Y
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CN
China
Prior art keywords
circuit
join
cpu
latch
system controller
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 97249682
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Chinese (zh)
Inventor
刘荣发
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Baoshan Iron and Steel Co Ltd
Original Assignee
Baoshan Iron and Steel Co Ltd
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Filing date
Publication date
Application filed by Baoshan Iron and Steel Co Ltd filed Critical Baoshan Iron and Steel Co Ltd
Priority to CN 97249682 priority Critical patent/CN2394819Y/en
Application granted granted Critical
Publication of CN2394819Y publication Critical patent/CN2394819Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model discloses an automatic detector for rail circuit belonging to the field of railway signal testing devices. The automatic detector for a rail circuit comprises a CPU, a clock generator (U2), a system controller (U1), an information input addressing circuit (DL1), a printing circuit (DL2) and a display circuit (DL3); the clock generator is connected with the CPU, the system controller is connected with the data bus of the CPU, the data output of the system controller and the address bus of the CPU are respectively connected with the information input addressing circuit, the printing circuit and the display circuit. The automatic detector for the rail circuit has the advantages of automatic testing, monitoring without men, and accurate data recording and can be widely applied for various electric interlocking stations.

Description

The track circuit automatic checkout equipment
The utility model relates to a kind of track circuit automatic checkout equipment, belongs to railway signal check implement field.
At present, electric centralized system is adopted at the China railways station, and track circuit detects and adopts pileup type detecting of railway dish, takes artificial push-key operation.If detect a track section, the operating personnel pulls and the corresponding key of this track section title, sees the reading of panel type volt meter pointer again, then with notes record magnitude of voltage.Establish each push-key of AC and DC because of each track section, so a track section will repeat above-mentioned operation twice, the data of record can not be accurate, causes operating efficiency low, and the track section fault rate is high.
The purpose of this utility model is to overcome above-mentioned problems of the prior art, provide a kind of detection automatically, no worker monitor, record data accurately, can guarantee the track circuit automatic checkout equipment of railway safe driving.
For achieving the above object, the technical solution that the utility model proposes is:
The utility model track circuit automatic checkout equipment comprises CPU, clock generator, system controller, information input addressing circuit, print circuit, display circuit; Clock generator and CPU link, and the STSTB end of clock generator also links to each other with system controller; The data bus of system controller and CPU joins, and the data output of system controller and the address bus of CPU link with information input addressing circuit, print circuit, display circuit respectively.
Described information input addressing circuit comprises two latch, solid-state relay, isolating transformer, Connector Clip DCE; The mouth of DCE and the input end of isolating transformer join, the output of isolating transformer and the input of solid-state relay are joined, a mouth of solid-state relay and a data input end of a latch join, a data input end of another mouth of solid-state relay and another latch joins, and the IOW output of CPU is through the DS of a not gate and two latch 1End joins.The data line of a latch joins through the data output of system controller and CPU, and the data line of another latch and the A wire of CPU are joined.
Described print circuit comprises serial interface chip able to programme, actuator, chopping machine, flip-flop circuit; The TXD end of serial interface chip able to programme joins with actuator, and actuator joins with chopping machine again, and the output of flip-flop circuit and the RXD of serial interface chip able to programme end join.
Described display circuit comprises latch, rp-drive, timing oscillator, counting machine, decoder, telltale; Each data output end of latch joins through rp-drive anti-phase after a resistance and eight telltales, timing oscillator joins through resistance and decoder, counting machine also joins with decoder, and each joins with a telltale is corresponding behind a basic transistor amplifier respectively in the output of decoder.
Below in conjunction with Figure of description and embodiment the utility model is done and to be described in further detail:
Accompanying drawing 1 is depicted as the utility model electrical block diagram.
Accompanying drawing 2 is depicted as information input addressing circuit figure of the present utility model.
Accompanying drawing 3 is depicted as Print Circuit of the present utility model.
Accompanying drawing 4 is depicted as display circuit figure of the present utility model.
A kind of track circuit automatic checkout equipment of the utility model comprises CPU (8080A), clock generator U 2(8224), system controller U 1(8228), information input addressing circuit DL 1, print circuit DL 2, display circuit DL 3Clock generator U 2Port respectively with READY, RESBT, WAIT, SYNC, the φ of CPU 1, φ 2End links, clock generator U 2STSTB end and system controller U 1Link; System controller U 1Data terminal D with CPU 0~D 7, WR end, DBIN end, HLDA end join the data output DB of system controller 0~DB 7And the address bus A of CPU 0~A 15Respectively with information input addressing circuit DL 1, print circuit DL 2, display circuit DL 3Link.Described information input addressing circuit DL 1Comprise two latch U 3, U 4(8212), solid-state relay GTJ, isolating transformer GLB, Connector Clip DCE; The input end of the mouth of DCE and isolating transformer GLB joins, and the input of the output of isolating transformer GLB and solid-state relay GTJ is joined, a mouth and a latch U of solid-state relay GTJ 3A data input end join another mouth of solid-state relay and another latch U 4A data input end join, the IOW of CPU output is through a not gate and two latch U 3, U 4DS 1End joins, latch U 3Data output end D O0~D O7Data terminal D with CPU 0~D 7Join latch U 4Data output end D O0~D O7Through system controller U 1Address end A with CPU 0~A 7Join.Described print circuit comprises serial interface chip U able to programme 11(8251), actuator U 12(MC1488), chopping machine U 13, flip-flop circuit A; Serial interface chip U able to programme 11TXD end and actuator U 12Join actuator U 12Again with chopping machine U 13Join, flip-flop circuit A is with the input of two NAND gate, mouth cross connection, the output of flip-flop circuit A and serial interface chip U able to programme 11RXD end join, the residue input end of two NAND gate is by an alternative button A 2Join with ground, this two input end also respectively and connect a resistance R 36, R 37The back joins with 5 volts of power supplys.Described display circuit comprises latch U 5(8212), rp-drive U 7, U 8(238), timing oscillator U 9(555), counting machine U 10(223), decoder U 6(2166), telltale U 14(713A); Latch U 5Each data output end through rp-drive U 7, U 8Anti-phase after a resistance R 25~R 32With eight telltale U 14(1#~8#) join, timing oscillator U 9Through a resistance R 33With decoder U 6Join, 1 end of counting machine joins through 3 ends of a not gate and timing oscillator, 9,8,11 ends of counting machine and 13,3,1 end of decoder join, each joins with a telltale is corresponding behind a basic transistor amplifier B respectively in the output of decoder, and 13,3,1 end of decoder also passes through the address end A of a NAND gate and CPU respectively 10~A 8Join.
Each detected track circuit power supply is incorporated into solid-state relay through Connector Clip DCE and isolating transformer, when this device energized is started working, CPU exports gating signal to input interface chip, solid-state relay is according to putting in order, constantly each tested track circuit information is sent into latch through data bus, gating signal also makes the services request trigger reset of chip simultaneously, make three state buffer be in the output services state, thereby CPU read in the data in the latch among the CPU by data bus.During demonstration, when the CPU responding DMA transmits request, by determining a telltale buffer cell behind the counting machine output-response, timing oscillator is cancelled this DMA and is transmitted request behind 3~5 μ s, make the seven segment code of the firm selected cell of latch after rp-drive is anti-phase, be passed to the anode of telltale again, unison counter adds 1, makes decoder choose this telltale shinny.When needs are printed, press the button A 2, the information that serial interface chip able to programme is printed the application that receives is input to CPU, and the work of CPU Stop message input immediately addressing circuit sends to serial interface chip U able to programme to each track circuit section title, numbering, voltage value data simultaneously 11, U 11Give actuator data, actuator starts printer prints output; When not needing to print, click button A again 2, print circuit is received and is stopped to print application, stops immediately printing; The work of the addressing circuit of CPU log-on message input simultaneously, the data that each track circuit is new are constantly imported this device again.
The utility model than the advantage that prior art has is: (1) this device adopts little Electronic technology can detect the voltage of each track circuit automatically, automatically shows each track section electricity Press to change energy automatic printing record when needing; (2) this device does not participate in the electric interlocking control System, safe and reliable. (3) this device volume is little, and is easy for installation, invests little.

Claims (4)

1. track circuit automatic checkout equipment, it is characterized in that: this device comprises CPU, clock generator (U 2), system controller (U 1), information input addressing circuit (DL 1), print circuit (DL 2), display circuit (DL 3); Clock generator (U 2) link clock generator (U with CPU 2) STSTB end also with system controller (U 1) link to each other; System controller (U 1) with the data bus (D of CPU 0~D 7) join system controller (U 1) data output (DB 0~DB 7) and the address bus (A of CPU 0~A 15) import addressing circuit (DL with information respectively 1), print circuit (DL 2), display circuit (DL 3) link.
2. track circuit automatic checkout equipment according to claim 1 is characterized in that: described information input addressing circuit (DL 1) comprise two latch (U 3, U 4), solid-state relay (GTJ), isolating transformer (GLB), Connector Clip DCE; The input end of the mouth of DCE and isolating transformer (GLB) joins, and the input of the output of isolating transformer (GLB) and solid-state relay (GTJ) is joined, a mouth and a latch (U of solid-state relay (GTJ) 3) a data input end join another mouth of solid-state relay and another latch (U 4) a data input end join, the IOW of CPU output is through the DS of a not gate and two latch 1End joins; Latch (U 3) data line through system controller (U 1) export (D with the data of CPU 0~D 7) join latch (U 4) data line and the A wire (A of CPU 0~A 7) join.
3. track circuit automatic checkout equipment according to claim 1 is characterized in that: described print circuit (DL 2) comprise serial interface chip (U able to programme 11), actuator (U 12), chopping machine (U 13), flip-flop circuit (A); Serial interface chip (U able to programme 11) TXD end and actuator (U 12) join actuator (U 12) again with chopping machine (U 13) join the output of flip-flop circuit (A) and serial interface chip (U able to programme 11) RXD end join.
4. track circuit automatic checkout equipment according to claim 1 is characterized in that: described display circuit (DL 3) comprise latch (U 5), rp-drive (U 7, U 8), timing oscillator (U 9), counting machine (U 10), decoder (U 6), telltale (U 14); Latch (U 5) each data output end through rp-drive (U 7, U 8) anti-phase after behind the resistance respectively with eight telltale (U 14) join timing oscillator (U 9) through resistance and decoder (U 6) join counting machine (U 10) also with decoder (U 6) join decoder (U 6) output each and a telltale (U behind a basic transistor amplifier (B) respectively 14) correspondence joins.
CN 97249682 1997-11-27 1997-11-27 Automatic detector for rail circuit Expired - Fee Related CN2394819Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 97249682 CN2394819Y (en) 1997-11-27 1997-11-27 Automatic detector for rail circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 97249682 CN2394819Y (en) 1997-11-27 1997-11-27 Automatic detector for rail circuit

Publications (1)

Publication Number Publication Date
CN2394819Y true CN2394819Y (en) 2000-09-06

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN 97249682 Expired - Fee Related CN2394819Y (en) 1997-11-27 1997-11-27 Automatic detector for rail circuit

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CN (1) CN2394819Y (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101326091B (en) * 2005-12-08 2011-03-30 通用电气公司 System and method for detecting rail break/vehicle

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101326091B (en) * 2005-12-08 2011-03-30 通用电气公司 System and method for detecting rail break/vehicle

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C56 Change in the name or address of the patentee

Owner name: BAOSHAN IRON & STEEL CO., LTD.

Free format text: FORMER NAME OR ADDRESS: BAOSHAN STEEL ( GROUP ) CO., LTD.

CP03 Change of name, title or address

Address after: Orchard, Fujin Road, Baoshan District, Shanghai

Patentee after: Baoshan Iron & Steel Co., Ltd.

Address before: No. 1, middle section, factory road, Shanghai, Baoshan District

Patentee before: Baoshan iron and steel (Group) Co., Ltd.

C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee