CN221239264U - M.2 encryption card supporting multiple communication protocols - Google Patents
M.2 encryption card supporting multiple communication protocols Download PDFInfo
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- CN221239264U CN221239264U CN202322805336.2U CN202322805336U CN221239264U CN 221239264 U CN221239264 U CN 221239264U CN 202322805336 U CN202322805336 U CN 202322805336U CN 221239264 U CN221239264 U CN 221239264U
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Abstract
The utility model discloses an M.2 encryption card supporting multiple communication protocols, which comprises an M.2 interface, a USB-to-SATA circuit and a SATA link selection circuit, wherein the M.2 interface is simultaneously connected with SATA signals and USB signals, the USB signals are connected with the input end of the USB-to-SATA circuit, the output end of the USB-to-SATA circuit and the SATA signals are both connected with the input end of the SATA link selection circuit, and the output end of the SATA link selection circuit is connected with a storage main control chip; the SEL pin of the SATA link select circuit is connected to the USB input voltage. The utility model can support SATA protocol and USB protocol communication. When the standard B & M SATA interface mainboard is accessed, the standard B & M SATA interface mainboard can be used for normal communication through the SATA interface, and when the standard B & M USB interface mainboard is accessed, the standard B & M SATA interface mainboard can be used for normal communication through the USB interface.
Description
Technical Field
The utility model relates to the field of storage, in particular to an M.2 encryption card supporting multiple communication protocols.
Background
The m.2 interface is a new host interface solution proposed by Intel, which is compatible with a variety of protocols including SATA, PCIe, USB, HSIC, UART, SMBus. At present, the M.2 interface hard disk in the market mainly comprises two types of supporting SATA protocol and PCIe protocol.
The encryption card is a device which uses hardware to realize domestic encryption algorithms such as SM1, SM2, SM3, SM4, SM9 and the like or domestic encryption algorithms such as AES, DES, 3DES, MD5, SHA1 and the like and is connected with a storage main control circuit. HX8800 is a national security master control chip, only supports SATA3.0 interface, if it is standard B & M SATA interface motherboard, can use through SATA interface normal communication. For the scenario requiring communication using the USB protocol, for example, a non-standard B & M USB interface motherboard, communication cannot be performed. There is therefore a need for an m.2 encryption card that supports multiple communication protocols.
Disclosure of utility model
The utility model aims to provide an M.2 encryption card supporting multiple communication protocols, which can simultaneously support SATA protocol and USB protocol communication. When the standard B & M SATA interface mainboard is accessed, the standard B & M SATA interface mainboard can be used for normal communication through the SATA interface, and when the standard B & M USB interface mainboard is accessed, the standard B & M SATA interface mainboard can be used for normal communication through the USB interface.
In order to solve the technical problems, the utility model adopts the following technical scheme: an M.2 encryption card supporting multiple communication protocols comprises an M.2 interface, a USB-to-SATA circuit and a SATA link selection circuit, wherein the M.2 interface is connected with SATA signals and USB signals simultaneously, the USB signals are connected with the input end of the USB-to-SATA circuit, the output end of the USB-to-SATA circuit and the SATA signals are both connected with the input end of the SATA link selection circuit, and the output end of the SATA link selection circuit is connected with a storage main control chip; the SEL pin of the SATA link select circuit is connected to the USB input voltage.
Further, the m.2 interface is a standard B & M interface.
Furthermore, the M.2 encryption card is suitable for standard M.2 SATA interface mainboards and nonstandard M.2 USB mainboards.
Further, the output end of the SATA link selection circuit is connected with the national cipher master control chip HX8800.
Further, the USB input voltage is led out through a pin on the M.2 interface.
Further, the USB-to-SATA circuit is realized based on a USB-to-SATA chip.
Further, the SATA link selection circuit is implemented based on SATA3.0 multiplexing chips.
The utility model has the beneficial effects that: the utility model provides an M.2 interface encryption card supporting various communication protocols, enriches interface types, can be used on a standard M.2 SATA interface mainboard, and can also be applied to a nonstandard M.2 USB mainboard. The bare board can use an M.2 SATA interface to carry out mass production on the main control circuit, or use a USB-to-M.2 adapter board to carry out mass production on the main control circuit. To ensure the SATA3.0 signal quality, an automatic switching circuit is designed, and the SATA communication is defaulted when a standard M.2 SATA interface main board is used, and the USB protocol communication is automatically switched to when a nonstandard M.2 USB interface main board is used. The M.2 encryption card is widely applied to the corresponding field.
Drawings
FIG. 1 is a schematic block diagram of the present utility model;
FIG. 2 is a schematic circuit diagram of the M.2 interface;
FIG. 3 is a schematic diagram of a USB3.0 to SATA3.0 circuit;
FIG. 4 is a schematic circuit diagram of a SATA link selection circuit.
Detailed Description
Example 1
The embodiment discloses an M.2 encryption card supporting multiple communication protocols, as shown in FIG. 1, the encryption card comprises an M.2 interface, a USB-to-SATA circuit and a SATA link selection circuit, wherein the M.2 interface is connected with SATA signals and USB signals simultaneously, the USB signals are connected with the input end of the USB-to-SATA circuit, the output end of the USB-to-SATA circuit and the SATA signals are both connected with the input end of the SATA link selection circuit, and the output end of the SATA link selection circuit is connected with a storage main control chip; the SEL pin of the SATA link select circuit is connected to the USB input voltage. When the standard M.2 SATA interface is used, SATA communication is used, data is transmitted to the storage main control chip through the SATA interface and the SATA link selection circuit, when the standard M.2 SATA interface is used, USB protocol communication is used, data is converted into SATA data through the USB-to-SATA circuit, and then the SATA data is transmitted to the storage main control chip through the SATA link selection circuit.
In this embodiment, the m.2 interface is a standard B & M interface. As shown in fig. 2, the m.2 interface is implemented by connection J1, and pins 49, 47, 43, 41 are connected to SATA signals, and are connected to the input terminal of the SATA link selection circuit by capacitors C43, C45, C44, C46, respectively. Pins 37, 35, 31, 29, 9, 7 connect USB signals to USB to SATA circuitry. Pins 22, 20 draw the +5V_USB voltage as a USB input voltage to the SEL pin of the SATA link selection circuit.
In this embodiment, the USB-to-SATA circuit is implemented based on a USB-to-SATA chip. As shown in FIG. 3, pins 15, 16, 19, 20, 22, 23 of the USB to SATA chip are input terminals connected to the M.2 interface. Pins 33, 32, 30, 29 of the USB to SATA chip are output terminals connected to the SATA link selection circuit. The USB-to-SATA chip converts data communicated according to the USB protocol into data communicated according to the SATA protocol and sends the data to the SATA link selection circuit.
In this embodiment, the SATA link selection circuit is implemented based on SATA3.0 multiplexing chips. As shown in fig. 4, pins 24, 23, 22, 21 of the SATA3.0 multiplexing chip are connected to SATA interfaces of the m.2 interface, and receive SATA data of the SATA interfaces. Pins 18, 17, 16, 15 of the SATA3.0 multiplexing chip are connected to the output end of the USB to SATA chip, and receive SATA data converted by the USB to SATA chip. The pin SEL is connected to the USB input voltage +5v_usb for signal multiplexing.
In this embodiment, the storage master control chip is a national secret master control chip HX8800, that is, the SATA3.0 multiplexing chip is connected to the national secret master control chip HX8800 through pins 4, 5, 6, and 7. The chip adopts a high-speed data transmission mode, supports a SATA3.0 interface, supports a main stream NAND FLASH and eMMC, supports cryptographic algorithms such as SM1, SM2, SM3 and SM4 of China, and is widely applied to occasions with higher security requirements in related, commercial and special industries.
The m.2 encryption card in this embodiment supports two transmission protocols, SATA and USB, and is applicable to standard m.2 SATA interface boards and nonstandard m.2 USB boards in terms of hardware. By means of the standard B & M interface, the standard M.2 SATA interface or the USB-to-M.2 adapter plate can be used for mass production or data transmission, and the nonstandard M.2 interface can also be used for USB data transmission.
The HX8800 main control chip only supports the SATA3.0 interface, and the host end requires to communicate by using a USB protocol, so that the encryption card integrates the USB3.0 to SATA3.0 chip, namely a chip U5 shown in FIG. 3, and USB data of a nonstandard M.2 interface is converted into SATA data through the chip U5, so that the transmission of the USB data is realized.
The SATA3.0 multiplexing chip shown in fig. 4 has SATA signal multiplexing function, and when the encryption card is inserted into the standard m.2 SATA interface motherboard, it communicates with the main control chip by SATA signals by default. When the encryption card is inserted into the nonstandard M.2 USB interface mainboard, the encryption card is automatically communicated with the main control chip through the USB/SATA conversion chip. Specifically, which path is selected is judged by the voltage of the SEL pin of the SATA multiplexing chip. The USB interface is mainly distinguished by 5V of non-standard pin USB input voltage, when a standard M.2 SATA interface main board is inserted, no 5V input is provided, the SEL pin is low, communication is carried out through one path of SATA, when the non-standard M.2 USB interface main board is inserted, the 5V input is provided, the SEL pin is pulled high, and communication is carried out through one path of USB conversion chip.
The utility model can simultaneously support SATA protocol and USB protocol communication through pin definition. When the standard B & M SATA interface mainboard is accessed, the standard B & M SATA interface mainboard can be used for normal communication through the SATA interface, and when the standard B & M USB interface mainboard is accessed, the standard B & M SATA interface mainboard can be used for normal communication through the USB interface.
The foregoing description is only of the basic principles and preferred embodiments of the present utility model, and modifications and alternatives thereto will occur to those skilled in the art to which the present utility model pertains, as defined by the appended claims.
Claims (7)
1. An m.2 encryption card supporting multiple communication protocols, characterized by: the USB-to-SATA interface comprises an M.2 interface, a USB-to-SATA circuit and a SATA link selection circuit, wherein the M.2 interface is connected with SATA signals and USB signals simultaneously, the USB signals are connected with the input end of the USB-to-SATA circuit, the output end of the USB-to-SATA circuit and the SATA signals are both connected with the input end of the SATA link selection circuit, and the output end of the SATA link selection circuit is connected with a storage main control chip; the SEL pin of the SATA link select circuit is connected to the USB input voltage.
2. The m.2 encryption card supporting multiple communication protocols as set forth in claim 1, wherein: the M.2 interface is a standard B & M interface.
3. The m.2 encryption card supporting multiple communication protocols as set forth in claim 1, wherein: the M.2 encryption card is suitable for standard M.2 SATA interface mainboards and nonstandard M.2 USB mainboards.
4. The m.2 encryption card supporting multiple communication protocols as set forth in claim 1, wherein: the output end of the SATA link selection circuit is connected with the national cipher master control chip HX8800.
5. The m.2 encryption card supporting multiple communication protocols as set forth in claim 1, wherein: the USB input voltage is led out through a pin on the M.2 interface.
6. The m.2 encryption card supporting multiple communication protocols as set forth in claim 1, wherein: the USB-to-SATA circuit is realized based on a USB-to-SATA chip.
7. The m.2 encryption card supporting multiple communication protocols as set forth in claim 1, wherein: the SATA link selection circuit is implemented based on SATA3.0 multiplexing chips.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322805336.2U CN221239264U (en) | 2023-10-19 | 2023-10-19 | M.2 encryption card supporting multiple communication protocols |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322805336.2U CN221239264U (en) | 2023-10-19 | 2023-10-19 | M.2 encryption card supporting multiple communication protocols |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN221239264U true CN221239264U (en) | 2024-06-28 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202322805336.2U Active CN221239264U (en) | 2023-10-19 | 2023-10-19 | M.2 encryption card supporting multiple communication protocols |
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| Country | Link |
|---|---|
| CN (1) | CN221239264U (en) |
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2023
- 2023-10-19 CN CN202322805336.2U patent/CN221239264U/en active Active
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